From f8c64755cf3b9f312ed8719099ff0bdaaec8564d Mon Sep 17 00:00:00 2001 From: hayati ayguen Date: Wed, 16 Sep 2020 21:17:13 +0200 Subject: [PATCH 1/2] added bandwidths 1200, 1800, 2200, 3000 and 5000 kHz for R820T/2 needs some testing/measurement see "distorted ends" at https://github.com/librtlsdr/librtlsdr/issues/96 Signed-off-by: hayati ayguen --- src/tuner_r82xx.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/src/tuner_r82xx.c b/src/tuner_r82xx.c index f101cdc..f6833a1 100644 --- a/src/tuner_r82xx.c +++ b/src/tuner_r82xx.c @@ -1652,6 +1652,8 @@ static const struct IFinfo IFi[] = { { 2, 1100+2, IFB(1100), 0, 0x0F, 0xEF, 0x60 }, /* steep high freq edge */ #endif + { 3, 1200+0, 1350, 0, 0x0F, 0xEE, 0x00 }, /* centered with hpf */ + { 3, 1300+0, 2050, -7, 0x0F, 0x8A, 0x00 }, /* centered with hpf */ #if (WITH_ASYM_FILTER) { 1, 1300+1, IFA(1300), 26, 0x0F, 0xEF, 0x60 }, /* steep low freq edge */ @@ -1661,7 +1663,15 @@ static const struct IFinfo IFi[] = { { 3, 1500+3, 1300, -24, 0x0F, 0xEF, 0x60 }, { 3, 1600+0, 1900, 0, 0x0F, 0x8B, 0x00 }, /* centered with hpf */ { 3, 1750+3, 1400, 12, 0x0F, 0xCF, 0x60 }, /* 20 */ - { 3, 1950+3, 1500, 30, 0x0F, 0x8F, 0x60 } + + { 3, 1800+0, 1400, 0, 0x0F, 0xAF, 0x00 }, + + { 3, 1950+3, 1500, 30, 0x0F, 0x8F, 0x60 }, + + { 3, 2200+0, 1600, 0, 0x0F, 0x8F, 0x00 }, + { 3, 3000+0, 2000, 0, 0x04, 0x8F, 0x00 }, + { 3, 5000+0, 3570, 0, 0x0B, 0x6B, 0x00 } + }; From 8ef067e6429fb93b558b2fa57e7e74619dadba5f Mon Sep 17 00:00:00 2001 From: hayati ayguen Date: Wed, 16 Sep 2020 19:23:17 +0000 Subject: [PATCH 2/2] fix compiler warnings/errors Signed-off-by: hayati ayguen --- src/tuner_r82xx.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/tuner_r82xx.c b/src/tuner_r82xx.c index f6833a1..99c9beb 100644 --- a/src/tuner_r82xx.c +++ b/src/tuner_r82xx.c @@ -779,13 +779,12 @@ static int r82xx_set_pll_yc(struct r82xx_priv *priv, uint32_t freq) return rc; } - if (vco_frac == 0) - { + if (vco_frac == 0) { /* Disable frac pll */ rc = r82xx_write_reg_mask(priv, 0x12, 0x08, 0x08); if(rc < 0) { - if (priv->cfg->verbose) - fprintf(stderr, "r82xx_set_pll_yc(): error writing 'disable frac pll' into i2c reg 0x12\n"); + if (priv->cfg->verbose) + fprintf(stderr, "r82xx_set_pll_yc(): error writing 'disable frac pll' into i2c reg 0x12\n"); return rc; } } @@ -1105,6 +1104,7 @@ static int r82xx_set_pll(struct r82xx_priv *priv, uint32_t freq) int r82xx_is_tuner_locked(struct r82xx_priv *priv) { + int rc; uint8_t data[5]; /* was all PLL stuff set for last frequency? */ @@ -1112,7 +1112,7 @@ int r82xx_is_tuner_locked(struct r82xx_priv *priv) return 1; /* Check if PLL has locked */ - int rc = r82xx_read(priv, 0x00, data, sizeof(data)); + rc = r82xx_read(priv, 0x00, data, sizeof(data)); if (rc < 0) return -3; if (!(data[2] & 0x40)) {