From 38312eac038b275827bd76999967b4241204b97e Mon Sep 17 00:00:00 2001 From: Joseph Poirier Date: Sun, 6 Mar 2016 12:08:27 -0600 Subject: [PATCH] minor formatting --- include/tuner_e4k.h | 156 +++++++++++++++---------------- include/tuner_fc2580.h | 6 +- include/tuner_r82xx.h | 34 ++++--- src/convenience/convenience.h | 4 + src/librtlsdr.c | 48 +++++----- src/rtl_adsb.c | 2 +- src/rtl_fm.c | 4 +- src/rtl_power.c | 4 +- src/rtl_test.c | 2 +- src/tuner_e4k.c | 10 +- src/tuner_fc0013.c | 16 ++-- src/tuner_fc2580.c | 59 +++++------- src/tuner_r82xx.c | 170 +++++++++++++++++----------------- 13 files changed, 253 insertions(+), 262 deletions(-) diff --git a/include/tuner_e4k.h b/include/tuner_e4k.h index 79591ce..36f6aa1 100644 --- a/include/tuner_e4k.h +++ b/include/tuner_e4k.h @@ -29,94 +29,94 @@ #define E4K_CHECK_VAL 0x40 enum e4k_reg { - E4K_REG_MASTER1 = 0x00, - E4K_REG_MASTER2 = 0x01, - E4K_REG_MASTER3 = 0x02, - E4K_REG_MASTER4 = 0x03, - E4K_REG_MASTER5 = 0x04, - E4K_REG_CLK_INP = 0x05, - E4K_REG_REF_CLK = 0x06, - E4K_REG_SYNTH1 = 0x07, - E4K_REG_SYNTH2 = 0x08, - E4K_REG_SYNTH3 = 0x09, - E4K_REG_SYNTH4 = 0x0a, - E4K_REG_SYNTH5 = 0x0b, - E4K_REG_SYNTH6 = 0x0c, - E4K_REG_SYNTH7 = 0x0d, - E4K_REG_SYNTH8 = 0x0e, - E4K_REG_SYNTH9 = 0x0f, - E4K_REG_FILT1 = 0x10, - E4K_REG_FILT2 = 0x11, - E4K_REG_FILT3 = 0x12, + E4K_REG_MASTER1 = 0x00, + E4K_REG_MASTER2 = 0x01, + E4K_REG_MASTER3 = 0x02, + E4K_REG_MASTER4 = 0x03, + E4K_REG_MASTER5 = 0x04, + E4K_REG_CLK_INP = 0x05, + E4K_REG_REF_CLK = 0x06, + E4K_REG_SYNTH1 = 0x07, + E4K_REG_SYNTH2 = 0x08, + E4K_REG_SYNTH3 = 0x09, + E4K_REG_SYNTH4 = 0x0a, + E4K_REG_SYNTH5 = 0x0b, + E4K_REG_SYNTH6 = 0x0c, + E4K_REG_SYNTH7 = 0x0d, + E4K_REG_SYNTH8 = 0x0e, + E4K_REG_SYNTH9 = 0x0f, + E4K_REG_FILT1 = 0x10, + E4K_REG_FILT2 = 0x11, + E4K_REG_FILT3 = 0x12, // gap - E4K_REG_GAIN1 = 0x14, - E4K_REG_GAIN2 = 0x15, - E4K_REG_GAIN3 = 0x16, - E4K_REG_GAIN4 = 0x17, + E4K_REG_GAIN1 = 0x14, + E4K_REG_GAIN2 = 0x15, + E4K_REG_GAIN3 = 0x16, + E4K_REG_GAIN4 = 0x17, // gap - E4K_REG_AGC1 = 0x1a, - E4K_REG_AGC2 = 0x1b, - E4K_REG_AGC3 = 0x1c, - E4K_REG_AGC4 = 0x1d, - E4K_REG_AGC5 = 0x1e, - E4K_REG_AGC6 = 0x1f, - E4K_REG_AGC7 = 0x20, - E4K_REG_AGC8 = 0x21, + E4K_REG_AGC1 = 0x1a, + E4K_REG_AGC2 = 0x1b, + E4K_REG_AGC3 = 0x1c, + E4K_REG_AGC4 = 0x1d, + E4K_REG_AGC5 = 0x1e, + E4K_REG_AGC6 = 0x1f, + E4K_REG_AGC7 = 0x20, + E4K_REG_AGC8 = 0x21, // gap - E4K_REG_AGC11 = 0x24, - E4K_REG_AGC12 = 0x25, + E4K_REG_AGC11 = 0x24, + E4K_REG_AGC12 = 0x25, // gap - E4K_REG_DC1 = 0x29, - E4K_REG_DC2 = 0x2a, - E4K_REG_DC3 = 0x2b, - E4K_REG_DC4 = 0x2c, - E4K_REG_DC5 = 0x2d, - E4K_REG_DC6 = 0x2e, - E4K_REG_DC7 = 0x2f, - E4K_REG_DC8 = 0x30, + E4K_REG_DC1 = 0x29, + E4K_REG_DC2 = 0x2a, + E4K_REG_DC3 = 0x2b, + E4K_REG_DC4 = 0x2c, + E4K_REG_DC5 = 0x2d, + E4K_REG_DC6 = 0x2e, + E4K_REG_DC7 = 0x2f, + E4K_REG_DC8 = 0x30, // gap - E4K_REG_QLUT0 = 0x50, - E4K_REG_QLUT1 = 0x51, - E4K_REG_QLUT2 = 0x52, - E4K_REG_QLUT3 = 0x53, + E4K_REG_QLUT0 = 0x50, + E4K_REG_QLUT1 = 0x51, + E4K_REG_QLUT2 = 0x52, + E4K_REG_QLUT3 = 0x53, // gap - E4K_REG_ILUT0 = 0x60, - E4K_REG_ILUT1 = 0x61, - E4K_REG_ILUT2 = 0x62, - E4K_REG_ILUT3 = 0x63, + E4K_REG_ILUT0 = 0x60, + E4K_REG_ILUT1 = 0x61, + E4K_REG_ILUT2 = 0x62, + E4K_REG_ILUT3 = 0x63, // gap - E4K_REG_DCTIME1 = 0x70, - E4K_REG_DCTIME2 = 0x71, - E4K_REG_DCTIME3 = 0x72, - E4K_REG_DCTIME4 = 0x73, - E4K_REG_PWM1 = 0x74, - E4K_REG_PWM2 = 0x75, - E4K_REG_PWM3 = 0x76, - E4K_REG_PWM4 = 0x77, - E4K_REG_BIAS = 0x78, - E4K_REG_CLKOUT_PWDN = 0x7a, + E4K_REG_DCTIME1 = 0x70, + E4K_REG_DCTIME2 = 0x71, + E4K_REG_DCTIME3 = 0x72, + E4K_REG_DCTIME4 = 0x73, + E4K_REG_PWM1 = 0x74, + E4K_REG_PWM2 = 0x75, + E4K_REG_PWM3 = 0x76, + E4K_REG_PWM4 = 0x77, + E4K_REG_BIAS = 0x78, + E4K_REG_CLKOUT_PWDN = 0x7a, E4K_REG_CHFILT_CALIB = 0x7b, E4K_REG_I2C_REG_ADDR = 0x7d, // FIXME }; -#define E4K_MASTER1_RESET (1 << 0) +#define E4K_MASTER1_RESET (1 << 0) #define E4K_MASTER1_NORM_STBY (1 << 1) -#define E4K_MASTER1_POR_DET (1 << 2) +#define E4K_MASTER1_POR_DET (1 << 2) -#define E4K_SYNTH1_PLL_LOCK (1 << 0) +#define E4K_SYNTH1_PLL_LOCK (1 << 0) #define E4K_SYNTH1_BAND_SHIF 1 #define E4K_SYNTH7_3PHASE_EN (1 << 3) #define E4K_SYNTH8_VCOCAL_UPD (1 << 2) -#define E4K_FILT3_DISABLE (1 << 5) +#define E4K_FILT3_DISABLE (1 << 5) -#define E4K_AGC1_LIN_MODE (1 << 4) -#define E4K_AGC1_LNA_UPDATE (1 << 5) -#define E4K_AGC1_LNA_G_LOW (1 << 6) -#define E4K_AGC1_LNA_G_HIGH (1 << 7) +#define E4K_AGC1_LIN_MODE (1 << 4) +#define E4K_AGC1_LNA_UPDATE (1 << 5) +#define E4K_AGC1_LNA_G_LOW (1 << 6) +#define E4K_AGC1_LNA_G_HIGH (1 << 7) #define E4K_AGC6_LNA_CAL_REQ (1 << 4) @@ -127,27 +127,27 @@ enum e4k_reg { #define E4K_AGC11_LNA_GAIN_ENH (1 << 0) -#define E4K_DC1_CAL_REQ (1 << 0) +#define E4K_DC1_CAL_REQ (1 << 0) -#define E4K_DC5_I_LUT_EN (1 << 0) -#define E4K_DC5_Q_LUT_EN (1 << 1) +#define E4K_DC5_I_LUT_EN (1 << 0) +#define E4K_DC5_Q_LUT_EN (1 << 1) #define E4K_DC5_RANGE_DET_EN (1 << 2) -#define E4K_DC5_RANGE_EN (1 << 3) -#define E4K_DC5_TIMEVAR_EN (1 << 4) +#define E4K_DC5_RANGE_EN (1 << 3) +#define E4K_DC5_TIMEVAR_EN (1 << 4) -#define E4K_CLKOUT_DISABLE 0x96 +#define E4K_CLKOUT_DISABLE 0x96 -#define E4K_CHFCALIB_CMD (1 << 0) +#define E4K_CHFCALIB_CMD (1 << 0) -#define E4K_AGC1_MOD_MASK 0xF +#define E4K_AGC1_MOD_MASK 0xF enum e4k_agc_mode { - E4K_AGC_MOD_SERIAL = 0x0, + E4K_AGC_MOD_SERIAL = 0x0, E4K_AGC_MOD_IF_PWM_LNA_SERIAL = 0x1, E4K_AGC_MOD_IF_PWM_LNA_AUTONL = 0x2, E4K_AGC_MOD_IF_PWM_LNA_SUPERV = 0x3, E4K_AGC_MOD_IF_SERIAL_LNA_PWM = 0x4, - E4K_AGC_MOD_IF_PWM_LNA_PWM = 0x5, + E4K_AGC_MOD_IF_PWM_LNA_PWM = 0x5, E4K_AGC_MOD_IF_DIG_LNA_SERIAL = 0x6, E4K_AGC_MOD_IF_DIG_LNA_AUTON = 0x7, E4K_AGC_MOD_IF_DIG_LNA_SUPERV = 0x8, @@ -159,7 +159,7 @@ enum e4k_band { E4K_BAND_VHF2 = 0, E4K_BAND_VHF3 = 1, E4K_BAND_UHF = 2, - E4K_BAND_L = 3, + E4K_BAND_L = 3, }; enum e4k_mixer_filter_bw { diff --git a/include/tuner_fc2580.h b/include/tuner_fc2580.h index 9ebd935..6eb08b7 100644 --- a/include/tuner_fc2580.h +++ b/include/tuner_fc2580.h @@ -1,9 +1,9 @@ #ifndef __TUNER_FC2580_H #define __TUNER_FC2580_H -#define BORDER_FREQ 2600000 //2.6GHz : The border frequency which determines whether Low VCO or High VCO is used -#define USE_EXT_CLK 0 //0 : Use internal XTAL Oscillator / 1 : Use External Clock input -#define OFS_RSSI 57 +#define BORDER_FREQ 2600000 /* 2.6GHz : The border frequency which determines whether Low VCO or High VCO is used */ +#define USE_EXT_CLK 0 /* 0 : Use internal XTAL Oscillator / 1 : Use External Clock input */ +#define OFS_RSSI 57 #define FC2580_I2C_ADDR 0xac #define FC2580_CHECK_ADDR 0x01 diff --git a/include/tuner_r82xx.h b/include/tuner_r82xx.h index 49d73d6..ad3638d 100644 --- a/include/tuner_r82xx.h +++ b/include/tuner_r82xx.h @@ -35,11 +35,11 @@ #define R82XX_IF_FREQ 3570000 #define REG_SHADOW_START 5 -#define NUM_REGS 30 -#define NUM_IMR 5 -#define IMR_TRIAL 9 +#define NUM_REGS 30 +#define NUM_IMR 5 +#define IMR_TRIAL 9 -#define VER_NUM 49 +#define VER_NUM 49 enum r82xx_chip { CHIP_R820T, @@ -75,23 +75,21 @@ struct r82xx_config { struct r82xx_priv { struct r82xx_config *cfg; - uint8_t regs[NUM_REGS]; - uint8_t buf[NUM_REGS + 1]; + uint8_t regs[NUM_REGS]; + uint8_t buf[NUM_REGS + 1]; enum r82xx_xtal_cap_value xtal_cap_sel; - uint16_t pll; /* kHz */ - uint32_t int_freq; - uint8_t fil_cal_code; - uint8_t input; - int has_lock; - int init_done; + uint16_t pll; /* kHz */ + uint32_t int_freq; + uint8_t fil_cal_code; + uint8_t input; + int has_lock; + int init_done; /* Store current mode */ - uint32_t delsys; - enum r82xx_tuner_type type; - - uint32_t bw; /* in MHz */ - - void *rtl_dev; + uint32_t delsys; + enum r82xx_tuner_type type; + uint32_t bw; /* in MHz */ + void *rtl_dev; }; struct r82xx_freq_range { diff --git a/src/convenience/convenience.h b/src/convenience/convenience.h index 1faa2af..6d39b65 100644 --- a/src/convenience/convenience.h +++ b/src/convenience/convenience.h @@ -14,6 +14,9 @@ * You should have received a copy of the GNU General Public License * along with this program. If not, see . */ +#ifndef __CONVENIENCE_H +#define __CONVENIENCE_H + /* a collection of user friendly tools */ @@ -140,3 +143,4 @@ int verbose_reset_buffer(rtlsdr_dev_t *dev); int verbose_device_search(char *s); +#endif /*__CONVENIENCE_H*/ diff --git a/src/librtlsdr.c b/src/librtlsdr.c index ef6c7ba..2187d24 100644 --- a/src/librtlsdr.c +++ b/src/librtlsdr.c @@ -366,19 +366,19 @@ static rtlsdr_dongle_t known_devices[] = { #define MIN_RTL_XTAL_FREQ (DEF_RTL_XTAL_FREQ - 1000) #define MAX_RTL_XTAL_FREQ (DEF_RTL_XTAL_FREQ + 1000) -#define CTRL_IN (LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_ENDPOINT_IN) -#define CTRL_OUT (LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_ENDPOINT_OUT) +#define CTRL_IN (LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_ENDPOINT_IN) +#define CTRL_OUT (LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_ENDPOINT_OUT) #define CTRL_TIMEOUT 300 #define BULK_TIMEOUT 0 #define EEPROM_ADDR 0xa0 enum usb_reg { - USB_SYSCTL = 0x2000, - USB_CTRL = 0x2010, - USB_STAT = 0x2014, - USB_EPA_CFG = 0x2144, - USB_EPA_CTL = 0x2148, + USB_SYSCTL = 0x2000, + USB_CTRL = 0x2010, + USB_STAT = 0x2014, + USB_EPA_CFG = 0x2144, + USB_EPA_CTL = 0x2148, USB_EPA_MAXPKT = 0x2158, USB_EPA_MAXPKT_2 = 0x215a, USB_EPA_FIFO_CFG = 0x2160, @@ -386,10 +386,10 @@ enum usb_reg { enum sys_reg { DEMOD_CTL = 0x3000, - GPO = 0x3001, - GPI = 0x3002, + GPO = 0x3001, + GPI = 0x3002, GPOE = 0x3003, - GPD = 0x3004, + GPD = 0x3004, SYSINTE = 0x3005, SYSINTS = 0x3006, GP_CFG0 = 0x3007, @@ -406,7 +406,7 @@ enum blocks { SYSB = 2, TUNB = 3, ROMB = 4, - IRB = 5, + IRB = 5, IICB = 6, }; @@ -1056,23 +1056,23 @@ int rtlsdr_set_tuner_gain(rtlsdr_dev_t *dev, int gain) int rtlsdr_set_tuner_gain_ext(rtlsdr_dev_t *dev, int lna_gain, int mixer_gain, int vga_gain) { - int r = 0; + int r = 0; - if (!dev || !dev->tuner) - return -1; + if (!dev || !dev->tuner) + return -1; - if (dev->tuner->set_gain) { - rtlsdr_set_i2c_repeater(dev, 1); - r = r820t_set_gain_ext((void *)dev, lna_gain, mixer_gain, vga_gain); - rtlsdr_set_i2c_repeater(dev, 0); - } + if (dev->tuner->set_gain) { + rtlsdr_set_i2c_repeater(dev, 1); + r = r820t_set_gain_ext((void *)dev, lna_gain, mixer_gain, vga_gain); + rtlsdr_set_i2c_repeater(dev, 0); + } - if (!r) - dev->gain = lna_gain + mixer_gain + vga_gain; - else - dev->gain = 0; + if (!r) + dev->gain = lna_gain + mixer_gain + vga_gain; + else + dev->gain = 0; - return r; + return r; } int rtlsdr_get_tuner_gain(rtlsdr_dev_t *dev) diff --git a/src/rtl_adsb.c b/src/rtl_adsb.c index e611e78..2738a9e 100644 --- a/src/rtl_adsb.c +++ b/src/rtl_adsb.c @@ -76,7 +76,7 @@ int quality = 10; int allowed_errors = 5; FILE *file; int adsb_frame[14]; -#define preamble_len 16 +#define preamble_len 16 #define long_frame 112 #define short_frame 56 diff --git a/src/rtl_fm.c b/src/rtl_fm.c index f00f86a..e96c22f 100644 --- a/src/rtl_fm.c +++ b/src/rtl_fm.c @@ -80,8 +80,8 @@ #define DEFAULT_BUF_LENGTH (1 * 16384) #define MAXIMUM_OVERSAMPLE 16 #define MAXIMUM_BUF_LENGTH (MAXIMUM_OVERSAMPLE * DEFAULT_BUF_LENGTH) -#define AUTO_GAIN -100 -#define BUFFER_DUMP 4096 +#define AUTO_GAIN -100 +#define BUFFER_DUMP 4096 #define FREQUENCIES_LIMIT 1000 diff --git a/src/rtl_power.c b/src/rtl_power.c index aa7a138..c395f99 100644 --- a/src/rtl_power.c +++ b/src/rtl_power.c @@ -69,8 +69,8 @@ #define MAX(x, y) (((x) > (y)) ? (x) : (y)) #define DEFAULT_BUF_LENGTH (1 * 16384) -#define AUTO_GAIN -100 -#define BUFFER_DUMP (1<<12) +#define AUTO_GAIN -100 +#define BUFFER_DUMP (1<<12) #define MAXIMUM_RATE 2800000 #define MINIMUM_RATE 1000000 diff --git a/src/rtl_test.c b/src/rtl_test.c index 9a6cfda..b3b74ba 100644 --- a/src/rtl_test.c +++ b/src/rtl_test.c @@ -48,7 +48,7 @@ #define MINIMAL_BUF_LENGTH 512 #define MAXIMAL_BUF_LENGTH (256 * 16384) -#define MHZ(x) ((x)*1000*1000) +#define MHZ(x) ((x)*1000*1000) #define PPM_DURATION 10 #define PPM_DUMP_TIME 5 diff --git a/src/tuner_e4k.c b/src/tuner_e4k.c index 400e745..c7c13bc 100644 --- a/src/tuner_e4k.c +++ b/src/tuner_e4k.c @@ -342,7 +342,7 @@ int e4k_if_filter_bw_get(struct e4k_state *e4k, enum e4k_if_filter filter) #define E4K_FVCO_MIN_KHZ 2600000 /* 2.6 GHz */ #define E4K_FVCO_MAX_KHZ 3900000 /* 3.9 GHz */ -#define E4K_PLL_Y 65536 +#define E4K_PLL_Y 65536 #ifdef OUT_OF_SPEC #define E4K_FLO_MIN_MHZ 50 @@ -646,10 +646,10 @@ static const struct reg_field if_stage_gain_regs[] = { static const int32_t lnagain[] = { -50, 0, -25, 1, - 0, 4, - 25, 5, - 50, 6, - 75, 7, + 0, 4, + 25, 5, + 50, 6, + 75, 7, 100, 8, 125, 9, 150, 10, diff --git a/src/tuner_fc0013.c b/src/tuner_fc0013.c index 78b696e..8c4b365 100644 --- a/src/tuner_fc0013.c +++ b/src/tuner_fc0013.c @@ -455,14 +455,14 @@ int fc0013_lna_gains[] ={ -60, 0x07, -58, 0x01, -54, 0x06, - 58, 0x0f, - 61, 0x0e, - 63, 0x0d, - 65, 0x0c, - 67, 0x0b, - 68, 0x0a, - 70, 0x09, - 71, 0x08, + 58, 0x0f, + 61, 0x0e, + 63, 0x0d, + 65, 0x0c, + 67, 0x0b, + 68, 0x0a, + 70, 0x09, + 71, 0x08, 179, 0x17, 181, 0x16, 182, 0x15, diff --git a/src/tuner_fc2580.c b/src/tuner_fc2580.c index d2eeba5..ca233fb 100644 --- a/src/tuner_fc2580.c +++ b/src/tuner_fc2580.c @@ -44,10 +44,7 @@ fc2580_fci_result_type fc2580_i2c_read(void *pTuner, unsigned char reg, unsigned return FC2580_FCI_SUCCESS; } -int -fc2580_Initialize( - void *pTuner - ) +int fc2580_Initialize(void *pTuner) { int AgcMode; unsigned int CrystalFreqKhz; @@ -70,11 +67,7 @@ error_status_initialize_tuner: return FUNCTION_ERROR; } -int -fc2580_SetRfFreqHz( - void *pTuner, - unsigned long RfFreqHz - ) +int fc2580_SetRfFreqHz(void *pTuner, unsigned long RfFreqHz) { unsigned int RfFreqKhz; unsigned int CrystalFreqKhz; @@ -99,11 +92,7 @@ error_status_set_tuner_rf_frequency: @brief Set FC2580 tuner bandwidth mode. */ -int -fc2580_SetBandwidthMode( - void *pTuner, - int BandwidthMode - ) +int fc2580_SetBandwidthMode(void *pTuner, int BandwidthMode) { unsigned int CrystalFreqKhz; @@ -143,7 +132,7 @@ void fc2580_wait_msec(void *pTuner, int a) 2 : Voltage Control Mode ==============================================================================*/ -fc2580_fci_result_type fc2580_set_init( void *pTuner, int ifagc_mode, unsigned int freq_xtal ) +fc2580_fci_result_type fc2580_set_init(void *pTuner, int ifagc_mode, unsigned int freq_xtal) { fc2580_fci_result_type result = FC2580_FCI_SUCCESS; @@ -192,14 +181,14 @@ fc2580_fci_result_type fc2580_set_init( void *pTuner, int ifagc_mode, unsigned i ex) 2.6GHz = 2600000 ==============================================================================*/ -fc2580_fci_result_type fc2580_set_freq( void *pTuner, unsigned int f_lo, unsigned int freq_xtal ) +fc2580_fci_result_type fc2580_set_freq(void *pTuner, unsigned int f_lo, unsigned int freq_xtal) { unsigned int f_diff, f_diff_shifted, n_val, k_val; unsigned int f_vco, r_val, f_comp; unsigned char pre_shift_bits = 4;// number of preshift to prevent overflow in shifting f_diff to f_diff_shifted unsigned char data_0x18; unsigned char data_0x02 = (USE_EXT_CLK<<5)|0x0E; - + fc2580_band_type band = ( f_lo > 1000000 )? FC2580_L_BAND : ( f_lo > 400000 )? FC2580_UHF_BAND : FC2580_VHF_BAND; fc2580_fci_result_type result = FC2580_FCI_SUCCESS; @@ -208,19 +197,19 @@ fc2580_fci_result_type fc2580_set_freq( void *pTuner, unsigned int f_lo, unsigne r_val = ( f_vco >= 2*76*freq_xtal )? 1 : ( f_vco >= 76*freq_xtal )? 2 : 4; f_comp = freq_xtal/r_val; n_val = ( f_vco / 2 ) / f_comp; - + f_diff = f_vco - 2* f_comp * n_val; f_diff_shifted = f_diff << ( 20 - pre_shift_bits ); k_val = f_diff_shifted / ( ( 2* f_comp ) >> pre_shift_bits ); - + if( f_diff_shifted - k_val * ( ( 2* f_comp ) >> pre_shift_bits ) >= ( f_comp >> pre_shift_bits ) ) k_val = k_val + 1; - + if( f_vco >= BORDER_FREQ ) //Select VCO Band data_0x02 = data_0x02 | 0x08; //0x02[3] = 1; else data_0x02 = data_0x02 & 0xF7; //0x02[3] = 0; - + // if( band != curr_band ) { switch(band) { @@ -237,7 +226,7 @@ fc2580_fci_result_type fc2580_set_freq( void *pTuner, unsigned int f_lo, unsigne if( f_lo < 538000 ) result &= fc2580_i2c_write(pTuner, 0x5F, 0x13); - else + else result &= fc2580_i2c_write(pTuner, 0x5F, 0x15); if( f_lo < 538000 ) @@ -345,7 +334,7 @@ fc2580_fci_result_type fc2580_set_freq( void *pTuner, unsigned int f_lo, unsigne //A command about UHF LNA Load Cap if( band == FC2580_UHF_BAND ) result &= fc2580_i2c_write(pTuner, 0x2D, ( f_lo <= (unsigned int)794000 )? 0x9F : 0x8F ); //LNA_OUT_CAP - + return result; } @@ -366,10 +355,10 @@ fc2580_fci_result_type fc2580_set_freq( void *pTuner, unsigned int f_lo, unsigne 6 : 6MHz (Bandwidth 6MHz) 7 : 6.8MHz (Bandwidth 7MHz) 8 : 7.8MHz (Bandwidth 8MHz) - + ==============================================================================*/ -fc2580_fci_result_type fc2580_set_filter( void *pTuner, unsigned char filter_bw, unsigned int freq_xtal ) +fc2580_fci_result_type fc2580_set_filter(void *pTuner, unsigned char filter_bw, unsigned int freq_xtal) { unsigned char cal_mon = 0, i; fc2580_fci_result_type result = FC2580_FCI_SUCCESS; @@ -403,7 +392,7 @@ fc2580_fci_result_type fc2580_set_filter( void *pTuner, unsigned char filter_bw, result &= fc2580_i2c_write(pTuner, 0x2E, 0x09); } - + for(i=0; i<5; i++) { fc2580_wait_msec(pTuner, 5);//wait 5ms @@ -426,7 +415,7 @@ fc2580_fci_result_type fc2580_set_filter( void *pTuner, unsigned char filter_bw, fc2580 RSSI function This function is a generic function which returns fc2580's - + current RSSI value. @@ -438,7 +427,7 @@ fc2580_fci_result_type fc2580_set_filter( void *pTuner, unsigned char filter_bw, ==============================================================================*/ //int fc2580_get_rssi(void) { -// +// // unsigned char s_lna, s_rfvga, s_cfs, s_ifvga; // int ofs_lna, ofs_rfvga, ofs_csf, ofs_ifvga, rssi; // @@ -446,9 +435,9 @@ fc2580_fci_result_type fc2580_set_filter( void *pTuner, unsigned char filter_bw, // fc2580_i2c_read(0x72, &s_rfvga ); // fc2580_i2c_read(0x73, &s_cfs ); // fc2580_i2c_read(0x74, &s_ifvga ); -// // -// ofs_lna = +// +// ofs_lna = // (curr_band==FC2580_UHF_BAND)? // (s_lna==0)? 0 : // (s_lna==1)? -6 : @@ -470,18 +459,18 @@ fc2580_fci_result_type fc2580_set_filter( void *pTuner, unsigned char filter_bw, // ofs_ifvga = s_ifvga/4; // // return rssi = ofs_lna+ofs_rfvga+ofs_csf+ofs_ifvga+OFS_RSSI; -// +// //} /*============================================================================== fc2580 Xtal frequency Setting - This function is a generic function which sets - + This function is a generic function which sets + the frequency of xtal. - + - + frequency frequency value of internal(external) Xtal(clock) in kHz unit. diff --git a/src/tuner_r82xx.c b/src/tuner_r82xx.c index eb62352..3a25c34 100644 --- a/src/tuner_r82xx.c +++ b/src/tuner_r82xx.c @@ -39,7 +39,7 @@ /* Those initial values start from REG_SHADOW_START */ static const uint8_t r82xx_init_array[NUM_REGS] = { - 0x83, 0x32, 0x75, /* 05 to 07 */ + 0x83, 0x32, 0x75, /* 05 to 07 */ 0xc0, 0x40, 0xd6, 0x6c, /* 08 to 0b */ 0xf5, 0x63, 0x75, 0x68, /* 0c to 0f */ 0x6c, 0x83, 0x80, 0x00, /* 10 to 13 */ @@ -51,173 +51,173 @@ static const uint8_t r82xx_init_array[NUM_REGS] = { /* Tuner frequency ranges */ static const struct r82xx_freq_range freq_ranges[] = { { - /* .freq = */ 0, /* Start freq, in MHz */ - /* .open_d = */ 0x08, /* low */ + /* .freq = */ 0, /* Start freq, in MHz */ + /* .open_d = */ 0x08, /* low */ /* .rf_mux_ploy = */ 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */ - /* .tf_c = */ 0xdf, /* R27[7:0] band2,band0 */ + /* .tf_c = */ 0xdf, /* R27[7:0] band2,band0 */ /* .xtal_cap20p = */ 0x02, /* R16[1:0] 20pF (10) */ /* .xtal_cap10p = */ 0x01, - /* .xtal_cap0p = */ 0x00, + /* .xtal_cap0p = */ 0x00, }, { - /* .freq = */ 50, /* Start freq, in MHz */ - /* .open_d = */ 0x08, /* low */ + /* .freq = */ 50, /* Start freq, in MHz */ + /* .open_d = */ 0x08, /* low */ /* .rf_mux_ploy = */ 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */ - /* .tf_c = */ 0xbe, /* R27[7:0] band4,band1 */ + /* .tf_c = */ 0xbe, /* R27[7:0] band4,band1 */ /* .xtal_cap20p = */ 0x02, /* R16[1:0] 20pF (10) */ /* .xtal_cap10p = */ 0x01, - /* .xtal_cap0p = */ 0x00, + /* .xtal_cap0p = */ 0x00, }, { - /* .freq = */ 55, /* Start freq, in MHz */ - /* .open_d = */ 0x08, /* low */ + /* .freq = */ 55, /* Start freq, in MHz */ + /* .open_d = */ 0x08, /* low */ /* .rf_mux_ploy = */ 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */ - /* .tf_c = */ 0x8b, /* R27[7:0] band7,band4 */ + /* .tf_c = */ 0x8b, /* R27[7:0] band7,band4 */ /* .xtal_cap20p = */ 0x02, /* R16[1:0] 20pF (10) */ /* .xtal_cap10p = */ 0x01, - /* .xtal_cap0p = */ 0x00, + /* .xtal_cap0p = */ 0x00, }, { - /* .freq = */ 60, /* Start freq, in MHz */ - /* .open_d = */ 0x08, /* low */ + /* .freq = */ 60, /* Start freq, in MHz */ + /* .open_d = */ 0x08, /* low */ /* .rf_mux_ploy = */ 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */ - /* .tf_c = */ 0x7b, /* R27[7:0] band8,band4 */ + /* .tf_c = */ 0x7b, /* R27[7:0] band8,band4 */ /* .xtal_cap20p = */ 0x02, /* R16[1:0] 20pF (10) */ /* .xtal_cap10p = */ 0x01, - /* .xtal_cap0p = */ 0x00, + /* .xtal_cap0p = */ 0x00, }, { - /* .freq = */ 65, /* Start freq, in MHz */ - /* .open_d = */ 0x08, /* low */ + /* .freq = */ 65, /* Start freq, in MHz */ + /* .open_d = */ 0x08, /* low */ /* .rf_mux_ploy = */ 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */ - /* .tf_c = */ 0x69, /* R27[7:0] band9,band6 */ + /* .tf_c = */ 0x69, /* R27[7:0] band9,band6 */ /* .xtal_cap20p = */ 0x02, /* R16[1:0] 20pF (10) */ /* .xtal_cap10p = */ 0x01, - /* .xtal_cap0p = */ 0x00, + /* .xtal_cap0p = */ 0x00, }, { - /* .freq = */ 70, /* Start freq, in MHz */ - /* .open_d = */ 0x08, /* low */ + /* .freq = */ 70, /* Start freq, in MHz */ + /* .open_d = */ 0x08, /* low */ /* .rf_mux_ploy = */ 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */ - /* .tf_c = */ 0x58, /* R27[7:0] band10,band7 */ + /* .tf_c = */ 0x58, /* R27[7:0] band10,band7 */ /* .xtal_cap20p = */ 0x02, /* R16[1:0] 20pF (10) */ /* .xtal_cap10p = */ 0x01, - /* .xtal_cap0p = */ 0x00, + /* .xtal_cap0p = */ 0x00, }, { - /* .freq = */ 75, /* Start freq, in MHz */ - /* .open_d = */ 0x00, /* high */ + /* .freq = */ 75, /* Start freq, in MHz */ + /* .open_d = */ 0x00, /* high */ /* .rf_mux_ploy = */ 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */ - /* .tf_c = */ 0x44, /* R27[7:0] band11,band11 */ + /* .tf_c = */ 0x44, /* R27[7:0] band11,band11 */ /* .xtal_cap20p = */ 0x02, /* R16[1:0] 20pF (10) */ /* .xtal_cap10p = */ 0x01, - /* .xtal_cap0p = */ 0x00, + /* .xtal_cap0p = */ 0x00, }, { - /* .freq = */ 80, /* Start freq, in MHz */ - /* .open_d = */ 0x00, /* high */ + /* .freq = */ 80, /* Start freq, in MHz */ + /* .open_d = */ 0x00, /* high */ /* .rf_mux_ploy = */ 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */ - /* .tf_c = */ 0x44, /* R27[7:0] band11,band11 */ + /* .tf_c = */ 0x44, /* R27[7:0] band11,band11 */ /* .xtal_cap20p = */ 0x02, /* R16[1:0] 20pF (10) */ /* .xtal_cap10p = */ 0x01, - /* .xtal_cap0p = */ 0x00, + /* .xtal_cap0p = */ 0x00, }, { - /* .freq = */ 90, /* Start freq, in MHz */ - /* .open_d = */ 0x00, /* high */ + /* .freq = */ 90, /* Start freq, in MHz */ + /* .open_d = */ 0x00, /* high */ /* .rf_mux_ploy = */ 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */ - /* .tf_c = */ 0x34, /* R27[7:0] band12,band11 */ + /* .tf_c = */ 0x34, /* R27[7:0] band12,band11 */ /* .xtal_cap20p = */ 0x01, /* R16[1:0] 10pF (01) */ /* .xtal_cap10p = */ 0x01, - /* .xtal_cap0p = */ 0x00, + /* .xtal_cap0p = */ 0x00, }, { - /* .freq = */ 100, /* Start freq, in MHz */ - /* .open_d = */ 0x00, /* high */ + /* .freq = */ 100, /* Start freq, in MHz */ + /* .open_d = */ 0x00, /* high */ /* .rf_mux_ploy = */ 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */ - /* .tf_c = */ 0x34, /* R27[7:0] band12,band11 */ + /* .tf_c = */ 0x34, /* R27[7:0] band12,band11 */ /* .xtal_cap20p = */ 0x01, /* R16[1:0] 10pF (01) */ /* .xtal_cap10p = */ 0x01, - /* .xtal_cap0p = */ 0x00, + /* .xtal_cap0p = */ 0x00, }, { - /* .freq = */ 110, /* Start freq, in MHz */ - /* .open_d = */ 0x00, /* high */ + /* .freq = */ 110, /* Start freq, in MHz */ + /* .open_d = */ 0x00, /* high */ /* .rf_mux_ploy = */ 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */ - /* .tf_c = */ 0x24, /* R27[7:0] band13,band11 */ + /* .tf_c = */ 0x24, /* R27[7:0] band13,band11 */ /* .xtal_cap20p = */ 0x01, /* R16[1:0] 10pF (01) */ /* .xtal_cap10p = */ 0x01, - /* .xtal_cap0p = */ 0x00, + /* .xtal_cap0p = */ 0x00, }, { - /* .freq = */ 120, /* Start freq, in MHz */ - /* .open_d = */ 0x00, /* high */ + /* .freq = */ 120, /* Start freq, in MHz */ + /* .open_d = */ 0x00, /* high */ /* .rf_mux_ploy = */ 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */ - /* .tf_c = */ 0x24, /* R27[7:0] band13,band11 */ + /* .tf_c = */ 0x24, /* R27[7:0] band13,band11 */ /* .xtal_cap20p = */ 0x01, /* R16[1:0] 10pF (01) */ /* .xtal_cap10p = */ 0x01, - /* .xtal_cap0p = */ 0x00, + /* .xtal_cap0p = */ 0x00, }, { - /* .freq = */ 140, /* Start freq, in MHz */ - /* .open_d = */ 0x00, /* high */ + /* .freq = */ 140, /* Start freq, in MHz */ + /* .open_d = */ 0x00, /* high */ /* .rf_mux_ploy = */ 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */ - /* .tf_c = */ 0x14, /* R27[7:0] band14,band11 */ + /* .tf_c = */ 0x14, /* R27[7:0] band14,band11 */ /* .xtal_cap20p = */ 0x01, /* R16[1:0] 10pF (01) */ /* .xtal_cap10p = */ 0x01, - /* .xtal_cap0p = */ 0x00, + /* .xtal_cap0p = */ 0x00, }, { - /* .freq = */ 180, /* Start freq, in MHz */ - /* .open_d = */ 0x00, /* high */ + /* .freq = */ 180, /* Start freq, in MHz */ + /* .open_d = */ 0x00, /* high */ /* .rf_mux_ploy = */ 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */ - /* .tf_c = */ 0x13, /* R27[7:0] band14,band12 */ + /* .tf_c = */ 0x13, /* R27[7:0] band14,band12 */ /* .xtal_cap20p = */ 0x00, /* R16[1:0] 0pF (00) */ /* .xtal_cap10p = */ 0x00, - /* .xtal_cap0p = */ 0x00, + /* .xtal_cap0p = */ 0x00, }, { - /* .freq = */ 220, /* Start freq, in MHz */ - /* .open_d = */ 0x00, /* high */ + /* .freq = */ 220, /* Start freq, in MHz */ + /* .open_d = */ 0x00, /* high */ /* .rf_mux_ploy = */ 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */ - /* .tf_c = */ 0x13, /* R27[7:0] band14,band12 */ + /* .tf_c = */ 0x13, /* R27[7:0] band14,band12 */ /* .xtal_cap20p = */ 0x00, /* R16[1:0] 0pF (00) */ /* .xtal_cap10p = */ 0x00, - /* .xtal_cap0p = */ 0x00, + /* .xtal_cap0p = */ 0x00, }, { - /* .freq = */ 250, /* Start freq, in MHz */ - /* .open_d = */ 0x00, /* high */ + /* .freq = */ 250, /* Start freq, in MHz */ + /* .open_d = */ 0x00, /* high */ /* .rf_mux_ploy = */ 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */ - /* .tf_c = */ 0x11, /* R27[7:0] highest,highest */ + /* .tf_c = */ 0x11, /* R27[7:0] highest,highest */ /* .xtal_cap20p = */ 0x00, /* R16[1:0] 0pF (00) */ /* .xtal_cap10p = */ 0x00, - /* .xtal_cap0p = */ 0x00, + /* .xtal_cap0p = */ 0x00, }, { - /* .freq = */ 280, /* Start freq, in MHz */ - /* .open_d = */ 0x00, /* high */ + /* .freq = */ 280, /* Start freq, in MHz */ + /* .open_d = */ 0x00, /* high */ /* .rf_mux_ploy = */ 0x02, /* R26[7:6]=0 (LPF) R26[1:0]=2 (low) */ - /* .tf_c = */ 0x00, /* R27[7:0] highest,highest */ + /* .tf_c = */ 0x00, /* R27[7:0] highest,highest */ /* .xtal_cap20p = */ 0x00, /* R16[1:0] 0pF (00) */ /* .xtal_cap10p = */ 0x00, - /* .xtal_cap0p = */ 0x00, + /* .xtal_cap0p = */ 0x00, }, { - /* .freq = */ 310, /* Start freq, in MHz */ - /* .open_d = */ 0x00, /* high */ + /* .freq = */ 310, /* Start freq, in MHz */ + /* .open_d = */ 0x00, /* high */ /* .rf_mux_ploy = */ 0x41, /* R26[7:6]=1 (bypass) R26[1:0]=1 (middle) */ - /* .tf_c = */ 0x00, /* R27[7:0] highest,highest */ + /* .tf_c = */ 0x00, /* R27[7:0] highest,highest */ /* .xtal_cap20p = */ 0x00, /* R16[1:0] 0pF (00) */ /* .xtal_cap10p = */ 0x00, - /* .xtal_cap0p = */ 0x00, + /* .xtal_cap0p = */ 0x00, }, { - /* .freq = */ 450, /* Start freq, in MHz */ - /* .open_d = */ 0x00, /* high */ + /* .freq = */ 450, /* Start freq, in MHz */ + /* .open_d = */ 0x00, /* high */ /* .rf_mux_ploy = */ 0x41, /* R26[7:6]=1 (bypass) R26[1:0]=1 (middle) */ - /* .tf_c = */ 0x00, /* R27[7:0] highest,highest */ + /* .tf_c = */ 0x00, /* R27[7:0] highest,highest */ /* .xtal_cap20p = */ 0x00, /* R16[1:0] 0pF (00) */ /* .xtal_cap10p = */ 0x00, - /* .xtal_cap0p = */ 0x00, + /* .xtal_cap0p = */ 0x00, }, { - /* .freq = */ 588, /* Start freq, in MHz */ - /* .open_d = */ 0x00, /* high */ + /* .freq = */ 588, /* Start freq, in MHz */ + /* .open_d = */ 0x00, /* high */ /* .rf_mux_ploy = */ 0x40, /* R26[7:6]=1 (bypass) R26[1:0]=0 (highest) */ - /* .tf_c = */ 0x00, /* R27[7:0] highest,highest */ + /* .tf_c = */ 0x00, /* R27[7:0] highest,highest */ /* .xtal_cap20p = */ 0x00, /* R16[1:0] 0pF (00) */ /* .xtal_cap10p = */ 0x00, - /* .xtal_cap0p = */ 0x00, + /* .xtal_cap0p = */ 0x00, }, { - /* .freq = */ 650, /* Start freq, in MHz */ - /* .open_d = */ 0x00, /* high */ + /* .freq = */ 650, /* Start freq, in MHz */ + /* .open_d = */ 0x00, /* high */ /* .rf_mux_ploy = */ 0x40, /* R26[7:6]=1 (bypass) R26[1:0]=0 (highest) */ - /* .tf_c = */ 0x00, /* R27[7:0] highest,highest */ + /* .tf_c = */ 0x00, /* R27[7:0] highest,highest */ /* .xtal_cap20p = */ 0x00, /* R16[1:0] 0pF (00) */ /* .xtal_cap10p = */ 0x00, - /* .xtal_cap0p = */ 0x00, + /* .xtal_cap0p = */ 0x00, } };