mirror of https://github.com/openwrt/openwrt.git
realtek: dsa: rtl838x: drop untagged frames without PVID
e4c5f850ee ("realtek: dsa: drop untagged frames of ports without
PVID") left the other families as they were until tested. RTL838x has
the same bug: a port without PVID in a VLAN-filtering bridge sends its
untagged and priority tagged frames to the other ports of the bridge.
Set vlan_port_aft for RTL838x too. VLAN_PORT_ACCEPT_FRAME_TYPE (0x3A00
+ 4 * port) has the same four fields as on RTL839x (vendor SDK).
RTL838x has no 802.1ad bridge offload, so only the inner untagged bit
is cleared. This needs the slow protocol trap of the previous commit:
without it LACPDUs reach the CPU only as flooded frames, and a port
that accepts only tagged frames drops them, 0 of 5 on the bench.
ZyXEL GS1900-8 A1 (RTL8380M), lan2 tagged only in VLAN 3, lan1 an
access port in VLAN 1: on main untagged and priority tagged ARP from
the host behind lan2 left lan1 untagged, 3 of 3 each; now none does.
STP, LLDP, LACP, EAPOL and VLAN 3 tagged frames on lan2 still reach the
CPU, 5 of 5 each. With a PVID on lan2, and in a bridge without VLAN
filtering, the ARP leaves lan1 untagged; as standalone ports both
accept all frames again.
Assisted-by: Claude:claude-opus-5-5
Signed-off-by: Gennaro Cimmino <gcimmino@rayonra.net>
Link: https://github.com/openwrt/openwrt/pull/26039
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
pull/26039/head
parent
1fde9f83dc
commit
c4abc00778
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@ -57,6 +57,7 @@
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#define RTL838X_SPCL_TRAP_EAPOL_CTRL (0x6988)
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#define RTL838X_SPCL_TRAP_SWITCH_MAC_CTRL (0x6998)
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#define RTL838X_VLAN_PORT_AFT (0x3A00)
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/* Switch interrupts */
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#define RTL838X_IMR_GLB (0x1100)
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@ -251,6 +252,7 @@ const struct rtldsa_config rtldsa_838x_cfg = {
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.vlan_profile_get = otto_vlan_838x_profile_get,
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.vlan_profile_dump = otto_vlan_838x_profile_dump,
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.vlan_profile_setup = otto_vlan_838x_profile_setup,
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.vlan_port_aft = RTL838X_VLAN_PORT_AFT,
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.vlan_fwd_on_inner = otto_vlan_838x_port_forward_on_inner,
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.set_vlan_igr_filter = rtl838x_set_igr_filter,
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.set_vlan_egr_filter = rtl838x_set_egr_filter,
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