Enable ADC0 pre-trigger via the LPTMR to match the PDB.

48kHz
Jonathan Naylor 2016-12-14 09:12:59 +00:00 committed by GitHub
parent f831b64518
commit 2747e2979d
1 changed files with 1 additions and 0 deletions

View File

@ -123,6 +123,7 @@ void CIO::startInt()
#if defined(EXTERNAL_OSC)
// Set ADC0 to trigger from the LPTMR at 24 kHz
SIM_SOPT7 = SIM_SOPT7_ADC0ALTTRGEN | // Enable ADC0 alternate trigger
SIM_SOPT7_ADC0PRETRGSEL | // Enable ADC0 pre-trigger
SIM_SOPT7_ADC0TRGSEL(14); // Trigger ADC0 by LPTMR0
CORE_PIN13_CONFIG = PORT_PCR_MUX(3);