From df5ab3de60e5f4ae1f8ce0b4a00f6218213b4a14 Mon Sep 17 00:00:00 2001 From: phl0 Date: Thu, 19 Jan 2017 14:07:30 +0100 Subject: [PATCH 1/7] Refactor IOSTM.cpp --- IOSTM.cpp | 761 +++++++++++++++++++++++++++--------------------------- 1 file changed, 380 insertions(+), 381 deletions(-) diff --git a/IOSTM.cpp b/IOSTM.cpp index 2a98c68..13c2665 100644 --- a/IOSTM.cpp +++ b/IOSTM.cpp @@ -29,70 +29,70 @@ Pin definitions for STM32F4 Discovery Board: PTT PB13 output -COSLED PA7 output -LED PD15 output -COS PA5 input +COSLED PA7 output +LED PD15 output +COS PA5 input -DSTAR PD12 output -DMR PD13 output -YSF PD14 output -P25 PD11 output +DSTAR PD12 output +DMR PD13 output +YSF PD14 output +P25 PD11 output -RX PA0 analog input -RSSI PA1 analog input -TX PA4 analog output +RX PA0 analog input +RSSI PA1 analog input +TX PA4 analog output EXT_CLK PA15 input */ -#define PIN_COS GPIO_Pin_5 -#define PORT_COS GPIOA -#define RCC_Per_COS RCC_AHB1Periph_GPIOA +#define PIN_COS GPIO_Pin_5 +#define PORT_COS GPIOA +#define RCC_Per_COS RCC_AHB1Periph_GPIOA -#define PIN_PTT GPIO_Pin_13 -#define PORT_PTT GPIOB -#define RCC_Per_PTT RCC_AHB1Periph_GPIOB +#define PIN_PTT GPIO_Pin_13 +#define PORT_PTT GPIOB +#define RCC_Per_PTT RCC_AHB1Periph_GPIOB -#define PIN_COSLED GPIO_Pin_7 -#define PORT_COSLED GPIOA -#define RCC_Per_COSLED RCC_AHB1Periph_GPIOA +#define PIN_COSLED GPIO_Pin_7 +#define PORT_COSLED GPIOA +#define RCC_Per_COSLED RCC_AHB1Periph_GPIOA -#define PIN_LED GPIO_Pin_15 -#define PORT_LED GPIOD -#define RCC_Per_LED RCC_AHB1Periph_GPIOD +#define PIN_LED GPIO_Pin_15 +#define PORT_LED GPIOD +#define RCC_Per_LED RCC_AHB1Periph_GPIOD -#define PIN_P25 GPIO_Pin_11 -#define PORT_P25 GPIOD -#define RCC_Per_P25 RCC_AHB1Periph_GPIOD +#define PIN_P25 GPIO_Pin_11 +#define PORT_P25 GPIOD +#define RCC_Per_P25 RCC_AHB1Periph_GPIOD -#define PIN_DSTAR GPIO_Pin_12 -#define PORT_DSTAR GPIOD -#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOD +#define PIN_DSTARcw GPIO_Pin_12 +#define PORT_DSTARcw GPIOD +#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOD -#define PIN_DMR GPIO_Pin_13 -#define PORT_DMR GPIOD -#define RCC_Per_DMR RCC_AHB1Periph_GPIOD +#define PIN_DMR GPIO_Pin_13 +#define PORT_DMR GPIOD +#define RCC_Per_DMR RCC_AHB1Periph_GPIOD -#define PIN_YSF GPIO_Pin_14 -#define PORT_YSF GPIOD -#define RCC_Per_YSF RCC_AHB1Periph_GPIOD +#define PIN_YSF GPIO_Pin_14 +#define PORT_YSF GPIOD +#define RCC_Per_YSF RCC_AHB1Periph_GPIOD -#define PIN_EXT_CLK GPIO_Pin_15 -#define SRC_EXT_CLK GPIO_PinSource15 -#define PORT_EXT_CLK GPIOA +#define PIN_EXT_CLK GPIO_Pin_15 +#define SRC_EXT_CLK GPIO_PinSource15 +#define PORT_EXT_CLK GPIOA -#define PIN_RX GPIO_Pin_0 -#define PIN_RX_CH ADC_Channel_0 -#define PORT_RX GPIOA -#define RCC_Per_RX RCC_AHB1Periph_GPIOA +#define PIN_RX GPIO_Pin_0 +#define PIN_RX_CH ADC_Channel_0 +#define PORT_RX GPIOA +#define RCC_Per_RX RCC_AHB1Periph_GPIOA -#define PIN_RSSI GPIO_Pin_1 -#define PIN_RSSI_CH ADC_Channel_1 -#define PORT_RSSI GPIOA -#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA +#define PIN_RSSI GPIO_Pin_1 +#define PIN_RSSI_CH ADC_Channel_1 +#define PORT_RSSI GPIOA +#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA -#define PIN_TX GPIO_Pin_4 -#define PIN_TX_CH DAC_Channel_1 +#define PIN_TX GPIO_Pin_4 +#define PIN_TX_CH DAC_Channel_1 #elif defined(STM32F4_PI) /* @@ -100,69 +100,69 @@ Pin definitions for STM32F4 Pi Board: PTT PB13 output COSLED PB14 output -LED PB15 output -COS PC0 input +LED PB15 output +COS PC0 input -DSTAR PC7 output -DMR PC8 output -YSF PA8 output -P25 PC9 output +DSTAR PC7 output +DMR PC8 output +YSF PA8 output +P25 PC9 output -RX PA0 analog input -RSSI PA7 analog input -TX PA4 analog output +RX PA0 analog input +RSSI PA7 analog input +TX PA4 analog output EXT_CLK PA15 input */ -#define PIN_COS GPIO_Pin_0 -#define PORT_COS GPIOC -#define RCC_Per_COS RCC_AHB1Periph_GPIOC +#define PIN_COS GPIO_Pin_0 +#define PORT_COS GPIOC +#define RCC_Per_COS RCC_AHB1Periph_GPIOC -#define PIN_PTT GPIO_Pin_13 -#define PORT_PTT GPIOB -#define RCC_Per_PTT RCC_AHB1Periph_GPIOB +#define PIN_PTT GPIO_Pin_13 +#define PORT_PTT GPIOB +#define RCC_Per_PTT RCC_AHB1Periph_GPIOB -#define PIN_COSLED GPIO_Pin_14 -#define PORT_COSLED GPIOB -#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB +#define PIN_COSLED GPIO_Pin_14 +#define PORT_COSLED GPIOB +#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB -#define PIN_LED GPIO_Pin_15 -#define PORT_LED GPIOB -#define RCC_Per_LED RCC_AHB1Periph_GPIOB +#define PIN_LED GPIO_Pin_15 +#define PORT_LED GPIOB +#define RCC_Per_LED RCC_AHB1Periph_GPIOB -#define PIN_P25 GPIO_Pin_9 -#define PORT_P25 GPIOC -#define RCC_Per_P25 RCC_AHB1Periph_GPIOC +#define PIN_P25 GPIO_Pin_9 +#define PORT_P25 GPIOC +#define RCC_Per_P25 RCC_AHB1Periph_GPIOC -#define PIN_DSTAR GPIO_Pin_7 -#define PORT_DSTAR GPIOC -#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC +#define PIN_DSTAR GPIO_Pin_7 +#define PORT_DSTAR GPIOC +#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC -#define PIN_DMR GPIO_Pin_8 -#define PORT_DMR GPIOC -#define RCC_Per_DMR RCC_AHB1Periph_GPIOC +#define PIN_DMR GPIO_Pin_8 +#define PORT_DMR GPIOC +#define RCC_Per_DMR RCC_AHB1Periph_GPIOC -#define PIN_YSF GPIO_Pin_8 -#define PORT_YSF GPIOA -#define RCC_Per_YSF RCC_AHB1Periph_GPIOA +#define PIN_YSF GPIO_Pin_8 +#define PORT_YSF GPIOA +#define RCC_Per_YSF RCC_AHB1Periph_GPIOA -#define PIN_EXT_CLK GPIO_Pin_15 -#define SRC_EXT_CLK GPIO_PinSource15 -#define PORT_EXT_CLK GPIOA +#define PIN_EXT_CLK GPIO_Pin_15 +#define SRC_EXT_CLK GPIO_PinSource15 +#define PORT_EXT_CLK GPIOA -#define PIN_RX GPIO_Pin_0 -#define PIN_RX_CH ADC_Channel_0 -#define PORT_RX GPIOA -#define RCC_Per_RX RCC_AHB1Periph_GPIOA +#define PIN_RX GPIO_Pin_0 +#define PIN_RX_CH ADC_Channel_0 +#define PORT_RX GPIOA +#define RCC_Per_RX RCC_AHB1Periph_GPIOA -#define PIN_RSSI GPIO_Pin_7 -#define PIN_RSSI_CH ADC_Channel_7 -#define PORT_RSSI GPIOA -#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA +#define PIN_RSSI GPIO_Pin_7 +#define PIN_RSSI_CH ADC_Channel_7 +#define PORT_RSSI GPIOA +#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA -#define PIN_TX GPIO_Pin_4 -#define PIN_TX_CH DAC_Channel_1 +#define PIN_TX GPIO_Pin_4 +#define PIN_TX_CH DAC_Channel_1 #elif defined(STM32F4_NUCLEO) @@ -170,141 +170,141 @@ EXT_CLK PA15 input /* Pin definitions for STM32F4 Nucleo boards (ST Morpho header): -PTT PB13 output -COSLED PB14 output -LED PA5 output -COS PB15 input +PTT PB13 output +COSLED PB14 output +LED PA5 output +COS PB15 input -DSTAR PB10 output -DMR PB4 output -YSF PB5 output -P25 PB3 output +DSTAR PB10 output +DMR PB4 output +YSF PB5 output +P25 PB3 output -RX PA0 analog input -RSSI PA1 analog input -TX PA4 analog output +RX PA0 analog input +RSSI PA1 analog input +TX PA4 analog output -EXT_CLK PA15 input +EXT_CLK PA15 input */ -#define PIN_COS GPIO_Pin_15 -#define PORT_COS GPIOB -#define RCC_Per_COS RCC_AHB1Periph_GPIOB +#define PIN_COS GPIO_Pin_15 +#define PORT_COS GPIOB +#define RCC_Per_COS RCC_AHB1Periph_GPIOB -#define PIN_PTT GPIO_Pin_13 -#define PORT_PTT GPIOB -#define RCC_Per_PTT RCC_AHB1Periph_GPIOB +#define PIN_PTT GPIO_Pin_13 +#define PORT_PTT GPIOB +#define RCC_Per_PTT RCC_AHB1Periph_GPIOB -#define PIN_COSLED GPIO_Pin_14 -#define PORT_COSLED GPIOB -#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB +#define PIN_COSLED GPIO_Pin_14 +#define PORT_COSLED GPIOB +#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB -#define PIN_LED GPIO_Pin_5 -#define PORT_LED GPIOA -#define RCC_Per_LED RCC_AHB1Periph_GPIOA +#define PIN_LED GPIO_Pin_5 +#define PORT_LED GPIOA +#define RCC_Per_LED RCC_AHB1Periph_GPIOA -#define PIN_P25 GPIO_Pin_3 -#define PORT_P25 GPIOB -#define RCC_Per_P25 RCC_AHB1Periph_GPIOB +#define PIN_P25 GPIO_Pin_3 +#define PORT_P25 GPIOB +#define RCC_Per_P25 RCC_AHB1Periph_GPIOB -#define PIN_DSTAR GPIO_Pin_10 -#define PORT_DSTAR GPIOB -#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB +#define PIN_DSTAR GPIO_Pin_10 +#define PORT_DSTAR GPIOB +#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB -#define PIN_DMR GPIO_Pin_4 -#define PORT_DMR GPIOB -#define RCC_Per_DMR RCC_AHB1Periph_GPIOB +#define PIN_DMR GPIO_Pin_4 +#define PORT_DMR GPIOB +#define RCC_Per_DMR RCC_AHB1Periph_GPIOB -#define PIN_YSF GPIO_Pin_5 -#define PORT_YSF GPIOB -#define RCC_Per_YSF RCC_AHB1Periph_GPIOB +#define PIN_YSF GPIO_Pin_5 +#define PORT_YSF GPIOB +#define RCC_Per_YSF RCC_AHB1Periph_GPIOB -#define PIN_EXT_CLK GPIO_Pin_15 -#define SRC_EXT_CLK GPIO_PinSource15 -#define PORT_EXT_CLK GPIOA +#define PIN_EXT_CLK GPIO_Pin_15 +#define SRC_EXT_CLK GPIO_PinSource15 +#define PORT_EXT_CLK GPIOA -#define PIN_RX GPIO_Pin_0 -#define PIN_RX_CH ADC_Channel_0 -#define PORT_RX GPIOA -#define RCC_Per_RX RCC_AHB1Periph_GPIOA +#define PIN_RX GPIO_Pin_0 +#define PIN_RX_CH ADC_Channel_0 +#define PORT_RX GPIOA +#define RCC_Per_RX RCC_AHB1Periph_GPIOA -#define PIN_RSSI GPIO_Pin_1 -#define PIN_RSSI_CH ADC_Channel_1 -#define PORT_RSSI GPIOA -#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA +#define PIN_RSSI GPIO_Pin_1 +#define PIN_RSSI_CH ADC_Channel_1 +#define PORT_RSSI GPIOA +#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA -#define PIN_TX GPIO_Pin_4 -#define PIN_TX_CH DAC_Channel_1 +#define PIN_TX GPIO_Pin_4 +#define PIN_TX_CH DAC_Channel_1 #elif defined(STM32F4_NUCLEO_ARDUINO_HEADER) /* Pin definitions for STM32F4 Nucleo boards (Arduino header): -PTT PB10 output -COSLED PB3 output -LED PB5 output -COS PB4 input +PTT PB10 output +COSLED PB3 output +LED PB5 output +COS PB4 input -DSTAR PA1 output -DMR PA4 output -YSF PB0 output -P25 PC1 output +DSTAR PA1 output +DMR PA4 output +YSF PB0 output +P25 PC1 output -RX PA0 analog input -RSSI PC0 analog input -TX PA5 analog output +RX PA0 analog input +RSSI PC0 analog input +TX PA5 analog output -EXT_CLK PB8 input +EXT_CLK PB8 input */ -#define PIN_COS GPIO_Pin_4 -#define PORT_COS GPIOB -#define RCC_Per_COS RCC_AHB1Periph_GPIOB +#define PIN_COS GPIO_Pin_4 +#define PORT_COS GPIOB +#define RCC_Per_COS RCC_AHB1Periph_GPIOB -#define PIN_PTT GPIO_Pin_10 -#define PORT_PTT GPIOB -#define RCC_Per_PTT RCC_AHB1Periph_GPIOB +#define PIN_PTT GPIO_Pin_10 +#define PORT_PTT GPIOB +#define RCC_Per_PTT RCC_AHB1Periph_GPIOB -#define PIN_COSLED GPIO_Pin_3 -#define PORT_COSLED GPIOB -#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB +#define PIN_COSLED GPIO_Pin_3 +#define PORT_COSLED GPIOB +#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB -#define PIN_LED GPIO_Pin_5 -#define PORT_LED GPIOB -#define RCC_Per_LED RCC_AHB1Periph_GPIOB +#define PIN_LED GPIO_Pin_5 +#define PORT_LED GPIOB +#define RCC_Per_LED RCC_AHB1Periph_GPIOB -#define PIN_P25 GPIO_Pin_1 -#define PORT_P25 GPIOC -#define RCC_Per_P25 RCC_AHB1Periph_GPIOC +#define PIN_P25 GPIO_Pin_1 +#define PORT_P25 GPIOC +#define RCC_Per_P25 RCC_AHB1Periph_GPIOC -#define PIN_DSTAR GPIO_Pin_1 -#define PORT_DSTAR GPIOA -#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOA +#define PIN_DSTAR GPIO_Pin_1 +#define PORT_DSTAR GPIOA +#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOA -#define PIN_DMR GPIO_Pin_4 -#define PORT_DMR GPIOA -#define RCC_Per_DMR RCC_AHB1Periph_GPIOA +#define PIN_DMR GPIO_Pin_4 +#define PORT_DMR GPIOA +#define RCC_Per_DMR RCC_AHB1Periph_GPIOA -#define PIN_YSF GPIO_Pin_0 -#define PORT_YSF GPIOB -#define RCC_Per_YSF RCC_AHB1Periph_GPIOB +#define PIN_YSF GPIO_Pin_0 +#define PORT_YSF GPIOB +#define RCC_Per_YSF RCC_AHB1Periph_GPIOB -#define PIN_EXT_CLK GPIO_Pin_8 -#define SRC_EXT_CLK GPIO_PinSource8 -#define PORT_EXT_CLK GPIOB +#define PIN_EXT_CLK GPIO_Pin_8 +#define SRC_EXT_CLK GPIO_PinSource8 +#define PORT_EXT_CLK GPIOB -#define PIN_RX GPIO_Pin_0 -#define PIN_RX_CH ADC_Channel_0 -#define PORT_RX GPIOA -#define RCC_Per_RX RCC_AHB1Periph_GPIOA +#define PIN_RX GPIO_Pin_0 +#define PIN_RX_CH ADC_Channel_0 +#define PORT_RX GPIOA +#define RCC_Per_RX RCC_AHB1Periph_GPIOA -#define PIN_RSSI GPIO_Pin_0 -#define PIN_RSSI_CH ADC_Channel_10 -#define PORT_RSSI GPIOC -#define RCC_Per_RSSI RCC_AHB1Periph_GPIOC +#define PIN_RSSI GPIO_Pin_0 +#define PIN_RSSI_CH ADC_Channel_10 +#define PORT_RSSI GPIOC +#define RCC_Per_RSSI RCC_AHB1Periph_GPIOC -#define PIN_TX GPIO_Pin_5 -#define PIN_TX_CH DAC_Channel_2 +#define PIN_TX GPIO_Pin_5 +#define PIN_TX_CH DAC_Channel_2 #else #error "Either STM32F4_NUCLEO_MORPHO_HEADER or STM32F4_NUCLEO_ARDUINO_HEADER need to be defined in Config.h" @@ -317,298 +317,297 @@ EXT_CLK PB8 input const uint16_t DC_OFFSET = 2048U; // Sampling frequency -#define SAMP_FREQ 24000 +#define SAMP_FREQ 24000 extern "C" { - void TIM2_IRQHandler() { - if (TIM_GetITStatus(TIM2, TIM_IT_Update) != RESET) { - TIM_ClearITPendingBit(TIM2, TIM_IT_Update); - io.interrupt(); - } - } + void TIM2_IRQHandler() { + if (TIM_GetITStatus(TIM2, TIM_IT_Update) != RESET) { + TIM_ClearITPendingBit(TIM2, TIM_IT_Update); + io.interrupt(); + } + } } void CIO::initInt() -{ - GPIO_InitTypeDef GPIO_InitStruct; - GPIO_StructInit(&GPIO_InitStruct); - GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStruct.GPIO_OType = GPIO_OType_PP; - GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_DOWN; - - // PTT pin - RCC_AHB1PeriphClockCmd(RCC_Per_PTT, ENABLE); - GPIO_InitStruct.GPIO_Pin = PIN_PTT; - GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; - GPIO_Init(PORT_PTT, &GPIO_InitStruct); +{ + GPIO_InitTypeDef GPIO_InitStruct; + GPIO_StructInit(&GPIO_InitStruct); + GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStruct.GPIO_OType = GPIO_OType_PP; + GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_DOWN; - // COSLED pin - RCC_AHB1PeriphClockCmd(RCC_Per_COSLED, ENABLE); - GPIO_InitStruct.GPIO_Pin = PIN_COSLED; - GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; - GPIO_Init(PORT_COSLED, &GPIO_InitStruct); + // PTT pin + RCC_AHB1PeriphClockCmd(RCC_Per_PTT, ENABLE); + GPIO_InitStruct.GPIO_Pin = PIN_PTT; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; + GPIO_Init(PORT_PTT, &GPIO_InitStruct); - // LED pin - RCC_AHB1PeriphClockCmd(RCC_Per_LED, ENABLE); - GPIO_InitStruct.GPIO_Pin = PIN_LED; - GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; - GPIO_Init(PORT_LED, &GPIO_InitStruct); + // COSLED pin + RCC_AHB1PeriphClockCmd(RCC_Per_COSLED, ENABLE); + GPIO_InitStruct.GPIO_Pin = PIN_COSLED; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; + GPIO_Init(PORT_COSLED, &GPIO_InitStruct); - // Init the input pins PIN_COS - RCC_AHB1PeriphClockCmd(RCC_Per_COS, ENABLE); - GPIO_InitStruct.GPIO_Pin = PIN_COS; - GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN; - GPIO_Init(PORT_COS, &GPIO_InitStruct); + // LED pin + RCC_AHB1PeriphClockCmd(RCC_Per_LED, ENABLE); + GPIO_InitStruct.GPIO_Pin = PIN_LED; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; + GPIO_Init(PORT_LED, &GPIO_InitStruct); + + // Init the input pins PIN_COS + RCC_AHB1PeriphClockCmd(RCC_Per_COS, ENABLE); + GPIO_InitStruct.GPIO_Pin = PIN_COS; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN; + GPIO_Init(PORT_COS, &GPIO_InitStruct); #if defined(ARDUINO_MODE_PINS) - // DSTAR pin - RCC_AHB1PeriphClockCmd(RCC_Per_DSTAR, ENABLE); - GPIO_InitStruct.GPIO_Pin = PIN_DSTAR; - GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; - GPIO_Init(PORT_DSTAR, &GPIO_InitStruct); + // DSTAR pin + RCC_AHB1PeriphClockCmd(RCC_Per_DSTAR, ENABLE); + GPIO_InitStruct.GPIO_Pin = PIN_DSTAR; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; + GPIO_Init(PORT_DSTAR, &GPIO_InitStruct); - // DMR pin - RCC_AHB1PeriphClockCmd(RCC_Per_DMR, ENABLE); - GPIO_InitStruct.GPIO_Pin = PIN_DMR; - GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; - GPIO_Init(PORT_DMR, &GPIO_InitStruct); + // DMR pin + RCC_AHB1PeriphClockCmd(RCC_Per_DMR, ENABLE); + GPIO_InitStruct.GPIO_Pin = PIN_DMR; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; + GPIO_Init(PORT_DMR, &GPIO_InitStruct); - // YSF pin - RCC_AHB1PeriphClockCmd(RCC_Per_YSF, ENABLE); - GPIO_InitStruct.GPIO_Pin = PIN_YSF; - GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; - GPIO_Init(PORT_YSF, &GPIO_InitStruct); + // YSF pin + RCC_AHB1PeriphClockCmd(RCC_Per_YSF, ENABLE); + GPIO_InitStruct.GPIO_Pin = PIN_YSF; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; + GPIO_Init(PORT_YSF, &GPIO_InitStruct); - // P25 pin - RCC_AHB1PeriphClockCmd(RCC_Per_P25, ENABLE); - GPIO_InitStruct.GPIO_Pin = PIN_P25; - GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; - GPIO_Init(PORT_P25, &GPIO_InitStruct); + // P25 pin + RCC_AHB1PeriphClockCmd(RCC_Per_P25, ENABLE); + GPIO_InitStruct.GPIO_Pin = PIN_P25; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; + GPIO_Init(PORT_P25, &GPIO_InitStruct); #endif } void CIO::startInt() { - if ((ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC) != RESET)) - io.interrupt(); - - // Init the ADC - GPIO_InitTypeDef GPIO_InitStruct; - ADC_InitTypeDef ADC_InitStructure; - ADC_CommonInitTypeDef ADC_CommonInitStructure; + if ((ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC) != RESET)) + io.interrupt(); - GPIO_StructInit(&GPIO_InitStruct); - ADC_CommonStructInit(&ADC_CommonInitStructure); - ADC_StructInit(&ADC_InitStructure); + // Init the ADC + GPIO_InitTypeDef GPIO_InitStruct; + ADC_InitTypeDef ADC_InitStructure; + ADC_CommonInitTypeDef ADC_CommonInitStructure; + + GPIO_StructInit(&GPIO_InitStruct); + ADC_CommonStructInit(&ADC_CommonInitStructure); + ADC_StructInit(&ADC_InitStructure); + + // Enable ADC1 clock + RCC_AHB1PeriphClockCmd(RCC_Per_RX, ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE); + // Enable ADC1 GPIO + GPIO_InitStruct.GPIO_Pin = PIN_RX; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AN; + GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL ; + GPIO_Init(PORT_RX, &GPIO_InitStruct); - // Enable ADC1 clock - RCC_AHB1PeriphClockCmd(RCC_Per_RX, ENABLE); - RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE); - // Enable ADC1 GPIO - GPIO_InitStruct.GPIO_Pin = PIN_RX; - GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AN; - GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL ; - GPIO_Init(PORT_RX, &GPIO_InitStruct); - #if defined(SEND_RSSI_DATA) - // Enable ADC2 clock - RCC_AHB1PeriphClockCmd(RCC_Per_RSSI, ENABLE); - RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC2, ENABLE); - // Enable ADC2 GPIO - GPIO_InitStruct.GPIO_Pin = PIN_RSSI; - GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AN; - GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL ; - GPIO_Init(PORT_RSSI, &GPIO_InitStruct); + // Enable ADC2 clock + RCC_AHB1PeriphClockCmd(RCC_Per_RSSI, ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC2, ENABLE); + // Enable ADC2 GPIO + GPIO_InitStruct.GPIO_Pin = PIN_RSSI; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AN; + GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL ; + GPIO_Init(PORT_RSSI, &GPIO_InitStruct); #endif - // Init ADCs in dual mode (RSSI), div clock by two + // Init ADCs in dual mode (RSSI), div clock by two #if defined(SEND_RSSI_DATA) - ADC_CommonInitStructure.ADC_Mode = ADC_DualMode_RegSimult; + ADC_CommonInitStructure.ADC_Mode = ADC_DualMode_RegSimult; #else - ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent; + ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent; #endif - ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2; - ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled; - ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles; - ADC_CommonInit(&ADC_CommonInitStructure); + ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2; + ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled; + ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles; + ADC_CommonInit(&ADC_CommonInitStructure); - // Init ADC1 and ADC2: 12bit, single-conversion - ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; - ADC_InitStructure.ADC_ScanConvMode = DISABLE; - ADC_InitStructure.ADC_ContinuousConvMode = DISABLE; - ADC_InitStructure.ADC_ExternalTrigConvEdge = 0; - ADC_InitStructure.ADC_ExternalTrigConv = 0; - ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; - ADC_InitStructure.ADC_NbrOfConversion = 1; + // Init ADC1 and ADC2: 12bit, single-conversion + ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; + ADC_InitStructure.ADC_ScanConvMode = DISABLE; + ADC_InitStructure.ADC_ContinuousConvMode = DISABLE; + ADC_InitStructure.ADC_ExternalTrigConvEdge = 0; + ADC_InitStructure.ADC_ExternalTrigConv = 0; + ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; + ADC_InitStructure.ADC_NbrOfConversion = 1; - ADC_Init(ADC1, &ADC_InitStructure); + ADC_Init(ADC1, &ADC_InitStructure); - ADC_EOCOnEachRegularChannelCmd(ADC1, ENABLE); - ADC_RegularChannelConfig(ADC1, PIN_RX_CH, 1, ADC_SampleTime_3Cycles); + ADC_EOCOnEachRegularChannelCmd(ADC1, ENABLE); + ADC_RegularChannelConfig(ADC1, PIN_RX_CH, 1, ADC_SampleTime_3Cycles); - // Enable ADC1 - ADC_Cmd(ADC1, ENABLE); + // Enable ADC1 + ADC_Cmd(ADC1, ENABLE); #if defined(SEND_RSSI_DATA) - ADC_Init(ADC2, &ADC_InitStructure); + ADC_Init(ADC2, &ADC_InitStructure); - ADC_EOCOnEachRegularChannelCmd(ADC2, ENABLE); - ADC_RegularChannelConfig(ADC2, PIN_RSSI_CH, 1, ADC_SampleTime_3Cycles); + ADC_EOCOnEachRegularChannelCmd(ADC2, ENABLE); + ADC_RegularChannelConfig(ADC2, PIN_RSSI_CH, 1, ADC_SampleTime_3Cycles); - // Enable ADC2 - ADC_Cmd(ADC2, ENABLE); + // Enable ADC2 + ADC_Cmd(ADC2, ENABLE); #endif - // Init the DAC - DAC_InitTypeDef DAC_InitStructure; + // Init the DAC + DAC_InitTypeDef DAC_InitStructure; - GPIO_StructInit(&GPIO_InitStruct); - DAC_StructInit(&DAC_InitStructure); + GPIO_StructInit(&GPIO_InitStruct); + DAC_StructInit(&DAC_InitStructure); - // GPIOA clock enable - RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE); + // GPIOA clock enable + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE); - // DAC Periph clock enable - RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE); + // DAC Periph clock enable + RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE); - // GPIO CONFIGURATION of DAC Pin - GPIO_InitStruct.GPIO_Pin = PIN_TX; - GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AN; - GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL; - GPIO_Init(GPIOA, &GPIO_InitStruct); + // GPIO CONFIGURATION of DAC Pin + GPIO_InitStruct.GPIO_Pin = PIN_TX; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AN; + GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(GPIOA, &GPIO_InitStruct); - DAC_InitStructure.DAC_Trigger = DAC_Trigger_None; - DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None; - DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable; - DAC_Init(PIN_TX_CH, &DAC_InitStructure); - DAC_Cmd(PIN_TX_CH, ENABLE); + DAC_InitStructure.DAC_Trigger = DAC_Trigger_None; + DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None; + DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable; + DAC_Init(PIN_TX_CH, &DAC_InitStructure); + DAC_Cmd(PIN_TX_CH, ENABLE); + + // Init the timer + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE); - // Init the timer - RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE); - #if defined(EXTERNAL_OSC) - // Configure a GPIO as external TIM2 clock source - GPIO_PinAFConfig(PORT_EXT_CLK, SRC_EXT_CLK, GPIO_AF_TIM2); - GPIO_InitStruct.GPIO_Pin = PIN_EXT_CLK; - GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF; - GPIO_Init(PORT_EXT_CLK, &GPIO_InitStruct); + // Configure a GPIO as external TIM2 clock source + GPIO_PinAFConfig(PORT_EXT_CLK, SRC_EXT_CLK, GPIO_AF_TIM2); + GPIO_InitStruct.GPIO_Pin = PIN_EXT_CLK; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF; + GPIO_Init(PORT_EXT_CLK, &GPIO_InitStruct); #endif - - TIM_TimeBaseInitTypeDef timerInitStructure; - TIM_TimeBaseStructInit (&timerInitStructure); - - // TIM2 output frequency + + TIM_TimeBaseInitTypeDef timerInitStructure; + TIM_TimeBaseStructInit (&timerInitStructure); + + // TIM2 output frequency #if defined(EXTERNAL_OSC) - timerInitStructure.TIM_Prescaler = (uint16_t) ((EXTERNAL_OSC/(2*SAMP_FREQ)) - 1); + timerInitStructure.TIM_Prescaler = (uint16_t) ((EXTERNAL_OSC/(2*SAMP_FREQ)) - 1); #else - timerInitStructure.TIM_Prescaler = (uint16_t) ((SystemCoreClock/(4*SAMP_FREQ)) - 1); + timerInitStructure.TIM_Prescaler = (uint16_t) ((SystemCoreClock/(4*SAMP_FREQ)) - 1); #endif - timerInitStructure.TIM_CounterMode = TIM_CounterMode_Up; - timerInitStructure.TIM_Period = 1; - timerInitStructure.TIM_ClockDivision = TIM_CKD_DIV1; - timerInitStructure.TIM_RepetitionCounter = 0; - TIM_TimeBaseInit(TIM2, &timerInitStructure); + timerInitStructure.TIM_CounterMode = TIM_CounterMode_Up; + timerInitStructure.TIM_Period = 1; + timerInitStructure.TIM_ClockDivision = TIM_CKD_DIV1; + timerInitStructure.TIM_RepetitionCounter = 0; + TIM_TimeBaseInit(TIM2, &timerInitStructure); #if defined(EXTERNAL_OSC) - // Enable external clock - TIM_ETRClockMode2Config(TIM2, TIM_ExtTRGPSC_OFF, TIM_ExtTRGPolarity_NonInverted, 0x00); + // Enable external clock + TIM_ETRClockMode2Config(TIM2, TIM_ExtTRGPSC_OFF, TIM_ExtTRGPolarity_NonInverted, 0x00); #else - // Enable internal clock - TIM_InternalClockConfig(TIM2); + // Enable internal clock + TIM_InternalClockConfig(TIM2); #endif - // Enable TIM2 - TIM_Cmd(TIM2, ENABLE); - // Enable TIM2 interrupt - TIM_ITConfig(TIM2, TIM_IT_Update, ENABLE); + // Enable TIM2 + TIM_Cmd(TIM2, ENABLE); + // Enable TIM2 interrupt + TIM_ITConfig(TIM2, TIM_IT_Update, ENABLE); - NVIC_InitTypeDef nvicStructure; - nvicStructure.NVIC_IRQChannel = TIM2_IRQn; - nvicStructure.NVIC_IRQChannelPreemptionPriority = 0; - nvicStructure.NVIC_IRQChannelSubPriority = 1; - nvicStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&nvicStructure); + NVIC_InitTypeDef nvicStructure; + nvicStructure.NVIC_IRQChannel = TIM2_IRQn; + nvicStructure.NVIC_IRQChannelPreemptionPriority = 0; + nvicStructure.NVIC_IRQChannelSubPriority = 1; + nvicStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&nvicStructure); - GPIO_ResetBits(PORT_COSLED, PIN_COSLED); - GPIO_SetBits(PORT_LED, PIN_LED); + GPIO_ResetBits(PORT_COSLED, PIN_COSLED); + GPIO_SetBits(PORT_LED, PIN_LED); } void CIO::interrupt() { - uint8_t control = MARK_NONE; - uint16_t sample = DC_OFFSET; - uint16_t rawRSSI = 0U; + uint8_t control = MARK_NONE; + uint16_t sample = DC_OFFSET; + uint16_t rawRSSI = 0U; - m_txBuffer.get(sample, control); + m_txBuffer.get(sample, control); - // Send the value to the DAC + // Send the value to the DAC #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER) - DAC_SetChannel2Data(DAC_Align_12b_R, sample); + DAC_SetChannel2Data(DAC_Align_12b_R, sample); #else - DAC_SetChannel1Data(DAC_Align_12b_R, sample); + DAC_SetChannel1Data(DAC_Align_12b_R, sample); #endif - // Read value from ADC1 and ADC2 - if ((ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC) == RESET)) { - // shouldn't be still in reset at this point so null the sample value? - sample = 0U; - } else { - sample = ADC_GetConversionValue(ADC1); + // Read value from ADC1 and ADC2 + if ((ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC) == RESET)) { + // shouldn't be still in reset at this point so null the sample value? + sample = 0U; + } else { + sample = ADC_GetConversionValue(ADC1); #if defined(SEND_RSSI_DATA) - rawRSSI = ADC_GetConversionValue(ADC2); + rawRSSI = ADC_GetConversionValue(ADC2); #endif - } + } - // trigger next ADC1 - ADC_ClearFlag(ADC1, ADC_FLAG_EOC); - ADC_SoftwareStartConv(ADC1); + // trigger next ADC1 + ADC_ClearFlag(ADC1, ADC_FLAG_EOC); + ADC_SoftwareStartConv(ADC1); - m_rxBuffer.put(sample, control); - m_rssiBuffer.put(rawRSSI); + m_rxBuffer.put(sample, control); + m_rssiBuffer.put(rawRSSI); - m_watchdog++; + m_watchdog++; } bool CIO::getCOSInt() { - return GPIO_ReadOutputDataBit(PORT_COS, PIN_COS) == Bit_SET; + return GPIO_ReadOutputDataBit(PORT_COS, PIN_COS) == Bit_SET; } void CIO::setLEDInt(bool on) { - GPIO_WriteBit(PORT_LED, PIN_LED, on ? Bit_SET : Bit_RESET); + GPIO_WriteBit(PORT_LED, PIN_LED, on ? Bit_SET : Bit_RESET); } void CIO::setPTTInt(bool on) { - GPIO_WriteBit(PORT_PTT, PIN_PTT, on ? Bit_SET : Bit_RESET); + GPIO_WriteBit(PORT_PTT, PIN_PTT, on ? Bit_SET : Bit_RESET); } void CIO::setCOSInt(bool on) { - GPIO_WriteBit(PORT_COSLED, PIN_COSLED, on ? Bit_SET : Bit_RESET); + GPIO_WriteBit(PORT_COSLED, PIN_COSLED, on ? Bit_SET : Bit_RESET); } void CIO::setDStarInt(bool on) { - GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET); + GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET); } void CIO::setDMRInt(bool on) { - GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET); + GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET); } void CIO::setYSFInt(bool on) { - GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET); + GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET); } void CIO::setP25Int(bool on) { - GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET); + GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET); } #endif - From 1e7c06de45770a9c2f3b11452fc8f0a33994f4dd Mon Sep 17 00:00:00 2001 From: phl0 Date: Thu, 19 Jan 2017 21:50:06 +0100 Subject: [PATCH 2/7] Refactor SerialSTM.cpp --- SerialSTM.cpp | 1033 ++++++++++++++++++++++++------------------------- 1 file changed, 516 insertions(+), 517 deletions(-) diff --git a/SerialSTM.cpp b/SerialSTM.cpp index e4ee3ab..b55a946 100644 --- a/SerialSTM.cpp +++ b/SerialSTM.cpp @@ -42,10 +42,10 @@ UART5 - TXD PC12 - RXD PD2 (Discovery, Pi and Nucleo with Morpho header) #define RX_SERIAL_FIFO_SIZE 256U extern "C" { - void USART1_IRQHandler(); - void USART2_IRQHandler(); - void USART3_IRQHandler(); - void UART5_IRQHandler(); + void USART1_IRQHandler(); + void USART2_IRQHandler(); + void USART3_IRQHandler(); + void UART5_IRQHandler(); } /* ************* USART1 ***************** */ @@ -60,178 +60,178 @@ volatile uint16_t RXSerialfifohead1, RXSerialfifotail1; // Init queues void TXSerialfifoinit1() { - TXSerialfifohead1 = 0U; - TXSerialfifotail1 = 0U; + TXSerialfifohead1 = 0U; + TXSerialfifotail1 = 0U; } void RXSerialfifoinit1() { - RXSerialfifohead1 = 0U; - RXSerialfifotail1 = 0U; + RXSerialfifohead1 = 0U; + RXSerialfifotail1 = 0U; } // How full is queue // TODO decide if how full or how empty is preferred info to return uint16_t TXSerialfifolevel1() { - uint32_t tail = TXSerialfifotail1; - uint32_t head = TXSerialfifohead1; + uint32_t tail = TXSerialfifotail1; + uint32_t head = TXSerialfifohead1; - if (tail > head) - return TX_SERIAL_FIFO_SIZE + head - tail; - else - return head - tail; + if (tail > head) + return TX_SERIAL_FIFO_SIZE + head - tail; + else + return head - tail; } uint16_t RXSerialfifolevel1() { - uint32_t tail = RXSerialfifotail1; - uint32_t head = RXSerialfifohead1; + uint32_t tail = RXSerialfifotail1; + uint32_t head = RXSerialfifohead1; - if (tail > head) - return RX_SERIAL_FIFO_SIZE + head - tail; - else - return head - tail; + if (tail > head) + return RX_SERIAL_FIFO_SIZE + head - tail; + else + return head - tail; } // Flushes the transmit shift register // warning: this call is blocking void TXSerialFlush1() { - // wait until the TXE shows the shift register is empty - while (USART_GetITStatus(USART1, USART_FLAG_TXE)) - ; + // wait until the TXE shows the shift register is empty + while (USART_GetITStatus(USART1, USART_FLAG_TXE)) + ; } uint8_t TXSerialfifoput1(uint8_t next) { - if (TXSerialfifolevel1() < TX_SERIAL_FIFO_SIZE) { - TXSerialfifo1[TXSerialfifohead1] = next; + if (TXSerialfifolevel1() < TX_SERIAL_FIFO_SIZE) { + TXSerialfifo1[TXSerialfifohead1] = next; - TXSerialfifohead1++; - if (TXSerialfifohead1 >= TX_SERIAL_FIFO_SIZE) - TXSerialfifohead1 = 0U; + TXSerialfifohead1++; + if (TXSerialfifohead1 >= TX_SERIAL_FIFO_SIZE) + TXSerialfifohead1 = 0U; - // make sure transmit interrupts are enabled as long as there is data to send - USART_ITConfig(USART1, USART_IT_TXE, ENABLE); - return 1U; - } else { - return 0U; // signal an overflow occurred by returning a zero count - } + // make sure transmit interrupts are enabled as long as there is data to send + USART_ITConfig(USART1, USART_IT_TXE, ENABLE); + return 1U; + } else { + return 0U; // signal an overflow occurred by returning a zero count + } } void USART1_IRQHandler() { - uint8_t c; + uint8_t c; - if (USART_GetITStatus(USART1, USART_IT_RXNE)) { - c = (uint8_t) USART_ReceiveData(USART1); + if (USART_GetITStatus(USART1, USART_IT_RXNE)) { + c = (uint8_t) USART_ReceiveData(USART1); - if (RXSerialfifolevel1() < RX_SERIAL_FIFO_SIZE) { - RXSerialfifo1[RXSerialfifohead1] = c; + if (RXSerialfifolevel1() < RX_SERIAL_FIFO_SIZE) { + RXSerialfifo1[RXSerialfifohead1] = c; - RXSerialfifohead1++; - if (RXSerialfifohead1 >= RX_SERIAL_FIFO_SIZE) - RXSerialfifohead1 = 0U; - } else { - // TODO - do something if rx fifo is full? - } + RXSerialfifohead1++; + if (RXSerialfifohead1 >= RX_SERIAL_FIFO_SIZE) + RXSerialfifohead1 = 0U; + } else { + // TODO - do something if rx fifo is full? + } - USART_ClearITPendingBit(USART1, USART_IT_RXNE); - intcount1++; - } + USART_ClearITPendingBit(USART1, USART_IT_RXNE); + intcount1++; + } - if (USART_GetITStatus(USART1, USART_IT_TXE)) { - c = 0U; + if (USART_GetITStatus(USART1, USART_IT_TXE)) { + c = 0U; - if (TXSerialfifohead1 != TXSerialfifotail1) { // if the fifo is not empty - c = TXSerialfifo1[TXSerialfifotail1]; + if (TXSerialfifohead1 != TXSerialfifotail1) { // if the fifo is not empty + c = TXSerialfifo1[TXSerialfifotail1]; - TXSerialfifotail1++; - if (TXSerialfifotail1 >= TX_SERIAL_FIFO_SIZE) - TXSerialfifotail1 = 0U; + TXSerialfifotail1++; + if (TXSerialfifotail1 >= TX_SERIAL_FIFO_SIZE) + TXSerialfifotail1 = 0U; - USART_SendData(USART1, c); - } else { // if there's no more data to transmit then turn off TX interrupts - USART_ITConfig(USART1, USART_IT_TXE, DISABLE); - } + USART_SendData(USART1, c); + } else { // if there's no more data to transmit then turn off TX interrupts + USART_ITConfig(USART1, USART_IT_TXE, DISABLE); + } - USART_ClearITPendingBit(USART1, USART_IT_TXE); - } + USART_ClearITPendingBit(USART1, USART_IT_TXE); + } } void InitUSART1(int speed) { - // USART1 - TXD PA9 - RXD PA10 - pins on mmdvm pi board - GPIO_InitTypeDef GPIO_InitStructure; - USART_InitTypeDef USART_InitStructure; - NVIC_InitTypeDef NVIC_InitStructure; + // USART1 - TXD PA9 - RXD PA10 - pins on mmdvm pi board + GPIO_InitTypeDef GPIO_InitStructure; + USART_InitTypeDef USART_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; - RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE); - RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); - GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_USART1); - GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_USART1); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); + GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_USART1); + GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_USART1); - // USART IRQ init - NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; - NVIC_Init(&NVIC_InitStructure); + // USART IRQ init + NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; + NVIC_Init(&NVIC_InitStructure); - // Configure USART as alternate function - GPIO_StructInit(&GPIO_InitStructure); - GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; - GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9 | GPIO_Pin_10; // Tx | Rx - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(GPIOA, &GPIO_InitStructure); + // Configure USART as alternate function + GPIO_StructInit(&GPIO_InitStructure); + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9 | GPIO_Pin_10; // Tx | Rx + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOA, &GPIO_InitStructure); - // Configure USART baud rate - USART_StructInit(&USART_InitStructure); - USART_InitStructure.USART_BaudRate = speed; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_Init(USART1, &USART_InitStructure); + // Configure USART baud rate + USART_StructInit(&USART_InitStructure); + USART_InitStructure.USART_BaudRate = speed; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_Init(USART1, &USART_InitStructure); - USART_Cmd(USART1, ENABLE); + USART_Cmd(USART1, ENABLE); - USART_ITConfig(USART1, USART_IT_RXNE, ENABLE); + USART_ITConfig(USART1, USART_IT_RXNE, ENABLE); - // initialize the fifos - TXSerialfifoinit1(); - RXSerialfifoinit1(); + // initialize the fifos + TXSerialfifoinit1(); + RXSerialfifoinit1(); } uint8_t AvailUSART1(void) { - if (RXSerialfifolevel1() > 0U) - return 1U; - else - return 0U; + if (RXSerialfifolevel1() > 0U) + return 1U; + else + return 0U; } uint8_t ReadUSART1(void) { - uint8_t data_c = RXSerialfifo1[RXSerialfifotail1]; + uint8_t data_c = RXSerialfifo1[RXSerialfifotail1]; - RXSerialfifotail1++; - if (RXSerialfifotail1 >= RX_SERIAL_FIFO_SIZE) - RXSerialfifotail1 = 0U; + RXSerialfifotail1++; + if (RXSerialfifotail1 >= RX_SERIAL_FIFO_SIZE) + RXSerialfifotail1 = 0U; - return data_c; + return data_c; } void WriteUSART1(const uint8_t* data, uint16_t length) { - for (uint16_t i = 0U; i < length; i++) - TXSerialfifoput1(data[i]); - - USART_ITConfig(USART1, USART_IT_TXE, ENABLE); + for (uint16_t i = 0U; i < length; i++) + TXSerialfifoput1(data[i]); + + USART_ITConfig(USART1, USART_IT_TXE, ENABLE); } #endif @@ -248,178 +248,178 @@ volatile uint16_t RXSerialfifohead2, RXSerialfifotail2; // Init queues void TXSerialfifoinit2() { - TXSerialfifohead2 = 0U; - TXSerialfifotail2 = 0U; + TXSerialfifohead2 = 0U; + TXSerialfifotail2 = 0U; } void RXSerialfifoinit2() { - RXSerialfifohead2 = 0U; - RXSerialfifotail2 = 0U; + RXSerialfifohead2 = 0U; + RXSerialfifotail2 = 0U; } // How full is queue // TODO decide if how full or how empty is preferred info to return uint16_t TXSerialfifolevel2() { - uint32_t tail = TXSerialfifotail2; - uint32_t head = TXSerialfifohead2; + uint32_t tail = TXSerialfifotail2; + uint32_t head = TXSerialfifohead2; - if (tail > head) - return TX_SERIAL_FIFO_SIZE + head - tail; - else - return head - tail; + if (tail > head) + return TX_SERIAL_FIFO_SIZE + head - tail; + else + return head - tail; } uint16_t RXSerialfifolevel2() { - uint32_t tail = RXSerialfifotail2; - uint32_t head = RXSerialfifohead2; + uint32_t tail = RXSerialfifotail2; + uint32_t head = RXSerialfifohead2; - if (tail > head) - return RX_SERIAL_FIFO_SIZE + head - tail; - else - return head - tail; + if (tail > head) + return RX_SERIAL_FIFO_SIZE + head - tail; + else + return head - tail; } // Flushes the transmit shift register // warning: this call is blocking void TXSerialFlush2() { - // wait until the TXE shows the shift register is empty - while (USART_GetITStatus(USART2, USART_FLAG_TXE)) - ; + // wait until the TXE shows the shift register is empty + while (USART_GetITStatus(USART2, USART_FLAG_TXE)) + ; } uint8_t TXSerialfifoput2(uint8_t next) { - if (TXSerialfifolevel2() < TX_SERIAL_FIFO_SIZE) { - TXSerialfifo2[TXSerialfifohead2] = next; + if (TXSerialfifolevel2() < TX_SERIAL_FIFO_SIZE) { + TXSerialfifo2[TXSerialfifohead2] = next; - TXSerialfifohead2++; - if (TXSerialfifohead2 >= TX_SERIAL_FIFO_SIZE) - TXSerialfifohead2 = 0U; + TXSerialfifohead2++; + if (TXSerialfifohead2 >= TX_SERIAL_FIFO_SIZE) + TXSerialfifohead2 = 0U; - // make sure transmit interrupts are enabled as long as there is data to send - USART_ITConfig(USART2, USART_IT_TXE, ENABLE); - return 1U; - } else { - return 0U; // signal an overflow occurred by returning a zero count - } + // make sure transmit interrupts are enabled as long as there is data to send + USART_ITConfig(USART2, USART_IT_TXE, ENABLE); + return 1U; + } else { + return 0U; // signal an overflow occurred by returning a zero count + } } void USART2_IRQHandler() { - uint8_t c; + uint8_t c; - if (USART_GetITStatus(USART2, USART_IT_RXNE)) { - c = (uint8_t) USART_ReceiveData(USART2); + if (USART_GetITStatus(USART2, USART_IT_RXNE)) { + c = (uint8_t) USART_ReceiveData(USART2); - if (RXSerialfifolevel2() < RX_SERIAL_FIFO_SIZE) { - RXSerialfifo2[RXSerialfifohead2] = c; + if (RXSerialfifolevel2() < RX_SERIAL_FIFO_SIZE) { + RXSerialfifo2[RXSerialfifohead2] = c; - RXSerialfifohead2++; - if (RXSerialfifohead2 >= RX_SERIAL_FIFO_SIZE) - RXSerialfifohead2 = 0U; - } else { - // TODO - do something if rx fifo is full? - } + RXSerialfifohead2++; + if (RXSerialfifohead2 >= RX_SERIAL_FIFO_SIZE) + RXSerialfifohead2 = 0U; + } else { + // TODO - do something if rx fifo is full? + } - USART_ClearITPendingBit(USART2, USART_IT_RXNE); - intcount2++; - } + USART_ClearITPendingBit(USART2, USART_IT_RXNE); + intcount2++; + } - if (USART_GetITStatus(USART2, USART_IT_TXE)) { - c = 0U; + if (USART_GetITStatus(USART2, USART_IT_TXE)) { + c = 0U; - if (TXSerialfifohead2 != TXSerialfifotail2) { // if the fifo is not empty - c = TXSerialfifo2[TXSerialfifotail2]; + if (TXSerialfifohead2 != TXSerialfifotail2) { // if the fifo is not empty + c = TXSerialfifo2[TXSerialfifotail2]; - TXSerialfifotail2++; - if (TXSerialfifotail2 >= TX_SERIAL_FIFO_SIZE) - TXSerialfifotail2 = 0U; + TXSerialfifotail2++; + if (TXSerialfifotail2 >= TX_SERIAL_FIFO_SIZE) + TXSerialfifotail2 = 0U; - USART_SendData(USART2, c); - } else { // if there's no more data to transmit then turn off TX interrupts - USART_ITConfig(USART2, USART_IT_TXE, DISABLE); - } + USART_SendData(USART2, c); + } else { // if there's no more data to transmit then turn off TX interrupts + USART_ITConfig(USART2, USART_IT_TXE, DISABLE); + } - USART_ClearITPendingBit(USART2, USART_IT_TXE); - } + USART_ClearITPendingBit(USART2, USART_IT_TXE); + } } void InitUSART2(int speed) { - // USART2 - TXD PA2 - RXD PA3 - GPIO_InitTypeDef GPIO_InitStructure; - USART_InitTypeDef USART_InitStructure; - NVIC_InitTypeDef NVIC_InitStructure; + // USART2 - TXD PA2 - RXD PA3 + GPIO_InitTypeDef GPIO_InitStructure; + USART_InitTypeDef USART_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; - RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE); - RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); - GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_USART2); - GPIO_PinAFConfig(GPIOA, GPIO_PinSource3, GPIO_AF_USART2); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE); + RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); + GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_USART2); + GPIO_PinAFConfig(GPIOA, GPIO_PinSource3, GPIO_AF_USART2); - // USART IRQ init - NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; - NVIC_Init(&NVIC_InitStructure); + // USART IRQ init + NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; + NVIC_Init(&NVIC_InitStructure); - // Configure USART as alternate function - GPIO_StructInit(&GPIO_InitStructure); - GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; - GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2 | GPIO_Pin_3; // Tx | Rx - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(GPIOA, &GPIO_InitStructure); + // Configure USART as alternate function + GPIO_StructInit(&GPIO_InitStructure); + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2 | GPIO_Pin_3; // Tx | Rx + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOA, &GPIO_InitStructure); - // Configure USART baud rate - USART_StructInit(&USART_InitStructure); - USART_InitStructure.USART_BaudRate = speed; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_Init(USART2, &USART_InitStructure); + // Configure USART baud rate + USART_StructInit(&USART_InitStructure); + USART_InitStructure.USART_BaudRate = speed; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_Init(USART2, &USART_InitStructure); - USART_Cmd(USART2, ENABLE); + USART_Cmd(USART2, ENABLE); - USART_ITConfig(USART2, USART_IT_RXNE, ENABLE); + USART_ITConfig(USART2, USART_IT_RXNE, ENABLE); - // initialize the fifos - TXSerialfifoinit2(); - RXSerialfifoinit2(); + // initialize the fifos + TXSerialfifoinit2(); + RXSerialfifoinit2(); } uint8_t AvailUSART2(void) { - if (RXSerialfifolevel2() > 0U) - return 1U; - else - return 0U; + if (RXSerialfifolevel2() > 0U) + return 1U; + else + return 0U; } uint8_t ReadUSART2(void) { - uint8_t data_c = RXSerialfifo2[RXSerialfifotail2]; + uint8_t data_c = RXSerialfifo2[RXSerialfifotail2]; - RXSerialfifotail2++; - if (RXSerialfifotail2 >= RX_SERIAL_FIFO_SIZE) - RXSerialfifotail2 = 0U; + RXSerialfifotail2++; + if (RXSerialfifotail2 >= RX_SERIAL_FIFO_SIZE) + RXSerialfifotail2 = 0U; - return data_c; + return data_c; } void WriteUSART2(const uint8_t* data, uint16_t length) { - for (uint16_t i = 0U; i < length; i++) - TXSerialfifoput2(data[i]); - - USART_ITConfig(USART2, USART_IT_TXE, ENABLE); + for (uint16_t i = 0U; i < length; i++) + TXSerialfifoput2(data[i]); + + USART_ITConfig(USART2, USART_IT_TXE, ENABLE); } #endif @@ -436,178 +436,178 @@ volatile uint16_t RXSerialfifohead3, RXSerialfifotail3; // Init queues void TXSerialfifoinit3() { - TXSerialfifohead3 = 0U; - TXSerialfifotail3 = 0U; + TXSerialfifohead3 = 0U; + TXSerialfifotail3 = 0U; } void RXSerialfifoinit3() { - RXSerialfifohead3 = 0U; - RXSerialfifotail3 = 0U; + RXSerialfifohead3 = 0U; + RXSerialfifotail3 = 0U; } // How full is queue // TODO decide if how full or how empty is preferred info to return uint16_t TXSerialfifolevel3() { - uint32_t tail = TXSerialfifotail3; - uint32_t head = TXSerialfifohead3; + uint32_t tail = TXSerialfifotail3; + uint32_t head = TXSerialfifohead3; - if (tail > head) - return TX_SERIAL_FIFO_SIZE + head - tail; - else - return head - tail; + if (tail > head) + return TX_SERIAL_FIFO_SIZE + head - tail; + else + return head - tail; } uint16_t RXSerialfifolevel3() { - uint32_t tail = RXSerialfifotail3; - uint32_t head = RXSerialfifohead3; + uint32_t tail = RXSerialfifotail3; + uint32_t head = RXSerialfifohead3; - if (tail > head) - return RX_SERIAL_FIFO_SIZE + head - tail; - else - return head - tail; + if (tail > head) + return RX_SERIAL_FIFO_SIZE + head - tail; + else + return head - tail; } // Flushes the transmit shift register // warning: this call is blocking void TXSerialFlush3() { - // wait until the TXE shows the shift register is empty - while (USART_GetITStatus(USART3, USART_FLAG_TXE)) - ; + // wait until the TXE shows the shift register is empty + while (USART_GetITStatus(USART3, USART_FLAG_TXE)) + ; } uint8_t TXSerialfifoput3(uint8_t next) { - if (TXSerialfifolevel3() < TX_SERIAL_FIFO_SIZE) { - TXSerialfifo3[TXSerialfifohead3] = next; + if (TXSerialfifolevel3() < TX_SERIAL_FIFO_SIZE) { + TXSerialfifo3[TXSerialfifohead3] = next; - TXSerialfifohead3++; - if (TXSerialfifohead3 >= TX_SERIAL_FIFO_SIZE) - TXSerialfifohead3 = 0U; + TXSerialfifohead3++; + if (TXSerialfifohead3 >= TX_SERIAL_FIFO_SIZE) + TXSerialfifohead3 = 0U; - // make sure transmit interrupts are enabled as long as there is data to send - USART_ITConfig(USART3, USART_IT_TXE, ENABLE); - return 1U; - } else { - return 0U; // signal an overflow occurred by returning a zero count - } + // make sure transmit interrupts are enabled as long as there is data to send + USART_ITConfig(USART3, USART_IT_TXE, ENABLE); + return 1U; + } else { + return 0U; // signal an overflow occurred by returning a zero count + } } void USART3_IRQHandler() { - uint8_t c; + uint8_t c; - if (USART_GetITStatus(USART3, USART_IT_RXNE)) { - c = (uint8_t) USART_ReceiveData(USART3); + if (USART_GetITStatus(USART3, USART_IT_RXNE)) { + c = (uint8_t) USART_ReceiveData(USART3); - if (RXSerialfifolevel3() < RX_SERIAL_FIFO_SIZE) { - RXSerialfifo3[RXSerialfifohead3] = c; + if (RXSerialfifolevel3() < RX_SERIAL_FIFO_SIZE) { + RXSerialfifo3[RXSerialfifohead3] = c; - RXSerialfifohead3++; - if (RXSerialfifohead3 >= RX_SERIAL_FIFO_SIZE) - RXSerialfifohead3 = 0U; - } else { - // TODO - do something if rx fifo is full? - } + RXSerialfifohead3++; + if (RXSerialfifohead3 >= RX_SERIAL_FIFO_SIZE) + RXSerialfifohead3 = 0U; + } else { + // TODO - do something if rx fifo is full? + } - USART_ClearITPendingBit(USART3, USART_IT_RXNE); - intcount3++; - } + USART_ClearITPendingBit(USART3, USART_IT_RXNE); + intcount3++; + } - if (USART_GetITStatus(USART3, USART_IT_TXE)) { - c = 0U; + if (USART_GetITStatus(USART3, USART_IT_TXE)) { + c = 0U; - if (TXSerialfifohead3 != TXSerialfifotail3) { // if the fifo is not empty - c = TXSerialfifo3[TXSerialfifotail3]; + if (TXSerialfifohead3 != TXSerialfifotail3) { // if the fifo is not empty + c = TXSerialfifo3[TXSerialfifotail3]; - TXSerialfifotail3++; - if (TXSerialfifotail3 >= TX_SERIAL_FIFO_SIZE) - TXSerialfifotail3 = 0U; + TXSerialfifotail3++; + if (TXSerialfifotail3 >= TX_SERIAL_FIFO_SIZE) + TXSerialfifotail3 = 0U; - USART_SendData(USART3, c); - } else { // if there's no more data to transmit then turn off TX interrupts - USART_ITConfig(USART3, USART_IT_TXE, DISABLE); - } + USART_SendData(USART3, c); + } else { // if there's no more data to transmit then turn off TX interrupts + USART_ITConfig(USART3, USART_IT_TXE, DISABLE); + } - USART_ClearITPendingBit(USART3, USART_IT_TXE); - } + USART_ClearITPendingBit(USART3, USART_IT_TXE); + } } void InitUSART3(int speed) { - // USART3 - TXD PC10 - RXD PC11 - GPIO_InitTypeDef GPIO_InitStructure; - USART_InitTypeDef USART_InitStructure; - NVIC_InitTypeDef NVIC_InitStructure; + // USART3 - TXD PC10 - RXD PC11 + GPIO_InitTypeDef GPIO_InitStructure; + USART_InitTypeDef USART_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; - RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); - RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE); - GPIO_PinAFConfig(GPIOC, GPIO_PinSource10, GPIO_AF_USART3); - GPIO_PinAFConfig(GPIOC, GPIO_PinSource11, GPIO_AF_USART3); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); + RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE); + GPIO_PinAFConfig(GPIOC, GPIO_PinSource10, GPIO_AF_USART3); + GPIO_PinAFConfig(GPIOC, GPIO_PinSource11, GPIO_AF_USART3); - // USART IRQ init - NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; - NVIC_Init(&NVIC_InitStructure); + // USART IRQ init + NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; + NVIC_Init(&NVIC_InitStructure); - // Configure USART as alternate function - GPIO_StructInit(&GPIO_InitStructure); - GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; - GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_11; // Tx | Rx - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(GPIOC, &GPIO_InitStructure); + // Configure USART as alternate function + GPIO_StructInit(&GPIO_InitStructure); + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_11; // Tx | Rx + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOC, &GPIO_InitStructure); - // Configure USART baud rate - USART_StructInit(&USART_InitStructure); - USART_InitStructure.USART_BaudRate = speed; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_Init(USART3, &USART_InitStructure); + // Configure USART baud rate + USART_StructInit(&USART_InitStructure); + USART_InitStructure.USART_BaudRate = speed; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_Init(USART3, &USART_InitStructure); - USART_Cmd(USART3, ENABLE); + USART_Cmd(USART3, ENABLE); - USART_ITConfig(USART3, USART_IT_RXNE, ENABLE); + USART_ITConfig(USART3, USART_IT_RXNE, ENABLE); - // initialize the fifos - TXSerialfifoinit3(); - RXSerialfifoinit3(); + // initialize the fifos + TXSerialfifoinit3(); + RXSerialfifoinit3(); } uint8_t AvailUSART3(void) { - if (RXSerialfifolevel3() > 0U) - return 1U; - else - return 0U; + if (RXSerialfifolevel3() > 0U) + return 1U; + else + return 0U; } uint8_t ReadUSART3(void) { - uint8_t data_c = RXSerialfifo3[RXSerialfifotail3]; + uint8_t data_c = RXSerialfifo3[RXSerialfifotail3]; - RXSerialfifotail3++; - if (RXSerialfifotail3 >= RX_SERIAL_FIFO_SIZE) - RXSerialfifotail3 = 0U; + RXSerialfifotail3++; + if (RXSerialfifotail3 >= RX_SERIAL_FIFO_SIZE) + RXSerialfifotail3 = 0U; - return data_c; + return data_c; } void WriteUSART3(const uint8_t* data, uint16_t length) { - for (uint16_t i = 0U; i < length; i++) - TXSerialfifoput3(data[i]); - - USART_ITConfig(USART3, USART_IT_TXE, ENABLE); + for (uint16_t i = 0U; i < length; i++) + TXSerialfifoput3(data[i]); + + USART_ITConfig(USART3, USART_IT_TXE, ENABLE); } #endif @@ -624,182 +624,182 @@ volatile uint16_t RXSerialfifohead5, RXSerialfifotail5; // Init queues void TXSerialfifoinit5() { - TXSerialfifohead5 = 0U; - TXSerialfifotail5 = 0U; + TXSerialfifohead5 = 0U; + TXSerialfifotail5 = 0U; } void RXSerialfifoinit5() { - RXSerialfifohead5 = 0U; - RXSerialfifotail5 = 0U; + RXSerialfifohead5 = 0U; + RXSerialfifotail5 = 0U; } // How full is queue // TODO decide if how full or how empty is preferred info to return uint16_t TXSerialfifolevel5() { - uint32_t tail = TXSerialfifotail5; - uint32_t head = TXSerialfifohead5; + uint32_t tail = TXSerialfifotail5; + uint32_t head = TXSerialfifohead5; - if (tail > head) - return TX_SERIAL_FIFO_SIZE + head - tail; - else - return head - tail; + if (tail > head) + return TX_SERIAL_FIFO_SIZE + head - tail; + else + return head - tail; } uint16_t RXSerialfifolevel5() { - uint32_t tail = RXSerialfifotail5; - uint32_t head = RXSerialfifohead5; + uint32_t tail = RXSerialfifotail5; + uint32_t head = RXSerialfifohead5; - if (tail > head) - return RX_SERIAL_FIFO_SIZE + head - tail; - else - return head - tail; + if (tail > head) + return RX_SERIAL_FIFO_SIZE + head - tail; + else + return head - tail; } // Flushes the transmit shift register // warning: this call is blocking void TXSerialFlush5() { - // wait until the TXE shows the shift register is empty - while (USART_GetITStatus(UART5, USART_FLAG_TXE)) - ; + // wait until the TXE shows the shift register is empty + while (USART_GetITStatus(UART5, USART_FLAG_TXE)) + ; } uint8_t TXSerialfifoput5(uint8_t next) { - if (TXSerialfifolevel5() < TX_SERIAL_FIFO_SIZE) { - TXSerialfifo5[TXSerialfifohead5] = next; + if (TXSerialfifolevel5() < TX_SERIAL_FIFO_SIZE) { + TXSerialfifo5[TXSerialfifohead5] = next; - TXSerialfifohead5++; - if (TXSerialfifohead5 >= TX_SERIAL_FIFO_SIZE) - TXSerialfifohead5 = 0U; + TXSerialfifohead5++; + if (TXSerialfifohead5 >= TX_SERIAL_FIFO_SIZE) + TXSerialfifohead5 = 0U; - // make sure transmit interrupts are enabled as long as there is data to send - USART_ITConfig(UART5, USART_IT_TXE, ENABLE); - return 1U; - } else { - return 0U; // signal an overflow occurred by returning a zero count - } + // make sure transmit interrupts are enabled as long as there is data to send + USART_ITConfig(UART5, USART_IT_TXE, ENABLE); + return 1U; + } else { + return 0U; // signal an overflow occurred by returning a zero count + } } void UART5_IRQHandler() { - uint8_t c; + uint8_t c; - if (USART_GetITStatus(UART5, USART_IT_RXNE)) { - c = (uint8_t) USART_ReceiveData(UART5); + if (USART_GetITStatus(UART5, USART_IT_RXNE)) { + c = (uint8_t) USART_ReceiveData(UART5); - if (RXSerialfifolevel5() < RX_SERIAL_FIFO_SIZE) { - RXSerialfifo5[RXSerialfifohead5] = c; + if (RXSerialfifolevel5() < RX_SERIAL_FIFO_SIZE) { + RXSerialfifo5[RXSerialfifohead5] = c; - RXSerialfifohead5++; - if (RXSerialfifohead5 >= RX_SERIAL_FIFO_SIZE) - RXSerialfifohead5 = 0U; - } else { - // TODO - do something if rx fifo is full? - } + RXSerialfifohead5++; + if (RXSerialfifohead5 >= RX_SERIAL_FIFO_SIZE) + RXSerialfifohead5 = 0U; + } else { + // TODO - do something if rx fifo is full? + } - USART_ClearITPendingBit(UART5, USART_IT_RXNE); - intcount5++; - } + USART_ClearITPendingBit(UART5, USART_IT_RXNE); + intcount5++; + } - if (USART_GetITStatus(UART5, USART_IT_TXE)) { - c = 0U; + if (USART_GetITStatus(UART5, USART_IT_TXE)) { + c = 0U; - if (TXSerialfifohead5 != TXSerialfifotail5) { // if the fifo is not empty - c = TXSerialfifo5[TXSerialfifotail5]; + if (TXSerialfifohead5 != TXSerialfifotail5) { // if the fifo is not empty + c = TXSerialfifo5[TXSerialfifotail5]; - TXSerialfifotail5++; - if (TXSerialfifotail5 >= TX_SERIAL_FIFO_SIZE) - TXSerialfifotail5 = 0U; + TXSerialfifotail5++; + if (TXSerialfifotail5 >= TX_SERIAL_FIFO_SIZE) + TXSerialfifotail5 = 0U; - USART_SendData(UART5, c); - } else { // if there's no more data to transmit then turn off TX interrupts + USART_SendData(UART5, c); + } else { // if there's no more data to transmit then turn off TX interrupts USART_ITConfig(UART5, USART_IT_TXE, DISABLE); - } + } - USART_ClearITPendingBit(UART5, USART_IT_TXE); - } + USART_ClearITPendingBit(UART5, USART_IT_TXE); + } } void InitUART5(int speed) { - // UART5 - TXD PC12 - RXD PD2 - GPIO_InitTypeDef GPIO_InitStructure; - USART_InitTypeDef USART_InitStructure; - NVIC_InitTypeDef NVIC_InitStructure; + // UART5 - TXD PC12 - RXD PD2 + GPIO_InitTypeDef GPIO_InitStructure; + USART_InitTypeDef USART_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; - RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); - RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE); - RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART5, ENABLE); - GPIO_PinAFConfig(GPIOC, GPIO_PinSource12, GPIO_AF_UART5); - GPIO_PinAFConfig(GPIOD, GPIO_PinSource2, GPIO_AF_UART5); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE); + RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART5, ENABLE); + GPIO_PinAFConfig(GPIOC, GPIO_PinSource12, GPIO_AF_UART5); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource2, GPIO_AF_UART5); - // USART IRQ init - NVIC_InitStructure.NVIC_IRQChannel = UART5_IRQn; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; - NVIC_Init(&NVIC_InitStructure); + // USART IRQ init + NVIC_InitStructure.NVIC_IRQChannel = UART5_IRQn; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; + NVIC_Init(&NVIC_InitStructure); - // Configure USART as alternate function - GPIO_StructInit(&GPIO_InitStructure); - GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; - GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12; // Tx - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(GPIOC, &GPIO_InitStructure); + // Configure USART as alternate function + GPIO_StructInit(&GPIO_InitStructure); + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12; // Tx + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOC, &GPIO_InitStructure); - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; // Rx - GPIO_Init(GPIOD, &GPIO_InitStructure); + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; // Rx + GPIO_Init(GPIOD, &GPIO_InitStructure); - // Configure USART baud rate - USART_StructInit(&USART_InitStructure); - USART_InitStructure.USART_BaudRate = speed; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_Init(UART5, &USART_InitStructure); + // Configure USART baud rate + USART_StructInit(&USART_InitStructure); + USART_InitStructure.USART_BaudRate = speed; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_Init(UART5, &USART_InitStructure); - USART_Cmd(UART5, ENABLE); + USART_Cmd(UART5, ENABLE); - USART_ITConfig(UART5, USART_IT_RXNE, ENABLE); + USART_ITConfig(UART5, USART_IT_RXNE, ENABLE); - // initialize the fifos - TXSerialfifoinit5(); - RXSerialfifoinit5(); + // initialize the fifos + TXSerialfifoinit5(); + RXSerialfifoinit5(); } uint8_t AvailUART5(void) { - if (RXSerialfifolevel5() > 0U) - return 1U; - else - return 0U; + if (RXSerialfifolevel5() > 0U) + return 1U; + else + return 0U; } uint8_t ReadUART5(void) { - uint8_t data_c = RXSerialfifo5[RXSerialfifotail5]; + uint8_t data_c = RXSerialfifo5[RXSerialfifotail5]; - RXSerialfifotail5++; - if (RXSerialfifotail5 >= RX_SERIAL_FIFO_SIZE) - RXSerialfifotail5 = 0U; + RXSerialfifotail5++; + if (RXSerialfifotail5 >= RX_SERIAL_FIFO_SIZE) + RXSerialfifotail5 = 0U; - return data_c; + return data_c; } void WriteUART5(const uint8_t* data, uint16_t length) { - for (uint16_t i = 0U; i < length; i++) - TXSerialfifoput5(data[i]); - - USART_ITConfig(UART5, USART_IT_TXE, ENABLE); + for (uint16_t i = 0U; i < length; i++) + TXSerialfifoput5(data[i]); + + USART_ITConfig(UART5, USART_IT_TXE, ENABLE); } #endif @@ -807,105 +807,104 @@ void WriteUART5(const uint8_t* data, uint16_t length) void CSerialPort::beginInt(uint8_t n, int speed) { - switch (n) { - case 1U: - #if defined(STM32F4_DISCOVERY) - InitUSART3(speed); - #elif defined(STM32F4_PI) - InitUSART1(speed); - #elif defined(STM32F4_NUCLEO) - InitUSART2(speed); - #endif - break; - case 3U: - #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER) - InitUSART1(speed); - #else - InitUART5(speed); - #endif - break; - default: - break; - } + switch (n) { + case 1U: + #if defined(STM32F4_DISCOVERY) + InitUSART3(speed); + #elif defined(STM32F4_PI) + InitUSART1(speed); + #elif defined(STM32F4_NUCLEO) + InitUSART2(speed); + #endif + break; + case 3U: + #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER) + InitUSART1(speed); + #else + InitUART5(speed); + #endif + break; + default: + break; + } } int CSerialPort::availableInt(uint8_t n) -{ - switch (n) { +{ + switch (n) { case 1U: - #if defined(STM32F4_DISCOVERY) - return AvailUSART3(); - #elif defined(STM32F4_PI) - return AvailUSART1(); - #elif defined(STM32F4_NUCLEO) - return AvailUSART2(); - #endif - case 3U: - #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER) - return AvailUSART1(); - #else - return AvailUART5(); - #endif + #if defined(STM32F4_DISCOVERY) + return AvailUSART3(); + #elif defined(STM32F4_PI) + return AvailUSART1(); + #elif defined(STM32F4_NUCLEO) + return AvailUSART2(); + #endif + case 3U: + #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER) + return AvailUSART1(); + #else + return AvailUART5(); + #endif default: - return false; - } + return false; + } } uint8_t CSerialPort::readInt(uint8_t n) -{ - switch (n) { - case 1U: - #if defined(STM32F4_DISCOVERY) - return ReadUSART3(); - #elif defined(STM32F4_PI) - return ReadUSART1(); - #elif defined(STM32F4_NUCLEO) - return ReadUSART2(); - #endif - case 3U: - #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER) - return ReadUSART1(); - #else - return ReadUART5(); - #endif - default: - return 0U; - } +{ + switch (n) { + case 1U: + #if defined(STM32F4_DISCOVERY) + return ReadUSART3(); + #elif defined(STM32F4_PI) + return ReadUSART1(); + #elif defined(STM32F4_NUCLEO) + return ReadUSART2(); + #endif + case 3U: + #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER) + return ReadUSART1(); + #else + return ReadUART5(); + #endif + default: + return 0U; + } } void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool flush) { - switch (n) { - case 1U: - #if defined(STM32F4_DISCOVERY) - WriteUSART3(data, length); - if (flush) - TXSerialFlush3(); - #elif defined(STM32F4_PI) - WriteUSART1(data, length); - if (flush) - TXSerialFlush1(); - #elif defined(STM32F4_NUCLEO) - WriteUSART2(data, length); - if (flush) - TXSerialFlush2(); - #endif - break; - case 3U: - #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER) - WriteUSART1(data, length); - if (flush) - TXSerialFlush1(); - #else - WriteUART5(data, length); - if (flush) - TXSerialFlush5(); - #endif - break; - default: - break; - } + switch (n) { + case 1U: + #if defined(STM32F4_DISCOVERY) + WriteUSART3(data, length); + if (flush) + TXSerialFlush3(); + #elif defined(STM32F4_PI) + WriteUSART1(data, length); + if (flush) + TXSerialFlush1(); + #elif defined(STM32F4_NUCLEO) + WriteUSART2(data, length); + if (flush) + TXSerialFlush2(); + #endif + break; + case 3U: + #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER) + WriteUSART1(data, length); + if (flush) + TXSerialFlush1(); + #else + WriteUART5(data, length); + if (flush) + TXSerialFlush5(); + #endif + break; + default: + break; + } } #endif - From eab91cca3a1d65b749eab11bf847b5a622f504c2 Mon Sep 17 00:00:00 2001 From: phl0 Date: Thu, 19 Jan 2017 21:54:21 +0100 Subject: [PATCH 3/7] Correct typo --- IOSTM.cpp | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/IOSTM.cpp b/IOSTM.cpp index 13c2665..d855ff3 100644 --- a/IOSTM.cpp +++ b/IOSTM.cpp @@ -65,8 +65,8 @@ EXT_CLK PA15 input #define PORT_P25 GPIOD #define RCC_Per_P25 RCC_AHB1Periph_GPIOD -#define PIN_DSTARcw GPIO_Pin_12 -#define PORT_DSTARcw GPIOD +#define PIN_DSTAR GPIO_Pin_12 +#define PORT_DSTAR GPIOD #define RCC_Per_DSTAR RCC_AHB1Periph_GPIOD #define PIN_DMR GPIO_Pin_13 @@ -316,7 +316,7 @@ EXT_CLK PB8 input const uint16_t DC_OFFSET = 2048U; -// Sampling frequency +// Sampling frequency #define SAMP_FREQ 24000 extern "C" { @@ -500,7 +500,7 @@ void CIO::startInt() // TIM2 output frequency #if defined(EXTERNAL_OSC) timerInitStructure.TIM_Prescaler = (uint16_t) ((EXTERNAL_OSC/(2*SAMP_FREQ)) - 1); -#else +#else timerInitStructure.TIM_Prescaler = (uint16_t) ((SystemCoreClock/(4*SAMP_FREQ)) - 1); #endif @@ -547,7 +547,7 @@ void CIO::interrupt() DAC_SetChannel2Data(DAC_Align_12b_R, sample); #else DAC_SetChannel1Data(DAC_Align_12b_R, sample); -#endif +#endif // Read value from ADC1 and ADC2 if ((ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC) == RESET)) { @@ -595,7 +595,7 @@ void CIO::setDStarInt(bool on) GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET); } -void CIO::setDMRInt(bool on) +void CIO::setDMRInt(bool on) { GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET); } @@ -605,7 +605,7 @@ void CIO::setYSFInt(bool on) GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET); } -void CIO::setP25Int(bool on) +void CIO::setP25Int(bool on) { GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET); } From f97e53f1eb943debbaba420d044a12cb8d72e81a Mon Sep 17 00:00:00 2001 From: phl0 Date: Fri, 20 Jan 2017 16:34:25 +0100 Subject: [PATCH 4/7] Add gitignore to irgnore object files and STM lib --- .gitignore | 3 +++ 1 file changed, 3 insertions(+) create mode 100644 .gitignore diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..7435cbc --- /dev/null +++ b/.gitignore @@ -0,0 +1,3 @@ +*.o +bin/ +STM32F4XX_Lib/ From 79b0b141a23e78b4ee848908f8af86f117bad281 Mon Sep 17 00:00:00 2001 From: phl0 Date: Fri, 20 Jan 2017 17:34:32 +0100 Subject: [PATCH 5/7] Add support for external mode pins on F0DEI board --- Config.h | 3 +++ IOSTM.cpp | 61 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 64 insertions(+) diff --git a/Config.h b/Config.h index 50acea0..df5ba44 100644 --- a/Config.h +++ b/Config.h @@ -54,6 +54,9 @@ // #define STM32F4_NUCLEO_MORPHO_HEADER // #define STM32F4_NUCLEO_ARDUINO_HEADER +// Use separate mode pins to switch external filters/bandwidth for example +// #define STM32F4_NUCLEO_MODE_PINS + // To use wider C4FSK filters for DMR, System Fusion and P25 on transmit // #define WIDE_C4FSK_FILTERS_TX // To use wider C4FSK filters for DMR, System Fusion and P25 on receive diff --git a/IOSTM.cpp b/IOSTM.cpp index d855ff3..223c20f 100644 --- a/IOSTM.cpp +++ b/IOSTM.cpp @@ -180,6 +180,11 @@ DMR PB4 output YSF PB5 output P25 PB3 output +MDSTAR PC14 output +MDMR PC15 outout +MYSF PC2 output +MP25 PC3 output + RX PA0 analog input RSSI PA1 analog input TX PA4 analog output @@ -219,6 +224,24 @@ EXT_CLK PA15 input #define PORT_YSF GPIOB #define RCC_Per_YSF RCC_AHB1Periph_GPIOB +#if defined(STM32F4_NUCLEO_MODE_PINS) +#define PIN_MP25 GPIO_Pin_3 +#define PORT_MP25 GPIOC +#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC + +#define PIN_MDSTAR GPIO_Pin_14 +#define PORT_MDSTAR GPIOC +#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC + +#define PIN_MDMR GPIO_Pin_15 +#define PORT_MDMR GPIOC +#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC + +#define PIN_MYSF GPIO_Pin_2 +#define PORT_MYSF GPIOC +#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC +#endif + #define PIN_EXT_CLK GPIO_Pin_15 #define SRC_EXT_CLK GPIO_PinSource15 #define PORT_EXT_CLK GPIOA @@ -385,6 +408,32 @@ void CIO::initInt() GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; GPIO_Init(PORT_P25, &GPIO_InitStruct); #endif + +#if defined(STM32F4_NUCLEO_MODE_PINS) + // DSTAR mode pin + RCC_AHB1PeriphClockCmd(RCC_Per_MDSTAR, ENABLE); + GPIO_InitStruct.GPIO_Pin = PIN_MDSTAR; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; + GPIO_Init(PORT_MDSTAR, &GPIO_InitStruct); + + // DMR mode pin + RCC_AHB1PeriphClockCmd(RCC_Per_MDMR, ENABLE); + GPIO_InitStruct.GPIO_Pin = PIN_MDMR; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; + GPIO_Init(PORT_MDMR, &GPIO_InitStruct); + + // YSF mode pin + RCC_AHB1PeriphClockCmd(RCC_Per_MYSF, ENABLE); + GPIO_InitStruct.GPIO_Pin = PIN_MYSF; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; + GPIO_Init(PORT_MYSF, &GPIO_InitStruct); + + // P25 mode pin + RCC_AHB1PeriphClockCmd(RCC_Per_MP25, ENABLE); + GPIO_InitStruct.GPIO_Pin = PIN_MP25; + GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; + GPIO_Init(PORT_MP25, &GPIO_InitStruct); +#endif } void CIO::startInt() @@ -593,21 +642,33 @@ void CIO::setCOSInt(bool on) void CIO::setDStarInt(bool on) { GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET); +#if defined(STM32F4_NUCLEO_MODE_PINS) + GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET); +#endif } void CIO::setDMRInt(bool on) { GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET); +#if defined(STM32F4_NUCLEO_MODE_PINS) + GPIO_WriteBit(PORT_MDMR, PIN_MDMR, on ? Bit_SET : Bit_RESET); +#endif } void CIO::setYSFInt(bool on) { GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET); +#if defined(STM32F4_NUCLEO_MODE_PINS) + GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET); +#endif } void CIO::setP25Int(bool on) { GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET); +#if defined(STM32F4_NUCLEO_MODE_PINS) + GPIO_WriteBit(PORT_MP25, PIN_MP25, on ? Bit_SET : Bit_RESET); +#endif } #endif From 49e0d13967e773f340aa4af8322e5e3658a95e26 Mon Sep 17 00:00:00 2001 From: phl0 Date: Sun, 22 Jan 2017 00:46:12 +0100 Subject: [PATCH 6/7] Redefine Mode pins for D-Star and DMR --- IOSTM.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/IOSTM.cpp b/IOSTM.cpp index 223c20f..d43c42f 100644 --- a/IOSTM.cpp +++ b/IOSTM.cpp @@ -229,11 +229,11 @@ EXT_CLK PA15 input #define PORT_MP25 GPIOC #define RCC_Per_MP25 RCC_AHB1Periph_GPIOC -#define PIN_MDSTAR GPIO_Pin_14 +#define PIN_MDSTAR GPIO_Pin_4 #define PORT_MDSTAR GPIOC #define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC -#define PIN_MDMR GPIO_Pin_15 +#define PIN_MDMR GPIO_Pin_5 #define PORT_MDMR GPIOC #define RCC_Per_MDMR RCC_AHB1Periph_GPIOC From 5ee6a0d6db448f78c6aff252dd358409ae787600 Mon Sep 17 00:00:00 2001 From: phl0 Date: Sun, 22 Jan 2017 12:22:40 +0100 Subject: [PATCH 7/7] Correct comments to align with changed pins --- IOSTM.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/IOSTM.cpp b/IOSTM.cpp index d43c42f..028a3e9 100644 --- a/IOSTM.cpp +++ b/IOSTM.cpp @@ -180,8 +180,8 @@ DMR PB4 output YSF PB5 output P25 PB3 output -MDSTAR PC14 output -MDMR PC15 outout +MDSTAR PC4 output +MDMR PC5 outout MYSF PC2 output MP25 PC3 output