mirror of https://github.com/markqvist/MMDVM.git
Add the STM32F CPU support.
Jonathan Naylor
parent
97fe8ad3fd
commit
4a5027b18b
2
Config.h
2
Config.h
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@ -27,7 +27,7 @@
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// Frequencies such as 10.0 Mhz (48000 * 208.333) or 20 Mhz (48000 * 416.666) are not suitable.
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//
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// For 12 MHz
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// #define EXTERNAL_OSC 12000000
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#define EXTERNAL_OSC 12000000
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// For 12.288 MHz
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// #define EXTERNAL_OSC 12288000
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// For 14.4 MHz
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22
Globals.h
22
Globals.h
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@ -19,16 +19,34 @@
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#if !defined(GLOBALS_H)
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#define GLOBALS_H
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#if defined(STM32F4XX) || defined(STM32F4)
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#include "stm32f4xx.h"
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#include "stm32f4xx_gpio.h"
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#include "stm32f4xx_rcc.h"
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#include "stm32f4xx_dac.h"
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#include "stm32f4xx_adc.h"
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#include "stm32f4xx_tim.h"
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#include "stm32f4xx_usart.h"
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#include "misc.h"
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#include <string.h>
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#include <stddef.h>
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#else
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#include <Arduino.h>
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#endif
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#if defined(__SAM3X8E__) || defined(__STM32F1__) || defined(__STM32F2__)
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#if defined(__SAM3X8E__)
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#define ARM_MATH_CM3
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#elif defined(__STM32F3__) || defined(__STM32F4__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
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#elif defined(STM32F4XX) || defined(STM32F4) || defined(__MK20DX256__) || defined(__MK66FX1M0__)
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#define ARM_MATH_CM4
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#else
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#error "Unknown processor type"
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#endif
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#if defined(STM32F4XX) || defined(STM32F4)
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#include "cmsis.h"
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#else
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#include <arm_math.h>
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#endif
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enum MMDVM_STATE {
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STATE_IDLE = 0,
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@ -0,0 +1,353 @@
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/*
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* Copyright (C) 2016 by Jim McLaughlin KI6ZUM
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* Copyright (C) 2016 by Andy Uribe CA6JAU
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include "Config.h"
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#include "Globals.h"
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#include "IO.h"
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#if defined(STM32F4XX) || defined(STM32F4)
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/*
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Pin definitions:
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PTT PD8 output
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COSLED PA7 output
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LED PD15 output
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COS PA5 input
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ADC1 PA0 analog input
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ADC2 PA1 analog input
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DAC1 PA4 analog output
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DSTAR PD12 output
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DMR PD13 output
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YSF PD14 output
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P25 PD11 output
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*/
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#define PIN_COS GPIO_Pin_5
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#define PORT_COS GPIOA
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#define PIN_PTT GPIO_Pin_8
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#define PORT_PTT GPIOD
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#define PIN_COSLED GPIO_Pin_7
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#define PORT_COSLED GPIOA
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#define PIN_LED GPIO_Pin_15
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#define PORT_LED GPIOD
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#define PIN_ADC GPIO_Pin_0
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#define PORT_ADC GPIOA
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#define PIN_DAC GPIO_Pin_4
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#define PORT_DAC GPIOA
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#define PIN_P25 GPIO_Pin_11
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#define PORT_P25 GPIOD
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#define PIN_DSTAR GPIO_Pin_12
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#define PORT_DSTAR GPIOD
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#define PIN_DMR GPIO_Pin_13
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#define PORT_DMR GPIOD
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#define PIN_YSF GPIO_Pin_14
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#define PORT_YSF GPIOD
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const uint16_t DC_OFFSET = 2048U;
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extern "C" {
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void TIM2_IRQHandler() {
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if (TIM_GetITStatus(TIM2, TIM_IT_Update) != RESET) {
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TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
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io.interrupt();
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}
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}
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}
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void CIO::initInt()
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{
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GPIO_InitTypeDef GPIO_InitStruct;
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// PTT pin
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
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GPIO_StructInit(&GPIO_InitStruct);
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GPIO_InitStruct.GPIO_Pin = PIN_PTT;
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
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GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_DOWN;
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GPIO_Init(PORT_PTT, &GPIO_InitStruct);
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// COSLED pin
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
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GPIO_StructInit(&GPIO_InitStruct);
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GPIO_InitStruct.GPIO_Pin = PIN_COSLED;
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
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GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_DOWN;
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GPIO_Init(PORT_COSLED, &GPIO_InitStruct);
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// LED pin
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
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GPIO_StructInit(&GPIO_InitStruct);
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GPIO_InitStruct.GPIO_Pin = PIN_LED;
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
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GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_DOWN;
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GPIO_Init(PORT_LED, &GPIO_InitStruct);
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// Init the input pins PIN_COS
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
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GPIO_StructInit(&GPIO_InitStruct);
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GPIO_InitStruct.GPIO_Pin = PIN_COS;
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN;
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GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_Init(PORT_COS, &GPIO_InitStruct);
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// DSTAR pin
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
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GPIO_StructInit(&GPIO_InitStruct);
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GPIO_InitStruct.GPIO_Pin = PIN_DSTAR;
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
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GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_DOWN;
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GPIO_Init(PORT_DSTAR, &GPIO_InitStruct);
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// DMR pin
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
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GPIO_StructInit(&GPIO_InitStruct);
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GPIO_InitStruct.GPIO_Pin = PIN_DMR;
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
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GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_DOWN;
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GPIO_Init(PORT_DMR, &GPIO_InitStruct);
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// YSF pin
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
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GPIO_StructInit(&GPIO_InitStruct);
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GPIO_InitStruct.GPIO_Pin = PIN_YSF;
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
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GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_DOWN;
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GPIO_Init(PORT_YSF, &GPIO_InitStruct);
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// P25 pin
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
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GPIO_StructInit(&GPIO_InitStruct);
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GPIO_InitStruct.GPIO_Pin = PIN_P25;
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
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GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_DOWN;
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GPIO_Init(PORT_P25, &GPIO_InitStruct);
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}
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void CIO::startInt()
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{
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if ((ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC) != RESET))
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io.interrupt();
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// ADC1 PA0 analog input
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// ADC2 PA1 analog input
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// DAC1 PA4 analog output
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// Init the ADC
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GPIO_InitTypeDef GPIO_InitStruct;
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ADC_InitTypeDef ADC_InitStructure;
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ADC_CommonInitTypeDef ADC_CommonInitStructure;
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GPIO_StructInit(&GPIO_InitStruct);
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ADC_CommonStructInit(&ADC_CommonInitStructure);
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ADC_StructInit(&ADC_InitStructure);
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// Enable ADC clock
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
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#if defined(SEND_RSSI_DATA)
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2, ENABLE);
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#else
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
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#endif
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// For ADC1 on PA0, ADC2 on PA1
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#if defined(SEND_RSSI_DATA)
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GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;
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#else
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GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0;
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#endif
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AN;
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GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL ;
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GPIO_Init(GPIOA, &GPIO_InitStruct);
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// Init ADCs in dual mode, div clock by two
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ADC_CommonInitStructure.ADC_Mode = ADC_DualMode_RegSimult;
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ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2;
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ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;
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ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;
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ADC_CommonInit(&ADC_CommonInitStructure);
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// Init ADC1 and ADC2: 12bit, single-conversion
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ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
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ADC_InitStructure.ADC_ScanConvMode = DISABLE;
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ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
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ADC_InitStructure.ADC_ExternalTrigConvEdge = 0;
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ADC_InitStructure.ADC_ExternalTrigConv = 0;
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ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
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ADC_InitStructure.ADC_NbrOfConversion = 1;
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ADC_Init(ADC1, &ADC_InitStructure);
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ADC_EOCOnEachRegularChannelCmd(ADC1, ENABLE);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_3Cycles);
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// Enable ADC1
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ADC_Cmd(ADC1, ENABLE);
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#if defined(SEND_RSSI_DATA)
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ADC_Init(ADC2, &ADC_InitStructure);
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ADC_EOCOnEachRegularChannelCmd(ADC2, ENABLE);
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ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 1, ADC_SampleTime_3Cycles);
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// Enable ADC2
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ADC_Cmd(ADC2, ENABLE);
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#endif
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// Init the DAC
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DAC_InitTypeDef DAC_InitStructure;
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GPIO_StructInit(&GPIO_InitStruct);
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DAC_StructInit(&DAC_InitStructure);
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// GPIOA & D clock enable
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
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// DAC Periph clock enable
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE);
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// GPIO CONFIGURATION of DAC Pins
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GPIO_InitStruct.GPIO_Pin = GPIO_Pin_4;
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AN;
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GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_Init(GPIOA, &GPIO_InitStruct);
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DAC_InitStructure.DAC_Trigger = DAC_Trigger_None;
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DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None;
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DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable;
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DAC_Init(DAC_Channel_1, &DAC_InitStructure);
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DAC_Cmd(DAC_Channel_1, ENABLE);
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// Init the timer
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
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TIM_TimeBaseInitTypeDef timerInitStructure;
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TIM_TimeBaseStructInit (&timerInitStructure);
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timerInitStructure.TIM_Prescaler = 1749; // 24 kHz
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timerInitStructure.TIM_CounterMode = TIM_CounterMode_Up;
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timerInitStructure.TIM_Period = 1;
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timerInitStructure.TIM_ClockDivision = TIM_CKD_DIV1;
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timerInitStructure.TIM_RepetitionCounter = 0;
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TIM_TimeBaseInit(TIM2, &timerInitStructure);
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TIM_Cmd(TIM2, ENABLE);
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TIM_ITConfig(TIM2, TIM_IT_Update, ENABLE);
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NVIC_InitTypeDef nvicStructure;
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nvicStructure.NVIC_IRQChannel = TIM2_IRQn;
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nvicStructure.NVIC_IRQChannelPreemptionPriority = 0;
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nvicStructure.NVIC_IRQChannelSubPriority = 1;
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nvicStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&nvicStructure);
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GPIO_ResetBits(PORT_COSLED, PIN_COSLED);
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GPIO_SetBits(PORT_LED, PIN_LED);
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}
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void CIO::interrupt()
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{
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uint8_t control = MARK_NONE;
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uint16_t sample = DC_OFFSET;
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uint16_t rawRSSI = 0U;
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m_txBuffer.get(sample, control);
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// Send the value to the DAC
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DAC_SetChannel1Data(DAC_Align_12b_R, sample);
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// Read value from ADC1 and ADC2
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if ((ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC) == RESET)) {
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// shouldn't be still in reset at this point so null the sample value?
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sample = 0U;
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} else {
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sample = ADC_GetConversionValue(ADC1);
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#if defined(SEND_RSSI_DATA)
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rawRSSI = ADC_GetConversionValue(ADC2);
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#endif
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}
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// trigger next ADC1
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ADC_ClearFlag(ADC1, ADC_FLAG_EOC);
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ADC_SoftwareStartConv(ADC1);
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m_rxBuffer.put(sample, control);
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m_rssiBuffer.put(rawRSSI);
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m_watchdog++;
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}
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bool CIO::getCOSInt()
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{
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return GPIO_ReadOutputDataBit(PORT_COS, PIN_COS) == Bit_SET;
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}
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void CIO::setLEDInt(bool on)
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{
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GPIO_WriteBit(PORT_LED, PIN_LED, on ? Bit_SET : Bit_RESET);
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}
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void CIO::setPTTInt(bool on)
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{
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GPIO_WriteBit(PORT_PTT, PIN_PTT, on ? Bit_SET : Bit_RESET);
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}
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void CIO::setCOSInt(bool on)
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{
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GPIO_WriteBit(PORT_COSLED, PIN_COSLED, on ? Bit_SET : Bit_RESET);
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}
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void CIO::setDStarInt(bool on)
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{
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GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET);
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}
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void CIO::setDMRInt(bool on)
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{
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GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET);
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}
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void CIO::setYSFInt(bool on)
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{
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GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET);
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}
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void CIO::setP25Int(bool on)
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{
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GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET);
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}
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#endif
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@ -18,7 +18,7 @@
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#if defined(notdef)
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#if defined(STM32F4XX) || defined(STM32F4)
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#include "Config.h"
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#include "Globals.h"
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@ -0,0 +1,485 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<workbench version="2.0">
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||||
<workbenchAdvisor/>
|
||||
<window>
|
||||
<fastViewData fastViewLocation="1024"/>
|
||||
<perspectiveBar/>
|
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<page focus="true" label="Workspace - CooCox CoBuilder">
|
||||
<editors>
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||||
<editorArea activeWorkbook="DefaultEditorWorkbook">
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<info part="DefaultEditorWorkbook">
|
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|
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|
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</editorArea>
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||||
<editor activePart="true" focus="true" id="org.eclipse.cdt.ui.editor.CEditor" name="SerialPort.cpp" partName="SerialPort.cpp" path="C:/Users/Andy/MMDVM/SerialPort.cpp" title="SerialPort.cpp" tooltip="C:/Users/Andy/MMDVM/SerialPort.cpp" workbook="DefaultEditorWorkbook">
|
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|
||||
<File name="cmsis_lib/include/stm32f4xx_dac.h" path="cmsis_lib/include/stm32f4xx_dac.h" type="1"/>
|
||||
<File name="cmsis_boot" path="" type="2"/>
|
||||
<File name="cmsis_lib/include/stm32f4xx_usart.h" path="cmsis_lib/include/stm32f4xx_usart.h" type="1"/>
|
||||
<File name="DStarDefines.h" path="DStarDefines.h" type="1"/>
|
||||
<File name="DStarRX.h" path="DStarRX.h" type="1"/>
|
||||
<File name="YSFRX.cpp" path="YSFRX.cpp" type="1"/>
|
||||
<File name="cmsis_boot/startup" path="" type="2"/>
|
||||
<File name="cmsis/core_cm4_simd.h" path="cmsis/core_cm4_simd.h" type="1"/>
|
||||
<File name="cmsis_boot/stm32f4xx.h" path="cmsis_boot/stm32f4xx.h" type="1"/>
|
||||
<File name="cmsis/core_cmFunc.h" path="cmsis/core_cmFunc.h" type="1"/>
|
||||
<File name="SampleRB.cpp" path="SampleRB.cpp" type="1"/>
|
||||
<File name="CalDStarTX.h" path="CalDStarTX.h" type="1"/>
|
||||
<File name="cmsis/core_cm4.h" path="cmsis/core_cm4.h" type="1"/>
|
||||
<File name="Config.h" path="Config.h" type="1"/>
|
||||
<File name="cmsis_lib/source/misc.c" path="cmsis_lib/source/misc.c" type="1"/>
|
||||
<File name="YSFRX.h" path="YSFRX.h" type="1"/>
|
||||
<File name="DMRSlotType.cpp" path="DMRSlotType.cpp" type="1"/>
|
||||
<File name="DMRSlotRX.h" path="DMRSlotRX.h" type="1"/>
|
||||
<File name="cmsis_lib/source/stm32f4xx_adc.c" path="cmsis_lib/source/stm32f4xx_adc.c" type="1"/>
|
||||
<File name="cmsis_lib/include/stm32f4xx_tim.h" path="cmsis_lib/include/stm32f4xx_tim.h" type="1"/>
|
||||
<File name="syscalls/syscalls.c" path="syscalls/syscalls.c" type="1"/>
|
||||
<File name="IO.cpp" path="IO.cpp" type="1"/>
|
||||
<File name="Globals.h" path="Globals.h" type="1"/>
|
||||
<File name="DMRDMORX.cpp" path="DMRDMORX.cpp" type="1"/>
|
||||
<File name="cmsis_lib/source" path="" type="2"/>
|
||||
<File name="P25RX.h" path="P25RX.h" type="1"/>
|
||||
<File name="CalDStarRX.cpp" path="CalDStarRX.cpp" type="1"/>
|
||||
<File name="CalDStarRX.h" path="CalDStarRX.h" type="1"/>
|
||||
<File name="IO.h" path="IO.h" type="1"/>
|
||||
<File name="cmsis_boot/stm32f4xx_conf.h" path="cmsis_boot/stm32f4xx_conf.h" type="1"/>
|
||||
<File name="Utils.cpp" path="Utils.cpp" type="1"/>
|
||||
<File name="cmsis_boot/system_stm32f4xx.h" path="cmsis_boot/system_stm32f4xx.h" type="1"/>
|
||||
<File name="cmsis_lib/source/stm32f4xx_dac.c" path="cmsis_lib/source/stm32f4xx_dac.c" type="1"/>
|
||||
<File name="SerialArduino.cpp" path="SerialArduino.cpp" type="1"/>
|
||||
<File name="Utils.h" path="Utils.h" type="1"/>
|
||||
<File name="SerialPort.cpp" path="SerialPort.cpp" type="1"/>
|
||||
<File name="cmsis_lib/include/stm32f4xx_rcc.h" path="cmsis_lib/include/stm32f4xx_rcc.h" type="1"/>
|
||||
<File name="DStarTX.cpp" path="DStarTX.cpp" type="1"/>
|
||||
<File name="cmsis_boot/startup/startup_stm32f4xx.c" path="cmsis_boot/startup/startup_stm32f4xx.c" type="1"/>
|
||||
<File name="YSFDefines.h" path="YSFDefines.h" type="1"/>
|
||||
<File name="cmsis_lib/source/stm32f4xx_rcc.c" path="cmsis_lib/source/stm32f4xx_rcc.c" type="1"/>
|
||||
<File name="cmsis/core_cmInstr.h" path="cmsis/core_cmInstr.h" type="1"/>
|
||||
<File name="DStarTX.h" path="DStarTX.h" type="1"/>
|
||||
<File name="SampleRB.h" path="SampleRB.h" type="1"/>
|
||||
<File name="YSFTX.h" path="YSFTX.h" type="1"/>
|
||||
<File name="DMRRX.h" path="DMRRX.h" type="1"/>
|
||||
<File name="MMDVM.cpp" path="MMDVM.cpp" type="1"/>
|
||||
<File name="IOTeensy.cpp" path="IOTeensy.cpp" type="1"/>
|
||||
<File name="DMRDMORX.h" path="DMRDMORX.h" type="1"/>
|
||||
<File name="cmsis_lib/include/stm32f4xx_adc.h" path="cmsis_lib/include/stm32f4xx_adc.h" type="1"/>
|
||||
<File name="SerialPort.h" path="SerialPort.h" type="1"/>
|
||||
<File name="P25Defines.h" path="P25Defines.h" type="1"/>
|
||||
<File name="cmsis_boot/system_stm32f4xx.c" path="cmsis_boot/system_stm32f4xx.c" type="1"/>
|
||||
<File name="CWIdTX.h" path="CWIdTX.h" type="1"/>
|
||||
<File name="CalDStarTX.cpp" path="CalDStarTX.cpp" type="1"/>
|
||||
<File name="DMRSlotType.h" path="DMRSlotType.h" type="1"/>
|
||||
<File name="Debug.h" path="Debug.h" type="1"/>
|
||||
<File name="RSSIRB.cpp" path="RSSIRB.cpp" type="1"/>
|
||||
<File name="P25TX.h" path="P25TX.h" type="1"/>
|
||||
<File name="IODue.cpp" path="IODue.cpp" type="1"/>
|
||||
<File name="CalDMR.h" path="CalDMR.h" type="1"/>
|
||||
<File name="DMRDMOTX.h" path="DMRDMOTX.h" type="1"/>
|
||||
<File name="cmsis" path="" type="2"/>
|
||||
<File name="cmsis_lib" path="" type="2"/>
|
||||
<File name="DMRTX.cpp" path="DMRTX.cpp" type="1"/>
|
||||
<File name="P25RX.cpp" path="P25RX.cpp" type="1"/>
|
||||
<File name="cmsis_lib/source/stm32f4xx_tim.c" path="cmsis_lib/source/stm32f4xx_tim.c" type="1"/>
|
||||
<File name="cmsis_lib/include/stm32f4xx_gpio.h" path="cmsis_lib/include/stm32f4xx_gpio.h" type="1"/>
|
||||
<File name="DStarRX.cpp" path="DStarRX.cpp" type="1"/>
|
||||
<File name="syscalls" path="" type="2"/>
|
||||
<File name="cmsis_lib/include/misc.h" path="cmsis_lib/include/misc.h" type="1"/>
|
||||
<File name="DMRSlotRX.cpp" path="DMRSlotRX.cpp" type="1"/>
|
||||
<File name="IOSTM.cpp" path="IOSTM.cpp" type="1"/>
|
||||
<File name="P25TX.cpp" path="P25TX.cpp" type="1"/>
|
||||
<File name="DMRTX.h" path="DMRTX.h" type="1"/>
|
||||
<File name="SerialRB.cpp" path="SerialRB.cpp" type="1"/>
|
||||
<File name="cmsis_lib/include" path="" type="2"/>
|
||||
<File name="CWIdTX.cpp" path="CWIdTX.cpp" type="1"/>
|
||||
<File name="DMRIdleRX.cpp" path="DMRIdleRX.cpp" type="1"/>
|
||||
<File name="RSSIRB.h" path="RSSIRB.h" type="1"/>
|
||||
<File name="YSFTX.cpp" path="YSFTX.cpp" type="1"/>
|
||||
</Files>
|
||||
</Project>
|
||||
|
|
@ -0,0 +1,104 @@
|
|||
###
|
||||
# GNU ARM Embedded Toolchain
|
||||
CC=arm-none-eabi-gcc
|
||||
CXX=arm-none-eabi-g++
|
||||
LD=arm-none-eabi-ld
|
||||
AR=arm-none-eabi-ar
|
||||
AS=arm-none-eabi-as
|
||||
CP=arm-none-eabi-objcopy
|
||||
OD=arm-none-eabi-objdump
|
||||
NM=arm-none-eabi-nm
|
||||
SIZE=arm-none-eabi-size
|
||||
A2L=arm-none-eabi-addr2line
|
||||
|
||||
###
|
||||
# Directory Structure
|
||||
BINDIR=bin
|
||||
|
||||
###
|
||||
# Find source files
|
||||
ASOURCES=$(shell find . -name '*.s')
|
||||
CSOURCES=$(shell find . -name '*.c')
|
||||
CXXSOURCES=$(shell find . -name '*.cpp')
|
||||
# Find header directories
|
||||
INC=$(shell find . -name '*.h' -exec dirname {} \; | uniq)
|
||||
INCLUDES=$(INC:%=-I%)
|
||||
# Find libraries
|
||||
INCLUDES_LIBS=libarm_cortexM4lf_math.a
|
||||
LINK_LIBS=
|
||||
# Create object list
|
||||
OBJECTS=$(ASOURCES:%.s=%.o)
|
||||
OBJECTS+=$(CSOURCES:%.c=%.o)
|
||||
OBJECTS+=$(CXXSOURCES:%.cpp=%.o)
|
||||
# Define output files ELF & IHEX
|
||||
BINELF=outp.elf
|
||||
BINHEX=outp.hex
|
||||
|
||||
###
|
||||
# MCU FLAGS
|
||||
MCFLAGS=-mcpu=cortex-m4 -mthumb -mlittle-endian \
|
||||
-mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb-interwork
|
||||
# COMPILE FLAGS
|
||||
DEFS=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F407VG
|
||||
CFLAGS=-c $(MCFLAGS) $(DEFS) $(INCLUDES)
|
||||
CXXFLAGS=-c $(MCFLAGS) $(DEFS) $(INCLUDES)
|
||||
# LINKER FLAGS
|
||||
LDSCRIPT=stm32_flash.ld
|
||||
LDFLAGS =-T $(LDSCRIPT) $(MCFLAGS) --specs=nosys.specs $(INCLUDES_LIBS) $(LINK_LIBS)
|
||||
|
||||
###
|
||||
# Build Rules
|
||||
.PHONY: all release release-memopt debug clean
|
||||
|
||||
all: release-memopt
|
||||
|
||||
release-memopt: DEFS+=-DCUSTOM_NEW -DNO_EXCEPTIONS
|
||||
release-memopt: CFLAGS+=-Os -ffunction-sections -fdata-sections -fno-builtin # -flto
|
||||
release-memopt: CXXFLAGS+=-Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -fno-rtti # -flto
|
||||
release-memopt: LDFLAGS+=-Os --specs=nano.specs # -flto
|
||||
release-memopt: release
|
||||
|
||||
debug: CFLAGS+=-g
|
||||
debug: CXXFLAGS+=-g
|
||||
debug: LDFLAGS+=-g
|
||||
debug: release
|
||||
|
||||
release: $(BINDIR)/$(BINHEX)
|
||||
|
||||
$(BINDIR)/$(BINHEX): $(BINDIR)/$(BINELF)
|
||||
$(CP) -O ihex $< $@
|
||||
@echo "Objcopy from ELF to IHEX complete!\n"
|
||||
|
||||
$(BINDIR)/$(BINELF): $(OBJECTS)
|
||||
$(CXX) $(OBJECTS) $(LDFLAGS) -o $@
|
||||
@echo "Linking complete!\n"
|
||||
$(SIZE) $(BINDIR)/$(BINELF)
|
||||
|
||||
%.o: %.cpp
|
||||
$(CXX) $(CXXFLAGS) $< -o $@
|
||||
@echo "Compiled "$<"!\n"
|
||||
|
||||
%.o: %.c
|
||||
$(CC) $(CFLAGS) $< -o $@
|
||||
@echo "Compiled "$<"!\n"
|
||||
|
||||
%.o: %.s
|
||||
$(CC) $(CFLAGS) $< -o $@
|
||||
@echo "Assambled "$<"!\n"
|
||||
|
||||
clean:
|
||||
rm -f $(OBJECTS) $(BINDIR)/$(BINELF) $(BINDIR)/$(BINHEX) $(BINDIR)/output.map
|
||||
|
||||
deploy:
|
||||
ifneq ($(wildcard /usr/bin/openocd),)
|
||||
/usr/bin/openocd -f /usr/share/openocd/scripts/board/stm32f4discovery.cfg -c "program bin/$(BINELF) verify reset exit"
|
||||
endif
|
||||
|
||||
ifneq ($(wildcard /usr/local/bin/openocd),)
|
||||
/usr/local/bin/openocd -f /usr/local/share/openocd/scripts/board/stm32f4discovery.cfg -c "program bin/$(BINELF) verify reset exit"
|
||||
endif
|
||||
|
||||
ifneq ($(wildcard /opt/openocd/bin/openocd),)
|
||||
/opt/openocd/bin/openocd -f /opt/openocd/share/openocd/scripts/board/stm32f4discovery.cfg -c "program bin/$(BINELF) verify reset exit"
|
||||
endif
|
||||
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
This is the source code of the MMDVM firmware that supports D-Star, DMR, System Fusion and P25.
|
||||
|
||||
Currently it only runs on the Arduino Due, but other platforms are planned.
|
||||
It runs on the Arduino Due, and the STM32F4xx platforms. Support for the Teensy (3.1/3.2 and 3.6) is being added.
|
||||
|
||||
In order to build this software you will need to edit a file within the Arduino GUI and that is detailed in the BUILD.txt file.
|
||||
In order to build this software for the Arduino Due, you will need to edit a file within the Arduino GUI and that is detailed in the BUILD.txt file.
|
||||
|
||||
This software is licenced under the GPL v2 and is intended for amateur and educational use only. Use of this software for commercial purposes is strictly forbidden.
|
||||
|
|
|
|||
5
RSSIRB.h
5
RSSIRB.h
|
|
@ -21,7 +21,12 @@ Boston, MA 02110-1301, USA.
|
|||
#if !defined(RSSIRB_H)
|
||||
#define RSSIRB_H
|
||||
|
||||
#if defined(STM32F4XX) || defined(STM32F4)
|
||||
#include "stm32f4xx.h"
|
||||
#include <cstddef>
|
||||
#else
|
||||
#include <Arduino.h>
|
||||
#endif
|
||||
|
||||
class CRSSIRB {
|
||||
public:
|
||||
|
|
|
|||
|
|
@ -21,7 +21,12 @@ Boston, MA 02110-1301, USA.
|
|||
#if !defined(SAMPLERB_H)
|
||||
#define SAMPLERB_H
|
||||
|
||||
#if defined(STM32F4XX) || defined(STM32F4)
|
||||
#include "stm32f4xx.h"
|
||||
#include <cstddef>
|
||||
#else
|
||||
#include <Arduino.h>
|
||||
#endif
|
||||
|
||||
class CSampleRB {
|
||||
public:
|
||||
|
|
|
|||
|
|
@ -21,7 +21,12 @@ Boston, MA 02110-1301, USA.
|
|||
#if !defined(SERIALRB_H)
|
||||
#define SERIALRB_H
|
||||
|
||||
#if defined(STM32F4XX) || defined(STM32F4)
|
||||
#include "stm32f4xx.h"
|
||||
#include <cstddef>
|
||||
#else
|
||||
#include <Arduino.h>
|
||||
#endif
|
||||
|
||||
const uint16_t SERIAL_RINGBUFFER_SIZE = 370U;
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,464 @@
|
|||
/*
|
||||
* Copyright (C) 2016 by Jim McLaughlin KI6ZUM
|
||||
* Copyright (C) 2016 by Andy Uribe CA6JAU
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
#include "Globals.h"
|
||||
|
||||
#include "SerialPort.h"
|
||||
|
||||
#if defined(STM32F4XX) || defined(STM32F4)
|
||||
|
||||
volatile uint32_t intcount1, intcount3;
|
||||
|
||||
#define TX_SERIAL_FIFO_SIZE 256U
|
||||
#define RX_SERIAL_FIFO_SIZE 256U
|
||||
|
||||
volatile uint8_t TXSerialfifo1[TX_SERIAL_FIFO_SIZE];
|
||||
volatile uint8_t RXSerialfifo1[RX_SERIAL_FIFO_SIZE];
|
||||
volatile uint16_t TXSerialfifohead1, TXSerialfifotail1;
|
||||
volatile uint16_t RXSerialfifohead1, RXSerialfifotail1;
|
||||
|
||||
volatile uint8_t TXSerialfifo3[TX_SERIAL_FIFO_SIZE];
|
||||
volatile uint8_t RXSerialfifo3[RX_SERIAL_FIFO_SIZE];
|
||||
volatile uint16_t TXSerialfifohead3, TXSerialfifotail3;
|
||||
volatile uint16_t RXSerialfifohead3, RXSerialfifotail3;
|
||||
|
||||
extern "C" {
|
||||
void USART1_IRQHandler();
|
||||
void USART3_IRQHandler();
|
||||
}
|
||||
|
||||
/* ************* USART1 ***************** */
|
||||
|
||||
// Init queues
|
||||
void TXSerialfifoinit1()
|
||||
{
|
||||
TXSerialfifohead1 = 0U;
|
||||
TXSerialfifotail1 = 0U;
|
||||
}
|
||||
|
||||
void RXSerialfifoinit1()
|
||||
{
|
||||
RXSerialfifohead1 = 0U;
|
||||
RXSerialfifotail1 = 0U;
|
||||
}
|
||||
|
||||
// How full is queue
|
||||
// TODO decide if how full or how empty is preferred info to return
|
||||
uint16_t TXSerialfifolevel1()
|
||||
{
|
||||
uint32_t tail = TXSerialfifotail1;
|
||||
uint32_t head = TXSerialfifohead1;
|
||||
|
||||
if (tail > head)
|
||||
return TX_SERIAL_FIFO_SIZE + head - tail;
|
||||
else
|
||||
return head - tail;
|
||||
}
|
||||
|
||||
uint16_t RXSerialfifolevel1()
|
||||
{
|
||||
uint32_t tail = RXSerialfifotail1;
|
||||
uint32_t head = RXSerialfifohead1;
|
||||
|
||||
if (tail > head)
|
||||
return RX_SERIAL_FIFO_SIZE + head - tail;
|
||||
else
|
||||
return head - tail;
|
||||
}
|
||||
|
||||
// Flushes the transmit shift register
|
||||
// warning: this call is blocking
|
||||
void TXSerialFlush1()
|
||||
{
|
||||
// wait until the TXE shows the shift register is empty
|
||||
while (USART_GetITStatus(USART1, USART_FLAG_TXE))
|
||||
;
|
||||
}
|
||||
|
||||
uint8_t TXSerialfifoput1(uint8_t next)
|
||||
{
|
||||
if (TXSerialfifolevel1() < TX_SERIAL_FIFO_SIZE) {
|
||||
TXSerialfifo1[TXSerialfifohead1] = next;
|
||||
|
||||
TXSerialfifohead1++;
|
||||
if (TXSerialfifohead1 >= TX_SERIAL_FIFO_SIZE)
|
||||
TXSerialfifohead1 = 0U;
|
||||
|
||||
// make sure transmit interrupts are enabled as long as there is data to send
|
||||
USART_ITConfig(USART1, USART_IT_TXE, ENABLE);
|
||||
return 1U;
|
||||
} else {
|
||||
return 0U; // signal an overflow occurred by returning a zero count
|
||||
}
|
||||
}
|
||||
|
||||
void USART1_IRQHandler()
|
||||
{
|
||||
uint8_t c;
|
||||
|
||||
if (USART_GetITStatus(USART1, USART_IT_RXNE)) {
|
||||
c = (uint8_t) USART_ReceiveData(USART1);
|
||||
|
||||
if (RXSerialfifolevel1() < RX_SERIAL_FIFO_SIZE) {
|
||||
RXSerialfifo1[RXSerialfifohead1] = c;
|
||||
|
||||
RXSerialfifohead1++;
|
||||
if (RXSerialfifohead1 >= RX_SERIAL_FIFO_SIZE)
|
||||
RXSerialfifohead1 = 0U;
|
||||
} else {
|
||||
// TODO - do something if rx fifo is full?
|
||||
}
|
||||
|
||||
USART_ClearITPendingBit(USART1, USART_IT_RXNE);
|
||||
intcount1++;
|
||||
}
|
||||
|
||||
if (USART_GetITStatus(USART1, USART_IT_TXE)) {
|
||||
c = 0U;
|
||||
|
||||
if (TXSerialfifohead1 != TXSerialfifotail1) { // if the fifo is not empty
|
||||
c = TXSerialfifo1[TXSerialfifotail1];
|
||||
|
||||
TXSerialfifotail1++;
|
||||
if (TXSerialfifotail1 >= TX_SERIAL_FIFO_SIZE)
|
||||
TXSerialfifotail1 = 0U;
|
||||
|
||||
USART_SendData(USART1, c);
|
||||
} else { // if there's no more data to transmit then turn off TX interrupts
|
||||
USART_ITConfig(USART1, USART_IT_TXE, DISABLE);
|
||||
}
|
||||
|
||||
USART_ClearITPendingBit(USART1, USART_IT_TXE);
|
||||
}
|
||||
}
|
||||
|
||||
void InitUSART1(int speed)
|
||||
{
|
||||
// USART1 - TXD PA9 - RXD PA10 - pins on mmdvm pi board
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
USART_InitTypeDef USART_InitStructure;
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
|
||||
GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_USART1);
|
||||
GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_USART1);
|
||||
|
||||
// USART IRQ init
|
||||
NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
|
||||
NVIC_Init(&NVIC_InitStructure);
|
||||
|
||||
// Configure USART as alternate function
|
||||
GPIO_StructInit(&GPIO_InitStructure);
|
||||
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9 | GPIO_Pin_10; // Tx | Rx
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||
|
||||
// Configure USART baud rate
|
||||
USART_StructInit(&USART_InitStructure);
|
||||
USART_InitStructure.USART_BaudRate = speed;
|
||||
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
|
||||
USART_InitStructure.USART_StopBits = USART_StopBits_1;
|
||||
USART_InitStructure.USART_Parity = USART_Parity_No;
|
||||
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
|
||||
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
||||
USART_Init(USART1, &USART_InitStructure);
|
||||
|
||||
USART_Cmd(USART1, ENABLE);
|
||||
|
||||
USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
|
||||
|
||||
// initialize the fifos
|
||||
TXSerialfifoinit1();
|
||||
RXSerialfifoinit1();
|
||||
}
|
||||
|
||||
uint8_t AvailUSART1(void)
|
||||
{
|
||||
if (RXSerialfifolevel1() > 0U)
|
||||
return 1U;
|
||||
else
|
||||
return 0U;
|
||||
}
|
||||
|
||||
uint8_t ReadUSART1(void)
|
||||
{
|
||||
uint8_t data_c = RXSerialfifo1[RXSerialfifotail1];
|
||||
|
||||
RXSerialfifotail1++;
|
||||
if (RXSerialfifotail1 >= RX_SERIAL_FIFO_SIZE)
|
||||
RXSerialfifotail1 = 0U;
|
||||
|
||||
return data_c;
|
||||
}
|
||||
|
||||
void WriteUSART1(const uint8_t* data, uint16_t length)
|
||||
{
|
||||
for (uint16_t i = 0U; i < length; i++)
|
||||
TXSerialfifoput1(data[i]);
|
||||
|
||||
USART_ITConfig(USART1, USART_IT_TXE, ENABLE);
|
||||
}
|
||||
|
||||
/* ************* USART3 ***************** */
|
||||
|
||||
// Init queues
|
||||
void TXSerialfifoinit3()
|
||||
{
|
||||
TXSerialfifohead3 = 0U;
|
||||
TXSerialfifotail3 = 0U;
|
||||
}
|
||||
|
||||
void RXSerialfifoinit3()
|
||||
{
|
||||
RXSerialfifohead3 = 0U;
|
||||
RXSerialfifotail3 = 0U;
|
||||
}
|
||||
|
||||
// How full is queue
|
||||
// TODO decide if how full or how empty is preferred info to return
|
||||
uint16_t TXSerialfifolevel3()
|
||||
{
|
||||
uint32_t tail = TXSerialfifotail3;
|
||||
uint32_t head = TXSerialfifohead3;
|
||||
|
||||
if (tail > head)
|
||||
return TX_SERIAL_FIFO_SIZE + head - tail;
|
||||
else
|
||||
return head - tail;
|
||||
}
|
||||
|
||||
uint16_t RXSerialfifolevel3()
|
||||
{
|
||||
uint32_t tail = RXSerialfifotail3;
|
||||
uint32_t head = RXSerialfifohead3;
|
||||
|
||||
if (tail > head)
|
||||
return RX_SERIAL_FIFO_SIZE + head - tail;
|
||||
else
|
||||
return head - tail;
|
||||
}
|
||||
|
||||
// Flushes the transmit shift register
|
||||
// warning: this call is blocking
|
||||
void TXSerialFlush3()
|
||||
{
|
||||
// wait until the TXE shows the shift register is empty
|
||||
while (USART_GetITStatus(USART3, USART_FLAG_TXE))
|
||||
;
|
||||
}
|
||||
|
||||
uint8_t TXSerialfifoput3(uint8_t next)
|
||||
{
|
||||
if (TXSerialfifolevel3() < TX_SERIAL_FIFO_SIZE) {
|
||||
TXSerialfifo3[TXSerialfifohead3] = next;
|
||||
|
||||
TXSerialfifohead3++;
|
||||
if (TXSerialfifohead3 >= TX_SERIAL_FIFO_SIZE)
|
||||
TXSerialfifohead3 = 0U;
|
||||
|
||||
// make sure transmit interrupts are enabled as long as there is data to send
|
||||
USART_ITConfig(USART3, USART_IT_TXE, ENABLE);
|
||||
return 1U;
|
||||
} else {
|
||||
return 0U; // signal an overflow occurred by returning a zero count
|
||||
}
|
||||
}
|
||||
|
||||
void USART3_IRQHandler()
|
||||
{
|
||||
uint8_t c;
|
||||
|
||||
if (USART_GetITStatus(USART3, USART_IT_RXNE)) {
|
||||
c = (uint8_t) USART_ReceiveData(USART3);
|
||||
|
||||
if (RXSerialfifolevel3() < RX_SERIAL_FIFO_SIZE) {
|
||||
RXSerialfifo3[RXSerialfifohead3] = c;
|
||||
|
||||
RXSerialfifohead3++;
|
||||
if (RXSerialfifohead3 >= RX_SERIAL_FIFO_SIZE)
|
||||
RXSerialfifohead3 = 0U;
|
||||
} else {
|
||||
// TODO - do something if rx fifo is full?
|
||||
}
|
||||
|
||||
USART_ClearITPendingBit(USART3, USART_IT_RXNE);
|
||||
intcount3++;
|
||||
}
|
||||
|
||||
if (USART_GetITStatus(USART3, USART_IT_TXE)) {
|
||||
c = 0U;
|
||||
|
||||
if (TXSerialfifohead3 != TXSerialfifotail3) { // if the fifo is not empty
|
||||
c = TXSerialfifo3[TXSerialfifotail3];
|
||||
|
||||
TXSerialfifotail3++;
|
||||
if (TXSerialfifotail3 >= TX_SERIAL_FIFO_SIZE)
|
||||
TXSerialfifotail3 = 0U;
|
||||
|
||||
USART_SendData(USART3, c);
|
||||
} else { // if there's no more data to transmit then turn off TX interrupts
|
||||
USART_ITConfig(USART3, USART_IT_TXE, DISABLE);
|
||||
}
|
||||
|
||||
USART_ClearITPendingBit(USART3, USART_IT_TXE);
|
||||
}
|
||||
}
|
||||
|
||||
void InitUSART3(int speed)
|
||||
{
|
||||
// USART3 - TXD PB10 - RXD PB11 - pins when jumpered from FTDI board to F4Discovery board
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
USART_InitTypeDef USART_InitStructure;
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
|
||||
GPIO_PinAFConfig(GPIOB, GPIO_PinSource10, GPIO_AF_USART3);
|
||||
GPIO_PinAFConfig(GPIOB, GPIO_PinSource11, GPIO_AF_USART3);
|
||||
|
||||
// USART IRQ init
|
||||
NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
|
||||
NVIC_Init(&NVIC_InitStructure);
|
||||
|
||||
// Configure USART as alternate function
|
||||
GPIO_StructInit(&GPIO_InitStructure);
|
||||
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_11; // Tx | Rx
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
|
||||
// Configure USART baud rate
|
||||
USART_StructInit(&USART_InitStructure);
|
||||
USART_InitStructure.USART_BaudRate = speed;
|
||||
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
|
||||
USART_InitStructure.USART_StopBits = USART_StopBits_1;
|
||||
USART_InitStructure.USART_Parity = USART_Parity_No;
|
||||
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
|
||||
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
||||
USART_Init(USART3, &USART_InitStructure);
|
||||
|
||||
USART_Cmd(USART3, ENABLE);
|
||||
|
||||
USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);
|
||||
|
||||
// initialize the fifos
|
||||
TXSerialfifoinit3();
|
||||
RXSerialfifoinit3();
|
||||
}
|
||||
|
||||
uint8_t AvailUSART3(void)
|
||||
{
|
||||
if (RXSerialfifolevel3() > 0U)
|
||||
return 1U;
|
||||
else
|
||||
return 0U;
|
||||
}
|
||||
|
||||
uint8_t ReadUSART3(void)
|
||||
{
|
||||
uint8_t data_c = RXSerialfifo3[RXSerialfifotail3];
|
||||
|
||||
RXSerialfifotail3++;
|
||||
if (RXSerialfifotail3 >= RX_SERIAL_FIFO_SIZE)
|
||||
RXSerialfifotail3 = 0U;
|
||||
|
||||
return data_c;
|
||||
}
|
||||
|
||||
void WriteUSART3(const uint8_t* data, uint16_t length)
|
||||
{
|
||||
for (uint16_t i = 0U; i < length; i++)
|
||||
TXSerialfifoput3(data[i]);
|
||||
|
||||
USART_ITConfig(USART3, USART_IT_TXE, ENABLE);
|
||||
}
|
||||
|
||||
/////////////////////////////////////////////////////////////////
|
||||
|
||||
void CSerialPort::beginInt(uint8_t n, int speed)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
InitUSART3(speed);
|
||||
break;
|
||||
case 3U:
|
||||
InitUSART1(speed);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
int CSerialPort::availableInt(uint8_t n)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
return AvailUSART3();
|
||||
case 3U:
|
||||
return AvailUSART1();
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t CSerialPort::readInt(uint8_t n)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
return ReadUSART3();
|
||||
case 3U:
|
||||
return ReadUSART1();
|
||||
default:
|
||||
return 0U;
|
||||
}
|
||||
}
|
||||
|
||||
void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool flush)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
WriteUSART3(data, length);
|
||||
if (flush)
|
||||
TXSerialFlush3();
|
||||
break;
|
||||
case 3U:
|
||||
WriteUSART1(data, length);
|
||||
if (flush)
|
||||
TXSerialFlush1();
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
7
Utils.h
7
Utils.h
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (C) 2015 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
@ -19,7 +19,12 @@
|
|||
#if !defined(UTILS_H)
|
||||
#define UTILS_H
|
||||
|
||||
#if defined(STM32F4XX) || defined(STM32F4)
|
||||
#include "stm32f4xx.h"
|
||||
#include <cstddef>
|
||||
#else
|
||||
#include <Arduino.h>
|
||||
#endif
|
||||
|
||||
uint8_t countBits8(uint8_t bits);
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,170 @@
|
|||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
** File : stm32_flash.ld
|
||||
**
|
||||
** Abstract : Linker script for STM32F407VG Device with
|
||||
** 1024KByte FLASH, 192KByte RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Environment : Atollic TrueSTUDIO(R)
|
||||
**
|
||||
** Distribution: The file is distributed “as is,” without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
** (c)Copyright Atollic AB.
|
||||
** You may use this file as-is or modify it according to the needs of your
|
||||
** project. Distribution of this file (unmodified or modified) is not
|
||||
** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the
|
||||
** rights to distribute the assembled, compiled & linked contents of this
|
||||
** file as part of an application binary file, provided that it is built
|
||||
** using the Atollic TrueSTUDIO(R) toolchain.
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = 0x20020000; /* end of 128K RAM on AHB bus*/
|
||||
|
||||
/* Generate a link error if heap and stack don't fit into RAM */
|
||||
_Min_Heap_Size = 0; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 192K
|
||||
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data goes into FLASH */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
|
||||
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
|
||||
.ARM : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
} >FLASH
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} >FLASH
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} >FLASH
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(.fini_array*))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >FLASH
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = .;
|
||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */
|
||||
.data : AT ( _sidata )
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} >RAM
|
||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(4);
|
||||
} >RAM
|
||||
|
||||
/* MEMORY_bank1 section, code must be located here explicitly */
|
||||
/* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */
|
||||
.memory_b1_text :
|
||||
{
|
||||
*(.mb1text) /* .mb1text sections (code) */
|
||||
*(.mb1text*) /* .mb1text* sections (code) */
|
||||
*(.mb1rodata) /* read-only data (constants) */
|
||||
*(.mb1rodata*)
|
||||
} >MEMORY_B1
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
Loading…
Reference in New Issue