Move host communication port from USART2 to USART1

boxcar
Wojciech Krutnik 2017-05-31 15:05:58 +02:00
parent e53aec348e
commit 6d5f098e41
2 changed files with 38 additions and 37 deletions

View File

@ -46,8 +46,8 @@ TX PA4 analog output (DAC_OUT1)
EXT_CLK PA15 input (AF: TIM2_CH1_ETR)
USART2_TXD PA2 output (AF)
USART2_RXD PA3 input (AF)
USART1_TXD PA9 output (AF)
USART1_RXD PA10 input (AF)
*/
@ -91,10 +91,10 @@ USART2_RXD PA3 input (AF)
#define SRC_EXT_CLK 15
#define PORT_EXT_CLK GPIOA
#define PIN_USART2_TXD 2
#define PORT_USART2_TXD GPIOA
#define PIN_USART2_RXD 3
#define PORT_USART2_RXD GPIOA
#define PIN_USART1_TXD 9
#define PORT_USART1_TXD GPIOA
#define PIN_USART1_RXD 10
#define PORT_USART1_RXD GPIOA
#else // defined(STM32F1_POG)
#error "Either STM32F1_POG, or sth need to be defined"
@ -188,8 +188,8 @@ static inline void GPIOInit()
#endif
#endif
GPIOConfigPin(PORT_USART2_TXD, PIN_USART2_TXD, GPIO_CRL_MODE0_1|GPIO_CRL_CNF0_1);
GPIOConfigPin(PORT_USART2_RXD, PIN_USART2_RXD, GPIO_CRL_CNF0_0);
GPIOConfigPin(PORT_USART1_TXD, PIN_USART1_TXD, GPIO_CRL_MODE0_1|GPIO_CRL_CNF0_1);
GPIOConfigPin(PORT_USART1_RXD, PIN_USART1_RXD, GPIO_CRL_CNF0_0);
AFIO->MAPR = (AFIO->MAPR & ~AFIO_MAPR_SWJ_CFG) | AFIO_MAPR_SWJ_CFG_1;
}

View File

@ -26,10 +26,11 @@
Pin definitions (configuration in IOSTM_CMSIS.c):
- Host communication:
USART2 - TXD PA2 - RXD PA3
USART1 - TXD PA9 - RXD PA10
*/
#if defined(STM32F1)
// BaudRate calculator macro
@ -42,22 +43,22 @@ USART2 - TXD PA2 - RXD PA3
#define USART_BUFFER_SIZE 256U
DECLARE_RINGBUFFER_TYPE(USARTBuffer, USART_BUFFER_SIZE);
/* ************* USART2 ***************** */
static volatile USARTBuffer_t txBuffer2={.size=USART_BUFFER_SIZE};
static volatile USARTBuffer_t rxBuffer2={.size=USART_BUFFER_SIZE};
/* ************* USART1 ***************** */
static volatile USARTBuffer_t txBuffer1={.size=USART_BUFFER_SIZE};
static volatile USARTBuffer_t rxBuffer1={.size=USART_BUFFER_SIZE};
extern "C" {
bitband_t txe = (bitband_t)BITBAND_PERIPH(&USART2->SR, USART_SR_TXE_Pos);
bitband_t rxne = (bitband_t)BITBAND_PERIPH(&USART2->SR, USART_SR_RXNE_Pos);
bitband_t txeie = (bitband_t)BITBAND_PERIPH(&USART2->CR1, USART_CR1_TXEIE_Pos);
bitband_t txe = (bitband_t)BITBAND_PERIPH(&USART1->SR, USART_SR_TXE_Pos);
bitband_t rxne = (bitband_t)BITBAND_PERIPH(&USART1->SR, USART_SR_RXNE_Pos);
bitband_t txeie = (bitband_t)BITBAND_PERIPH(&USART1->CR1, USART_CR1_TXEIE_Pos);
RAMFUNC void USART2_IRQHandler()
RAMFUNC void USART1_IRQHandler()
{
/* Transmitting data */
if(*txe){
if(!(RINGBUFF_EMPTY(txBuffer2))){
USART2->DR = RINGBUFF_READ(txBuffer2);
if(!(RINGBUFF_EMPTY(txBuffer1))){
USART1->DR = RINGBUFF_READ(txBuffer1);
}else{ /* Buffer empty */
*txeie = 0; /* Don't send further data */
}
@ -65,42 +66,42 @@ extern "C" {
/* Receiving data */
if(*rxne){
RINGBUFF_WRITE(rxBuffer2, USART2->DR);
RINGBUFF_WRITE(rxBuffer1, USART1->DR);
}
}
}
void USART2Init(int speed)
void USART1Init(int speed)
{
RCC->APB1ENR |= RCC_APB1ENR_USART2EN;
RCC->APB2ENR |= RCC_APB2ENR_USART1EN;
USART2->BRR = USART_BRR(36000000UL, speed);
USART1->BRR = USART_BRR(72000000UL, speed);
USART2->CR1 = USART_CR1_UE | USART_CR1_TE |
USART1->CR1 = USART_CR1_UE | USART_CR1_TE |
USART_CR1_RE | USART_CR1_RXNEIE; // Enable USART and RX interrupt
NVIC_EnableIRQ(USART2_IRQn);
NVIC_EnableIRQ(USART1_IRQn);
}
RAMFUNC void USART2TxData(const uint8_t* data, uint16_t length)
RAMFUNC void USART1TxData(const uint8_t* data, uint16_t length)
{
NVIC_DisableIRQ(USART2_IRQn);
NVIC_DisableIRQ(USART1_IRQn);
/* Check remaining space in buffer */
if(RINGBUFF_COUNT(txBuffer2) + length > RINGBUFF_SIZE(txBuffer2)){
NVIC_EnableIRQ(USART2_IRQn);
if(RINGBUFF_COUNT(txBuffer1) + length > RINGBUFF_SIZE(txBuffer1)){
NVIC_EnableIRQ(USART1_IRQn);
return;
}
/* Append data to buffer */
while(length--){
RINGBUFF_WRITE(txBuffer2, *(data++));
RINGBUFF_WRITE(txBuffer1, *(data++));
}
/* Start sending data */
USART2->CR1 |= USART_CR1_TXEIE;
USART1->CR1 |= USART_CR1_TXEIE;
NVIC_EnableIRQ(USART2_IRQn);
NVIC_EnableIRQ(USART1_IRQn);
}
@ -110,7 +111,7 @@ void CSerialPort::beginInt(uint8_t n, int speed)
{
switch (n) {
case 1U:
USART2Init(speed);
USART1Init(speed);
break;
default:
break;
@ -121,7 +122,7 @@ int CSerialPort::availableInt(uint8_t n)
{
switch (n) {
case 1U:
return !RINGBUFF_EMPTY(rxBuffer2);
return !RINGBUFF_EMPTY(rxBuffer1);
default:
return false;
}
@ -131,7 +132,7 @@ uint8_t CSerialPort::readInt(uint8_t n)
{
switch (n) {
case 1U:
return RINGBUFF_READ(rxBuffer2);
return RINGBUFF_READ(rxBuffer1);
default:
return 0U;
}
@ -139,15 +140,15 @@ uint8_t CSerialPort::readInt(uint8_t n)
void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool flush)
{
bitband_t tc = (bitband_t)BITBAND_PERIPH(&USART2->SR, USART_SR_TC_Pos);
bitband_t tc = (bitband_t)BITBAND_PERIPH(&USART1->SR, USART_SR_TC_Pos);
switch (n) {
case 1U:
USART2TxData(data, length);
USART1TxData(data, length);
*tc = 0;
if (flush) {
while (!RINGBUFF_EMPTY(txBuffer2) || !tc)
while (!RINGBUFF_EMPTY(txBuffer1) || !tc)
;
}
break;