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Revert the DMR DMO TX changes.

c4fmdemod
Jonathan Naylor 2017-04-17 09:25:38 +01:00
parent f6f1198873
commit 8b31a53e4e
3 changed files with 4 additions and 71 deletions
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69
DMRDMOTX.cpp
View File

@ -42,21 +42,6 @@ const q15_t DMR_LEVELB = 963;
const q15_t DMR_LEVELC = -963;
const q15_t DMR_LEVELD = -2889;
// The PR FILL and BS Data Sync pattern.
const uint8_t IDLE_DATA[] =
{0x53U, 0xC2U, 0x5EU, 0xABU, 0xA8U, 0x67U, 0x1DU, 0xC7U, 0x38U, 0x3BU, 0xD9U,
0x36U, 0x00U, 0x0DU, 0xFFU, 0x57U, 0xD7U, 0x5DU, 0xF5U, 0xD0U, 0x03U, 0xF6U,
0xE4U, 0x65U, 0x17U, 0x1BU, 0x48U, 0xCAU, 0x6DU, 0x4FU, 0xC6U, 0x10U, 0xB4U};
const uint8_t CACH_INTERLEAVE[] =
{1U, 2U, 3U, 5U, 6U, 7U, 9U, 10U, 11U, 13U, 15U, 16U, 17U, 19U, 20U, 21U, 23U,
25U, 26U, 27U, 29U, 30U, 31U, 33U, 34U, 35U, 37U, 39U, 40U, 41U, 43U, 44U, 45U, 47U,
49U, 50U, 51U, 53U, 54U, 55U, 57U, 58U, 59U, 61U, 63U, 64U, 65U, 67U, 68U, 69U, 71U,
73U, 74U, 75U, 77U, 78U, 79U, 81U, 82U, 83U, 85U, 87U, 88U, 89U, 91U, 92U, 93U, 95U};
const uint8_t EMPTY_SHORT_LC[] =
{0x00U, 0x00U, 0x00U, 0x00U, 0x00U, 0x00U, 0x00U, 0x00U, 0x00U, 0x00U, 0x00U, 0x00U};
const uint8_t BIT_MASK_TABLE[] = {0x80U, 0x40U, 0x20U, 0x10U, 0x08U, 0x04U, 0x02U, 0x01U};
#define WRITE_BIT1(p,i,b) p[(i)>>3] = (b) ? (p[(i)>>3] | BIT_MASK_TABLE[(i)&7]) : (p[(i)>>3] & ~BIT_MASK_TABLE[(i)&7])
@ -71,9 +56,7 @@ m_modState(),
m_poBuffer(),
m_poLen(0U),
m_poPtr(0U),
m_txDelay(240U), // 200ms
m_idle(),
m_cachPtr(0U)
m_txDelay(240U) // 200ms
{
::memset(m_modState, 0x00U, 16U * sizeof(q15_t));
@ -92,15 +75,11 @@ void CDMRDMOTX::process()
m_poLen = m_txDelay;
} else {
createCACH(m_poBuffer + 0U, 0U);
for (unsigned int i = 0U; i < 72U; i++)
m_poBuffer[i] = DMR_SYNC;
for (unsigned int i = 0U; i < DMR_FRAME_LENGTH_BYTES; i++)
m_poBuffer[i + 3U] = m_fifo.get();
createCACH(m_poBuffer + 36U, 1U);
for (unsigned int i = 0U; i < DMR_FRAME_LENGTH_BYTES; i++)
m_poBuffer[i + 39U] = m_idle[i];
m_poBuffer[i + 39U] = m_fifo.get();
m_poLen = 72U;
}
@ -184,43 +163,3 @@ void CDMRDMOTX::setTXDelay(uint8_t delay)
m_txDelay = 1200U;
}
void CDMRDMOTX::createCACH(uint8_t* buffer, uint8_t slotIndex)
{
if (m_cachPtr >= 12U)
m_cachPtr = 0U;
::memcpy(buffer, EMPTY_SHORT_LC + m_cachPtr, 3U);
bool at = true;
bool tc = slotIndex == 1U;
bool ls0 = true; // For 1 and 2
bool ls1 = true;
if (m_cachPtr == 0U) // For 0
ls1 = false;
else if (m_cachPtr == 9U) // For 3
ls0 = false;
bool h0 = at ^ tc ^ ls1;
bool h1 = tc ^ ls1 ^ ls0;
bool h2 = at ^ tc ^ ls0;
buffer[0U] |= at ? 0x80U : 0x00U;
buffer[0U] |= tc ? 0x08U : 0x00U;
buffer[1U] |= ls1 ? 0x80U : 0x00U;
buffer[1U] |= ls0 ? 0x08U : 0x00U;
buffer[1U] |= h0 ? 0x02U : 0x00U;
buffer[2U] |= h1 ? 0x20U : 0x00U;
buffer[2U] |= h2 ? 0x02U : 0x00U;
m_cachPtr += 3U;
}
void CDMRDMOTX::setColorCode(uint8_t colorCode)
{
::memcpy(m_idle, IDLE_DATA, DMR_FRAME_LENGTH_BYTES);
CDMRSlotType slotType;
slotType.encode(colorCode, DT_IDLE, m_idle);
}

5
DMRDMOTX.h
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@ -37,8 +37,6 @@ public:
uint8_t getSpace() const;
void setColorCode(uint8_t colorCode);
private:
CSerialRB m_fifo;
arm_fir_interpolate_instance_q15 m_modFilter;
@ -47,10 +45,7 @@ private:
uint16_t m_poLen;
uint16_t m_poPtr;
uint32_t m_txDelay;
uint8_t m_idle[DMR_FRAME_LENGTH_BYTES];
uint8_t m_cachPtr;
void createCACH(uint8_t* buffer, uint8_t slotIndex);
void writeByte(uint8_t c);
};

1
SerialPort.cpp
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@ -282,7 +282,6 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
dmrTX.setColorCode(colorCode);
dmrRX.setColorCode(colorCode);
dmrRX.setDelay(dmrDelay);
dmrDMOTX.setColorCode(colorCode);
dmrDMORX.setColorCode(colorCode);
dmrIdleRX.setColorCode(colorCode);