mirror of https://github.com/markqvist/MMDVM.git
Merge remote-tracking branch 'g4klx/master'
commit
fc200c4cd7
1
Config.h
1
Config.h
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@ -62,4 +62,3 @@
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// #define SERIAL_REPEATER
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// #define SERIAL_REPEATER
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#endif
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#endif
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14
IODue.cpp
14
IODue.cpp
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@ -51,6 +51,8 @@
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#define ADC_CDR_Chan 13
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#define ADC_CDR_Chan 13
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#define DACC_MR_USER_SEL_Chan DACC_MR_USER_SEL_CHANNEL1 // DAC on Due DAC1
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#define DACC_MR_USER_SEL_Chan DACC_MR_USER_SEL_CHANNEL1 // DAC on Due DAC1
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#define DACC_CHER_Chan DACC_CHER_CH1
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#define DACC_CHER_Chan DACC_CHER_CH1
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#define RSSI_CHER_Chan (1<<1) // ADC on Due pin A6 - Due AD1 - (1 << 1)
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#define RSSI_CDR_Chan 1
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#elif defined(ARDUINO_DUE_NTH)
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#elif defined(ARDUINO_DUE_NTH)
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#define PIN_COS A7
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#define PIN_COS A7
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#define PIN_PTT A8
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#define PIN_PTT A8
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@ -64,6 +66,8 @@
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#define ADC_CDR_Chan 7
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#define ADC_CDR_Chan 7
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#define DACC_MR_USER_SEL_Chan DACC_MR_USER_SEL_CHANNEL0 // DAC on Due DAC0
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#define DACC_MR_USER_SEL_Chan DACC_MR_USER_SEL_CHANNEL0 // DAC on Due DAC0
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#define DACC_CHER_Chan DACC_CHER_CH0
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#define DACC_CHER_Chan DACC_CHER_CH0
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#define RSSI_CHER_Chan (1<<1) // ADC on Due pin A6 - Due AD1 - (1 << 1)
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#define RSSI_CDR_Chan 1
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#else
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#else
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#error "Either ARDUINO_DUE_PAPA, ARDUINO_DUE_ZUM_V10, or ARDUINO_DUE_NTH need to be defined"
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#error "Either ARDUINO_DUE_PAPA, ARDUINO_DUE_ZUM_V10, or ARDUINO_DUE_NTH need to be defined"
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#endif
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#endif
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@ -104,7 +108,10 @@ void CIO::startInt()
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ADC->ADC_IDR = 0xFFFFFFFF; // Disable interrupts
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ADC->ADC_IDR = 0xFFFFFFFF; // Disable interrupts
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ADC->ADC_IER = ADC_CHER_Chan; // Enable End-Of-Conv interrupt
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ADC->ADC_IER = ADC_CHER_Chan; // Enable End-Of-Conv interrupt
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ADC->ADC_CHDR = 0xFFFF; // Disable all channels
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ADC->ADC_CHDR = 0xFFFF; // Disable all channels
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ADC->ADC_CHER = ADC_CHER_Chan; // Enable just one channel
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ADC->ADC_CHER = ADC_CHER_Chan; // Enable rx input channel
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#if defined(SEND_RSSI_DATA)
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ADC->ADC_CHER |= RSSI_CHER_Chan; // and RSSI input
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#endif
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ADC->ADC_CGR = 0x15555555; // All gains set to x1
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ADC->ADC_CGR = 0x15555555; // All gains set to x1
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ADC->ADC_COR = 0x00000000; // All offsets off
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ADC->ADC_COR = 0x00000000; // All offsets off
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ADC->ADC_MR = (ADC->ADC_MR & 0xFFFFFFF0) | (1 << 1) | ADC_MR_TRGEN; // 1 = trig source TIO from TC0
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ADC->ADC_MR = (ADC->ADC_MR & 0xFFFFFFF0) | (1 << 1) | ADC_MR_TRGEN; // 1 = trig source TIO from TC0
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@ -169,7 +176,11 @@ void CIO::interrupt(uint8_t source)
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sample = ADC->ADC_CDR[ADC_CDR_Chan];
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sample = ADC->ADC_CDR[ADC_CDR_Chan];
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m_rxBuffer.put(sample, control);
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m_rxBuffer.put(sample, control);
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#if defined(SEND_RSSI_DATA)
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m_rssiBuffer.put(ADC->ADC_CDR[RSSI_CDR_Chan]);
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#else
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m_rssiBuffer.put(0U);
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m_rssiBuffer.put(0U);
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#endif
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m_watchdog++;
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m_watchdog++;
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}
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}
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@ -216,4 +227,3 @@ void CIO::setP25Int(bool on)
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}
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}
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#endif
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#endif
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35
IOTeensy.cpp
35
IOTeensy.cpp
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@ -77,14 +77,14 @@ void CIO::startInt()
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{
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{
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// Initialise the DAC
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// Initialise the DAC
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SIM_SCGC2 |= SIM_SCGC2_DAC0;
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SIM_SCGC2 |= SIM_SCGC2_DAC0;
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DAC0_C0 = DAC_C0_DACEN | DAC_C0_DACRFS; // 1.2V VDDA is DACREF_2
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DAC0_C0 = DAC_C0_DACEN | DAC_C0_DACRFS; // 3.3V VDDA is DACREF_2
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// Initialise ADC0
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// Initialise ADC0
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SIM_SCGC6 |= SIM_SCGC6_ADC0;
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SIM_SCGC6 |= SIM_SCGC6_ADC0;
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ADC0_CFG1 = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) | // Single-ended 12 bits, long sample time
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ADC0_CFG1 = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) | // Single-ended 12 bits, long sample time
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ADC_CFG1_MODE(1) | ADC_CFG1_ADLSMP;
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ADC_CFG1_MODE(1) | ADC_CFG1_ADLSMP;
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ADC0_CFG2 = ADC_CFG2_MUXSEL | ADC_CFG2_ADLSTS(2); // Select channels ADxxxb
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ADC0_CFG2 = ADC_CFG2_MUXSEL | ADC_CFG2_ADLSTS(2); // Select channels ADxxxb
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ADC0_SC2 = ADC_SC2_REFSEL(1) | ADC_SC2_ADTRG; // Voltage ref internal, hardware trigger
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ADC0_SC2 = ADC_SC2_REFSEL(0) | ADC_SC2_ADTRG; // Voltage ref external, hardware trigger
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ADC0_SC3 = ADC_SC3_AVGE | ADC_SC3_AVGS(0); // Enable averaging, 4 samples
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ADC0_SC3 = ADC_SC3_AVGE | ADC_SC3_AVGS(0); // Enable averaging, 4 samples
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ADC0_SC3 |= ADC_SC3_CAL;
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ADC0_SC3 |= ADC_SC3_CAL;
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@ -105,7 +105,7 @@ void CIO::startInt()
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ADC1_CFG1 = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) | // Single-ended 12 bits, long sample time
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ADC1_CFG1 = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) | // Single-ended 12 bits, long sample time
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ADC_CFG1_MODE(1) | ADC_CFG1_ADLSMP;
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ADC_CFG1_MODE(1) | ADC_CFG1_ADLSMP;
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ADC1_CFG2 = ADC_CFG2_MUXSEL | ADC_CFG2_ADLSTS(2); // Select channels ADxxxb
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ADC1_CFG2 = ADC_CFG2_MUXSEL | ADC_CFG2_ADLSTS(2); // Select channels ADxxxb
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ADC1_SC2 = ADC_SC2_REFSEL(1); // Voltage ref internal, software trigger
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ADC1_SC2 = ADC_SC2_REFSEL(0); // Voltage ref external, software trigger
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ADC1_SC3 = ADC_SC3_AVGE | ADC_SC3_AVGS(0); // Enable averaging, 4 samples
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ADC1_SC3 = ADC_SC3_AVGE | ADC_SC3_AVGS(0); // Enable averaging, 4 samples
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ADC1_SC3 |= ADC_SC3_CAL;
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ADC1_SC3 |= ADC_SC3_CAL;
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@ -117,13 +117,11 @@ void CIO::startInt()
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sum1 = (sum1 / 2U) | 0x8000U;
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sum1 = (sum1 / 2U) | 0x8000U;
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ADC1_PG = sum1;
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ADC1_PG = sum1;
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NVIC_ENABLE_IRQ(IRQ_ADC1);
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#endif
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#endif
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#if defined(EXTERNAL_OSC)
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#if defined(EXTERNAL_OSC)
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// Set ADC0 to trigger from the LPTMR at 24 kHz
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// Set ADC0 to trigger from the LPTMR at 24 kHz
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SIM_SOPT7 = SIM_SOPT7_ADC0ALTTRGEN | // Enable ADC0 alternate trigger
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SIM_SOPT7 = SIM_SOPT7_ADC0ALTTRGEN | // Enable ADC0 alternate trigger
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SIM_SOPT7_ADC0PRETRGSEL | // Enable ADC0 pre-trigger
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SIM_SOPT7_ADC0TRGSEL(14); // Trigger ADC0 by LPTMR0
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SIM_SOPT7_ADC0TRGSEL(14); // Trigger ADC0 by LPTMR0
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CORE_PIN13_CONFIG = PORT_PCR_MUX(3);
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CORE_PIN13_CONFIG = PORT_PCR_MUX(3);
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@ -163,25 +161,30 @@ void CIO::interrupt(uint8_t source)
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if ((ADC0_SC1A & ADC_SC1_COCO) == ADC_SC1_COCO) {
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if ((ADC0_SC1A & ADC_SC1_COCO) == ADC_SC1_COCO) {
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sample = ADC0_RA;
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sample = ADC0_RA;
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m_rxBuffer.put(sample, control);
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m_rxBuffer.put(sample, control);
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#if defined(SEND_RSSI_DATA)
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ADC1_SC1A = ADC_SC1_AIEN | PIN_RSSI;
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#else
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m_rssiBuffer.put(0U);
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#endif
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}
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}
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m_watchdog++;
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}
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#if defined(SEND_RSSI_DATA)
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#if defined(SEND_RSSI_DATA)
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if (source == 1U) { // ADC1
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if ((ADC1_SC1A & ADC_SC1_COCO) == ADC_SC1_COCO) {
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if ((ADC1_SC1A & ADC_SC1_COCO) == ADC_SC1_COCO) {
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uint16_t rssi = ADC1_RA;
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uint16_t rssi = ADC1_RA;
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m_rssiBuffer.put(rssi);
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m_rssiBuffer.put(rssi);
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}
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}
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}
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else {
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m_rssiBuffer.put(0U);
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}
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ADC1_SC1A = ADC_SC1_AIEN | PIN_RSSI; //start the next RSSI conversion
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#else
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m_rssiBuffer.put(0U);
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#endif
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#endif
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m_watchdog++;
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}
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}
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}
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bool CIO::getCOSInt()
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bool CIO::getCOSInt()
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