147 lines
4.2 KiB
C
147 lines
4.2 KiB
C
/**
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* \file
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* <!--
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* This file is part of BeRTOS.
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*
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* Bertos is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* As a special exception, you may use this file as part of a free software
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* library without restriction. Specifically, if other files instantiate
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* templates or use macros or inline functions from this file, or you compile
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* this file and link it with other files to produce an executable, this
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* file does not by itself cause the resulting executable to be covered by
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* the GNU General Public License. This exception does not however
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* invalidate any other reasons why the executable file might be covered by
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* the GNU General Public License.
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*
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* Copyright 2010 Develer S.r.l. (http://www.develer.com/)
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*
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* -->
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*
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* \brief Atmel SAM3 clock setup.
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*
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* \author Stefano Fedrigo <aleph@develer.com>
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*/
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#include "clock_sam3.h"
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#include <cfg/compiler.h>
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#include <cfg/macros.h>
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#include <io/sam3.h>
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/* Frequency of board main oscillator */
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#define BOARDOSC_FREQ 12000000
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/* Timer countdown timeout for clock initialization operations */
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#define CLOCK_TIMEOUT 0xFFFFFFFF
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#if CPU_FREQ == 84000000 || CPU_FREQ == 48000000
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INLINE uint32_t evaluate_pll(void)
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{
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return CKGR_PLLR_MUL(CPU_FREQ / BOARDOSC_FREQ * 2 - 1) | CKGR_PLLR_DIV(2);
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}
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#else
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#warning CPU clock frequency non-standard setting: multiplier and divider values \
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will be computed at runtime: effective computed frequency could be different \
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from expected.
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/*
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* Try to evaluate the correct divider and multiplier value depending
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* on the desired CPU frequency.
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*
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* We try all combinations in a certain range of divider and multiplier
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* values. Start with higher multipliers and divisors, generally better.
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*/
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INLINE uint32_t evaluate_pll(void)
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{
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int mul, div, best_mul, best_div;
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int best_delta = CPU_FREQ;
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int freq = 0;
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for (mul = 13; mul > 0; mul--)
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{
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for (div = 24; div > 0; div--)
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{
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freq = BOARDOSC_FREQ / div * (1 + mul);
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if (ABS((int)CPU_FREQ - freq) < best_delta) {
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best_delta = ABS((int)CPU_FREQ - freq);
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best_mul = mul;
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best_div = div;
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}
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}
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}
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return CKGR_PLLR_DIV(best_div) | CKGR_PLLR_MUL(best_mul);
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}
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#endif /* CPU_FREQ */
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void clock_init(void)
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{
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uint32_t timeout;
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/* Disable watchdog */
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WDT_MR = BV(WDT_WDDIS);
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/* Set wait states for flash access, needed for higher CPU clock rates */
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EEFC0_FMR = EEFC_FMR_FWS(3);
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#ifdef EEFC1_FMR
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EEFC1_FMR = EEFC_FMR_FWS(3);
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#endif
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// Initialize main oscillator
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if (!(CKGR_MOR & BV(CKGR_MOR_MOSCSEL)))
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{
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CKGR_MOR = CKGR_MOR_KEY(0x37) | CKGR_MOR_MOSCXTST(0x8)
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| BV(CKGR_MOR_MOSCRCEN) | BV(CKGR_MOR_MOSCXTEN);
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timeout = CLOCK_TIMEOUT;
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while (!(PMC_SR & BV(PMC_SR_MOSCXTS)) && --timeout);
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}
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// Switch to external oscillator
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CKGR_MOR = CKGR_MOR_KEY(0x37) | CKGR_MOR_MOSCXTST(0x8)
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| BV(CKGR_MOR_MOSCRCEN) | BV(CKGR_MOR_MOSCXTEN) | BV(CKGR_MOR_MOSCSEL);
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timeout = CLOCK_TIMEOUT;
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while (!(PMC_SR & BV(PMC_SR_MOSCXTS)) && --timeout);
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// Initialize and enable PLL clock
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CKGR_PLLR = evaluate_pll() | BV(CKGR_PLLR_STUCKTO1) | CKGR_PLLR_PLLCOUNT(0x2);
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timeout = CLOCK_TIMEOUT;
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while (!(PMC_SR & BV(PMC_SR_LOCK)) && --timeout);
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PMC_MCKR = PMC_MCKR_CSS_MAIN_CLK;
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timeout = CLOCK_TIMEOUT;
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while (!(PMC_SR & BV(PMC_SR_MCKRDY)) && --timeout);
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PMC_MCKR = PMC_MCKR_CSS_PLL_CLK;
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timeout = CLOCK_TIMEOUT;
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while (!(PMC_SR & BV(PMC_SR_MCKRDY)) && --timeout);
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/* Enable clock on PIO for inputs */
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// TODO: move this in gpio_init() for better power management?
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pmc_periphEnable(PIOA_ID);
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pmc_periphEnable(PIOB_ID);
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pmc_periphEnable(PIOC_ID);
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#ifdef PIOF_ID
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pmc_periphEnable(PIOD_ID);
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pmc_periphEnable(PIOE_ID);
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pmc_periphEnable(PIOF_ID);
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#endif
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}
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