53 lines
2.0 KiB
Plaintext
53 lines
2.0 KiB
Plaintext
/*- SRAM0 memory region -*/
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define symbol __region_RAM0_size__ = 0x10000 ;
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define symbol __region_RAM0_start__ = 0x20000000 ;
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define symbol __region_RAM0_end__ = __region_RAM0_start__+__region_RAM0_size__-1 ;
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export symbol __region_RAM0_size__ ;
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export symbol __region_RAM0_start__ ;
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export symbol __region_RAM0_end__ ;
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/*- SRAM1 memory region -*/
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define symbol __region_RAM1_size__ = 0x8000 ;
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define symbol __region_RAM1_start__ = 0x20080000 ;
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define symbol __region_RAM1_end__ = __region_RAM1_start__+__region_RAM1_size__-1 ;
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export symbol __region_RAM1_size__ ;
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export symbol __region_RAM1_start__ ;
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export symbol __region_RAM1_end__ ;
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/*- Continous SRAM region (SRAM0 is mirrored) -*/
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define symbol __region_RAM_size__ = __region_RAM0_size__+__region_RAM1_size__ ;
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define symbol __region_RAM_start__ = __region_RAM1_start__-__region_RAM0_size__ ;
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define symbol __region_RAM_end__ = __region_RAM1_end__ ;
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export symbol __region_RAM_size__ ;
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export symbol __region_RAM_start__ ;
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export symbol __region_RAM_end__ ;
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/*- NFC SRAM region -*/
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define symbol __region_NFC_RAM_start__ = 0x20100000 ;
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define symbol __region_NFC_RAM_end__ = 0x20100FFF ;
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export symbol __region_NFC_RAM_start__ ;
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export symbol __region_NFC_RAM_end__ ;
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/*-Vector table start*/
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define symbol __vector_start__ = __region_RAM_start__ ;
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/*-Sizes-*/
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define symbol __size_cstack__ = 0x2000 ;
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define symbol __size_heap__ = 0x2000 ;
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define memory mem with size = 4G ;
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define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
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define block CSTACK with alignment = 8, size = __size_cstack__ { };
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define block HEAP with alignment = 8, size = __size_heap__ { };
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initialize by copy with packing=none { readwrite };
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do not initialize { section .noinit };
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place at address mem:__vector_start__ { readonly section .vectors };
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place in RAM_region { readonly, readwrite, block CSTACK, block HEAP };
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