wolfBoot ZynqMP FSBL replacement - board PS init drop-in
========================================================

When wolfBoot replaces the Xilinx FSBL (ZYNQMP_FSBL=1), it must run the
board-specific PS initialization (PLLs, DDR controller + PHY training, MIO pin
mux, clocks) before any DDR/UART/QSPI/SD access. That init is generated by the
Xilinx tools from your hardware design (XSA) and is specific to your board and
DDR configuration. It carries the Xilinx copyright and is therefore NOT part of
the wolfBoot source tree.

What to drop here
-----------------
Copy your generated files into this directory:

    hal/board/zynqmp/psu_init_gpl.c
    hal/board/zynqmp/psu_init_gpl.h

For the ZCU102 reference board these are produced by PetaLinux/Vitis, e.g.:

    <petalinux-project>/project-spec/hw-description/psu_init_gpl.c
    <petalinux-project>/project-spec/hw-description/psu_init_gpl.h

or from the FSBL app sources:

    .../embeddedsw/lib/sw_apps/zynqmp_fsbl/misc/zcu102/psu_init_gpl.c

Use the GPL variant (psu_init_gpl.*). Do not edit it.

How it builds
-------------
The unmodified Xilinx file includes <xil_io.h> and <sleep.h>. wolfBoot supplies
minimal, wolfSSL-owned shims for those at hal/zynqmp/ (added to the include
path automatically). The Xilinx file defines the top-level psu_init(), which
hal/zynq.c calls at the start of hal_init().

Build (default location is this directory):

    make ZYNQMP_FSBL=1

Or point at the files elsewhere:

    make ZYNQMP_FSBL=1 ZYNQMP_PSU_INIT_DIR=/path/to/hw-description
