From 08e6a37ad7e7b8fefe71c6a0522b068b5334f9b5 Mon Sep 17 00:00:00 2001
From: David Garske <david@wolfssl.com>
Date: Wed, 10 May 2023 17:01:31 -0700
Subject: [PATCH] Fix to use correct boot ROM entry in stage1 linker script.

---
 hal/nxp_p1021_stage1.ld | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hal/nxp_p1021_stage1.ld b/hal/nxp_p1021_stage1.ld
index 2c2f4754..625f33a3 100644
--- a/hal/nxp_p1021_stage1.ld
+++ b/hal/nxp_p1021_stage1.ld
@@ -3,8 +3,8 @@ OUTPUT_ARCH( "powerpc" )
 ENTRY( _reset )
 
 /* Adjust base address to 0xF8F80000 is debugging (run from L2 cache) */
-/* Boot ROM out of reset mapped to 0xFFFF0000 */
-BASE_ADDR = 0xFFFF0000; /* 0xF8F80000 */
+/* Boot ROM out of reset mapped to 0xFFFFF000 */
+BASE_ADDR = 0xFFFFF000; /* 0xF8F80000 */
 
 /* Boot ROM requires it must be < 4KB */
 /* If debugging this can be increased */