WolfSSL
/
wolfBoot
mirror of https://github.com/wolfSSL/wolfBoot.git
1
0
Fork 0
Code Issues Releases Wiki Activity

Merge branch 'master' into nvm-encrypt-configs

pull/348/head
John Bland 2023-08-21 10:13:46 -04:00
parent 6302870a88 adce087884
commit 131df548e6
36 changed files with 1268 additions and 536 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

61
.github/workflows/test-build-mcux-sdk.yml vendored 100644
View File

@ -0,0 +1,61 @@
name: Wolfboot Reusable Build Workflow for MCUXpresso SDK
on:
workflow_call:
inputs:
arch:
required: true
type: string
config-file:
required: true
type: string
make-args:
required: false
type: string
jobs:
build:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v3
with:
submodules: true
- uses: actions/checkout@main
with:
repository: nxp-mcuxpresso/mcux-sdk
path: mcux-sdk
- uses: actions/checkout@main
with:
repository: nxp-mcuxpresso/CMSIS_5
path: CMSIS_5
- name: Workaround for sources.list
run: sudo sed -i 's|http://azure.archive.ubuntu.com/ubuntu/|http://mirror.arizona.edu/ubuntu/|g' /etc/apt/sources.list
- name: Update repository
run: sudo apt-get update
- name: Install cross compilers
run: |
sudo apt-get install -y gcc-arm-none-eabi
- name: make distclean
run: |
make distclean
- name: Select config
run: |
cp ${{inputs.config-file}} .config && make include/target.h
- name: Build tools
run: |
make -C tools/keytools && make -C tools/bin-assemble
- name: Build wolfboot
run: |
make MCUXSDK=1 MCUXPRESSO="$GITHUB_WORKSPACE/mcux-sdk" MCUXPRESSO_CMSIS="$GITHUB_WORKSPACE/CMSIS_5/CMSIS" ${{inputs.make-args}} V=1

2
.github/workflows/test-build-sim-tpm.yml vendored
View File

@ -48,7 +48,7 @@ jobs:
- name: Build tools
run: |
make keytools
make -C tools/keytools && make -C tools/bin-assemble
- name: Build wolfboot
run: |

10
.github/workflows/test-build.yml vendored
View File

@ -36,19 +36,15 @@ jobs:
- name: make clean
run: |
make keysclean && make -C tools/keytools clean && rm -f include/target.h
- name: Install wolfSSL
run: |
sudo apt-get install --no-install-recommends -y -q make libwolfssl-dev
make distclean
- name: Select config
run: |
cp ${{inputs.config-file}} .config && make include/target.h
- name: Build key tools
- name: Build tools
run: |
make -C tools/keytools
make -C tools/keytools && make -C tools/bin-assemble
- name: Build wolfboot
run: |

47
.github/workflows/test-configs.yml vendored
View File

@ -22,15 +22,35 @@ jobs:
# arch: riscv
# config-file: ./config/examples/hifive.config
# TODO: imx-rt1050.config
# TODO: imx-rt1060.config
imx_rt1050_test:
uses: ./.github/workflows/test-build-mcux-sdk.yml
with:
arch: arm
config-file: ./config/examples/imx-rt1050.config
# TODO: kinetis-k82f.config requires the KSDK
# kinetis_k82f_test:
# uses: ./.github/workflows/test-build.yml
# with:
# arch: arm
# config-file: ./config/examples/kinetis-k82f.config
imx_rt1060_test:
uses: ./.github/workflows/test-build-mcux-sdk.yml
with:
arch: arm
config-file: ./config/examples/imx-rt1060.config
imx_rt1064_test:
uses: ./.github/workflows/test-build-mcux-sdk.yml
with:
arch: arm
config-file: ./config/examples/imx-rt1064.config
kinetis_k64f_test:
uses: ./.github/workflows/test-build-mcux-sdk.yml
with:
arch: arm
config-file: ./config/examples/kinetis-k64f.config
kinetis_k82f_test:
uses: ./.github/workflows/test-build-mcux-sdk.yml
with:
arch: arm
config-file: ./config/examples/kinetis-k82f.config
library_test:
uses: ./.github/workflows/test-build.yml
@ -38,12 +58,11 @@ jobs:
arch: host
config-file: ./config/examples/library.config
# TODO: lpc54606j512.config requires MCUXPRESSO files
# lpc54606j512_test
# uses: ./.github/workflows/test-build.yml
# with:
# arch: arm
# config-file: ./config/examples/lpc54606j512.config
lpc54606j512_test:
uses: ./.github/workflows/test-build-mcux-sdk.yml
with:
arch: arm
config-file: ./config/examples/lpc54606j512.config
nrf52840_test:
uses: ./.github/workflows/test-build.yml

30
.github/workflows/test-keytools.yml vendored
View File

@ -16,28 +16,18 @@ jobs:
with:
submodules: true
- name: Workaround for sources.list
run: sudo sed -i 's|http://azure.archive.ubuntu.com/ubuntu/|http://mirror.arizona.edu/ubuntu/|g' /etc/apt/sources.list
- name: Update repository
run: sudo apt-get update
- name: Install wolfSSL
run: |
sudo apt-get install --no-install-recommends -y -q make libwolfssl-dev
# ECC
- name: make clean
run: |
make distclean && make keysclean && make -C tools/keytools clean && rm -f include/target.h
make distclean
- name: Select config
run: |
cp config/examples/sim-ecc.config .config && make include/target.h
- name: Build key tools
- name: Build tools
run: |
make -C tools/keytools
make -C tools/keytools && make -C tools/bin-assemble
- name: Build wolfboot
run: |
@ -67,18 +57,19 @@ jobs:
run: |
./tools/keytools/sign --ecc256 --sha256 --manual-sign test-app/image.elf public-key.der 1 test-app/image_v1.sig
# ED25519
- name: make clean
run: |
make distclean && make keysclean && make -C tools/keytools clean && rm -f include/target.h
make distclean
- name: Select config
run: |
cp config/examples/sim.config .config && make include/target.h
- name: Build key tools
- name: Build tools
run: |
make -C tools/keytools
make -C tools/keytools && make -C tools/bin-assemble
- name: Build wolfboot
run: |
@ -108,18 +99,19 @@ jobs:
run: |
./tools/keytools/sign --ed25519 --sha256 --manual-sign test-app/image.elf public-key.der 1 test-app/image_v1.sig
# RSA
- name: make clean
run: |
make distclean && make keysclean && make -C tools/keytools clean && rm -f include/target.h
make distclean
- name: Select config
run: |
cp config/examples/sim-rsa.config .config && make include/target.h
- name: Build key tools
- name: Build tools
run: |
make -C tools/keytools
make -C tools/keytools && make -C tools/bin-assemble
- name: Build wolfboot
run: |

114
.github/workflows/test-powerfail-simulator.yml vendored
View File

@ -17,19 +17,15 @@ jobs:
- name: make clean
run: |
make keysclean && make -C tools/keytools clean && rm -f include/target.h
make distclean
- name: Select config
run: |
cp config/examples/sim.config .config
- name: Build key tools
- name: Build tools
run: |
make -C tools/keytools
- name: Build bin assemble
run: |
make -C tools/bin-assemble
make -C tools/keytools && make -C tools/bin-assemble
- name: Build wolfboot.elf
run: |
@ -55,23 +51,19 @@ jobs:
run: |
tools/scripts/sim-update-powerfail-resume.sh
# TEST with NVM_WRITEONCE enabled
# TEST with NVM_WRITEONCE enabled
- name: make clean
run: |
make keysclean && make -C tools/keytools clean && rm -f include/target.h
make distclean
- name: Select config with NVM_WRITEONCE
run: |
cp config/examples/sim-nvm-writeonce.config .config
- name: Build key tools
- name: Build tools
run: |
make -C tools/keytools
- name: Build bin assemble
run: |
make -C tools/bin-assemble
make -C tools/keytools && make -C tools/bin-assemble
- name: Build wolfboot.elf
run: |
@ -97,89 +89,95 @@ jobs:
run: |
tools/scripts/sim-update-powerfail-resume.sh
# TEST with NVM_WRITEONCE AND FLAGS_HOME enabled
# TEST with NVM_WRITEONCE AND FLAGS_HOME enabled
- name: make clean
run: |
make keysclean && make -C tools/keytools clean && rm -f include/target.h
make distclean
- name: Select config with NVM_WRITEONCE and FLAGS_HOME
run: |
cp config/examples/sim-nvm-writeonce-flags-home.config .config
- name: Build key tools
- name: Build tools
run: |
make -C tools/keytools
- name: Build bin assemble
run: |
make -C tools/bin-assemble
make -C tools/keytools && make -C tools/bin-assemble
- name: Build wolfboot.elf
run: |
make clean && make test-sim-internal-flash-with-update
- name: Run sunny day update test (NVM_WRITEONCE FLAGS_HOME)
run: |
tools/scripts/sim-sunnyday-update.sh
- name: Rebuild wolfboot.elf
run: |
make clean && make test-sim-internal-flash-with-update
- name: Run update-revert test (NVM_WRITEONCE FLAGS_HOME)
run: |
tools/scripts/sim-update-fallback.sh
- name: Rebuild wolfboot.elf
run: |
make clean && make test-sim-internal-flash-with-update
- name: Run update-revert test with power failures (NVM_WRITEONCE FLAGS_HOME)
run: |
tools/scripts/sim-update-powerfail-resume.sh
# TEST with NVM_WRITEONCE AND FLAGS_HOME AND FLAGS_INVERT enabled
# TEST with NVM_WRITEONCE AND FLAGS_HOME AND FLAGS_INVERT enabled
- name: make clean
run: |
make keysclean && make -C tools/keytools clean && rm -f include/target.h
make distclean
- name: Select config with NVM_WRITEONCE and FLAGS_HOME and FLAGS_INVERT
run: |
cp config/examples/sim-nvm-writeonce-flags-home-invert.config .config
- name: Build key tools
- name: Build tools
run: |
make -C tools/keytools
- name: Build bin assemble
run: |
make -C tools/bin-assemble
make -C tools/keytools && make -C tools/bin-assemble
- name: Build wolfboot.elf
run: |
make clean && make test-sim-external-flash-with-update
- name: Run sunny day update test (NVM_WRITEONCE FLAGS_HOME FLAGS_INVERT)
run: |
tools/scripts/sim-sunnyday-update.sh
- name: Rebuild wolfboot.elf
run: |
make clean && make test-sim-external-flash-with-update
- name: Run update-revert test (NVM_WRITEONCE FLAGS_HOME)
run: |
tools/scripts/sim-update-fallback.sh
- name: Rebuild wolfboot.elf
run: |
make clean && make test-sim-external-flash-with-update
- name: Run update-revert test with power failures (NVM_WRITEONCE FLAGS_HOME FLAGS_INVERT)
run: |
tools/scripts/sim-update-powerfail-resume.sh
# TEST with DELTA updates
# TEST with DELTA updates
- name: make clean
run: |
make keysclean && make -C tools/keytools clean && rm -f include/target.h
make distclean
- name: Select config with DELTA updates
run: |
cp config/examples/sim-delta-update.config .config
- name: Build key tools
- name: Build tools
run: |
make -C tools/keytools
- name: Build bin assemble
run: |
make -C tools/bin-assemble
make -C tools/keytools && make -C tools/bin-assemble
- name: Build wolfboot.elf
run: |
@ -207,22 +205,17 @@ jobs:
# TEST with encryption (aes128)
- name: make clean
run: |
make keysclean && make -C tools/keytools clean && rm -f include/target.h
make distclean
- name: Select config with encrypted updates
run: |
cp config/examples/sim-encrypt-update.config .config
- name: Build key tools
- name: Build tools
run: |
make -C tools/keytools
- name: Build bin assemble
run: |
make -C tools/bin-assemble
make -C tools/keytools && make -C tools/bin-assemble
- name: Build wolfboot.elf
run: |
@ -249,22 +242,16 @@ jobs:
tools/scripts/sim-update-powerfail-resume.sh
# TEST with encryption (aes128) and delta updates
- name: make clean
run: |
make keysclean && make -C tools/keytools clean && rm -f include/target.h
make distclean
- name: Select config with encrypted updates
run: |
cp config/examples/sim-encrypt-delta-update.config .config
- name: Build key tools
- name: Build tools
run: |
make -C tools/keytools
- name: Build bin assemble
run: |
make -C tools/bin-assemble
make -C tools/keytools && make -C tools/bin-assemble
- name: Build wolfboot.elf
run: |
@ -290,35 +277,40 @@ jobs:
run: |
tools/scripts/sim-update-powerfail-resume.sh
# TEST with encryption (aes128) and NVM_WRITEONCE
# TEST with encryption (aes128) and NVM_WRITEONCE
- name: make clean
run: |
make keysclean && make -C tools/keytools clean && rm -f include/target.h
make distclean
- name: Select config with encrypted updates
run: |
cp config/examples/sim-encrypt-nvm-writeonce-update.config .config
- name: Build key tools
- name: Build tools
run: |
make -C tools/keytools
- name: Build bin assemble
run: |
make -C tools/bin-assemble
make -C tools/keytools && make -C tools/bin-assemble
- name: Build wolfboot.elf
run: |
make clean && make test-sim-external-flash-with-enc-update
- name: Run sunny day update test (AES128 NVM_WRITEONCE)
run: |
tools/scripts/sim-sunnyday-update.sh
- name: Rebuild wolfboot.elf
run: |
make clean && make test-sim-external-flash-with-enc-update
- name: Run update-revert test (AES128 NVM_WRITEONCE)
run: |
tools/scripts/sim-update-fallback.sh
- name: Rebuild wolfboot.elf
run: |
make clean && make test-sim-external-flash-with-enc-update
- name: Run update-revert test with power failures (AES128 NVM_WRITEONCE)
run: |
tools/scripts/sim-update-powerfail-resume.sh

6
IDE/CCS/TMS570LC43xx/README.md
View File

@ -97,7 +97,7 @@ MEMORY
In order to generate a signed image, the application is copied to a binary format and signed with the following commands
```
"c:\ti\ccs1031\ccs\tools\compiler\ti-cgt-arm_20.2.4.LTS\bin\armobjcopy.exe" -O binary application.out application.bin
".\tools\keytools\sign.exe" --ecc256 --sha256 application.bin ecc256.der 1
".\tools\keytools\sign.exe" --ecc256 --sha256 application.bin wolfboot_signing_private_key.der 1
```
Output should resemble:
@ -106,7 +106,7 @@ Update type: Firmware
Input image: application.bin
Selected cipher: ECC256
Selected hash : SHA256
Public key: ecc256.der
Public key: wolfboot_signing_private_key.der
Output image: application_v1_signed.bin
Calculating SHA256 digest...
Signing the firmware...
@ -116,7 +116,7 @@ Output image(s) successfully created.
To flash the signed image the following command can be used.
```
"c:\ti\ccs1031\ccs\ccs_base\scripting\examples\uniflash\cmdLine\uniflash.bat" -ccxml "IDE\CCS\TMS570LC43xx\flashHercules.ccxml" -setOptions FlashEraseSelection="Necessary Sectors Only (for Program Load)" -programBin application_v1_signed.bin 0x20000
"c:\ti\ccs1031\ccs\ccs_base\scripting\examples\uniflash\cmdLine\uniflash.bat" -ccxml "IDE\CCS\TMS570LC43xx\flashHercules.ccxml" -setOptions FlashEraseSelection="Necessary Sectors Only (for Program Load)" -programBin application_v1_signed.bin 0x20000
```
# Implementation notes

6
IDE/IAR/README.md
View File

@ -40,14 +40,14 @@ generate_key.bat
```
The script will generate a keypair. The file `ecc256.der` in the root of the repository contains the private key that will be used
to sign valid firmware images. The file `src/ecc256_pub_key.c` now contains the public key that the bootloader embeds in its codebase
The script will generate a keypair. The file `wolfboot_signing_private_key.der` in the root of the repository contains the private key that will be used
to sign valid firmware images. The file `src/keystore.c` now contains the public key that the bootloader embeds in its codebase
to use it later to verify the image.
### Compiling and linking the images
Now both projects (wolfboot and wolfboot-test-app) can be compiled and linked.
Now both projects (wolfboot and wolfboot-test-app) can be compiled and linked.
The two resulting images will be placed in the output directory `Debug/Exe`:
- wolfboot.bin
- wolfboot-test-app.bin

16
Makefile
View File

@ -10,7 +10,7 @@ include tools/config.mk
## Initializers
WOLFBOOT_ROOT?=$(PWD)
CFLAGS:=-D"__WOLFBOOT"
CFLAGS+=-Werror -Wextra
CFLAGS+=-Werror -Wextra -Wno-array-bounds
LSCRIPT:=config/target.ld
LSCRIPT_FLAGS:=
LDFLAGS:=
@ -20,6 +20,7 @@ LSCRIPT_IN:=hal/$(TARGET).ld
V?=0
DEBUG?=0
DEBUG_UART?=0
LIBS=
OBJS:= \
./hal/$(TARGET).o \
@ -159,7 +160,7 @@ keytools_check: keytools FORCE
$(PRIVATE_KEY):
$(Q)$(MAKE) keytools_check
$(Q)(test $(SIGN) = NONE) || ($(KEYGEN_TOOL) $(KEYGEN_OPTIONS) -g $(PRIVATE_KEY)) || true
$(Q)(test $(SIGN) = NONE) || ("$(KEYGEN_TOOL)" $(KEYGEN_OPTIONS) -g $(PRIVATE_KEY)) || true
$(Q)(test $(SIGN) = NONE) && (echo "// SIGN=NONE" > src/keystore.c) || true
keytools:
@ -174,8 +175,8 @@ tpmtools:
test-app/image_v1_signed.bin: $(BOOT_IMG)
@echo "\t[SIGN] $(BOOT_IMG)"
$(Q)(test $(SIGN) = NONE) || $(SIGN_TOOL) $(SIGN_OPTIONS) $(BOOT_IMG) $(PRIVATE_KEY) 1
$(Q)(test $(SIGN) = NONE) && $(SIGN_TOOL) $(SIGN_OPTIONS) $(BOOT_IMG) 1 || true
$(Q)(test $(SIGN) = NONE) || "$(SIGN_TOOL)" $(SIGN_OPTIONS) $(BOOT_IMG) $(PRIVATE_KEY) 1
$(Q)(test $(SIGN) = NONE) && "$(SIGN_TOOL)" $(SIGN_OPTIONS) $(BOOT_IMG) 1 || true
test-app/image.elf: wolfboot.elf
$(Q)$(MAKE) -C test-app WOLFBOOT_ROOT="$(WOLFBOOT_ROOT)" image.elf
@ -207,11 +208,11 @@ factory_wstage1.bin: $(BINASSEMBLE) stage1/loader_stage1.bin wolfboot.bin $(BOOT
wolfboot_stage1.bin: wolfboot.bin stage1/loader_stage1.bin
$(Q) cp stage1/loader_stage1.bin wolfboot_stage1.bin
wolfboot.elf: include/target.h $(LSCRIPT) $(OBJS) $(BINASSEMBLE) FORCE
wolfboot.elf: include/target.h $(LSCRIPT) $(OBJS) $(LIBS) $(BINASSEMBLE) FORCE
$(Q)(test $(SIGN) = NONE) || (grep -q $(SIGN) src/keystore.c) || (echo "Key mismatch: please run 'make distclean' to remove all keys if you want to change algorithm" && false)
@echo "\t[LD] $@"
@echo $(OBJS)
$(Q)$(LD) $(LDFLAGS) $(LSCRIPT_FLAGS) $(LD_START_GROUP) $(OBJS) $(LD_END_GROUP) -o $@
@echo $(OBJS) $(LIBS)
$(Q)$(LD) $(LDFLAGS) $(LSCRIPT_FLAGS) $(LD_START_GROUP) $(OBJS) $(LIBS) $(LD_END_GROUP) -o $@
$(LSCRIPT): $(LSCRIPT_IN) FORCE
@(test $(LSCRIPT_IN) != NONE) || (echo "Error: no linker script" \
@ -254,6 +255,7 @@ clean:
$(Q)rm -f lib/wolfssl/wolfcrypt/src/*.o lib/wolfTPM/src/*.o
$(Q)rm -f wolfboot.bin wolfboot.elf wolfboot.map test-update.rom wolfboot.hex
$(Q)rm -f $(MACHINE_OBJ) $(MAIN_TARGET) $(LSCRIPT)
$(Q)rm -f $(OBJS)
$(Q)$(MAKE) -C test-app -s clean
$(Q)$(MAKE) -C tools/check_config -s clean
$(Q)$(MAKE) -C stage1 -s clean

2
README.md
View File

@ -9,6 +9,8 @@ Due to the minimalist design of the bootloader and the tiny HAL API, wolfBoot is
from any OS or bare-metal application, and can be easily ported and integrated in existing embedded software
projects to provide a secure firmware update mechanism.
Design based on [RFC 9019](https://datatracker.ietf.org/doc/rfc9019/) - A Firmware Update Architecture for Internet of Things.
## Features
- Multi-slot partitioning of the flash device
- Integrity verification of the firmware image(s)

205
arch.mk
View File

@ -76,12 +76,13 @@ ifeq ($(ARCH),ARM)
ifeq ($(TARGET),samr21)
CORTEX_M0=1
endif
ifeq ($(TARGET),imx_rt)
CORTEX_M7=1
endif
ifeq ($(TARGET),stm32l0)
CORTEX_M0=1
SPI_TARGET=stm32
endif
ifeq ($(TARGET),stm32g0)
CORTEX_M0=1
ARCH_FLASH_OFFSET=0x08000000
@ -193,6 +194,7 @@ ifeq ($(ARCH),ARM)
endif
endif
else
# default Cortex M3/M4
ifeq ($(NO_ASM),1)
ifeq ($(SPMATH),1)
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
@ -249,61 +251,118 @@ ifeq ($(ARCH),PPC)
endif
ifeq ($(TARGET),kinetis)
CFLAGS+= -I$(MCUXPRESSO_DRIVERS)/drivers -I$(MCUXPRESSO_DRIVERS) -DCPU_$(MCUXPRESSO_CPU) -I$(MCUXPRESSO_CMSIS)/Include -DDEBUG_CONSOLE_ASSERT_DISABLE=1
OBJS+= $(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o $(MCUXPRESSO_DRIVERS)/drivers/fsl_ftfx_flash.o $(MCUXPRESSO_DRIVERS)/drivers/fsl_ftfx_cache.o $(MCUXPRESSO_DRIVERS)/drivers/fsl_ftfx_controller.o
CFLAGS+=\
-I$(MCUXPRESSO_DRIVERS) \
-I$(MCUXPRESSO_DRIVERS)/drivers \
-I$(MCUXPRESSO)/drivers \
-I$(MCUXPRESSO)/drivers/common \
-I$(MCUXPRESSO_CMSIS)/Include \
-I$(MCUXPRESSO_CMSIS)/Core/Include
CFLAGS+=\
-DCPU_$(MCUXPRESSO_CPU) -DDEBUG_CONSOLE_ASSERT_DISABLE=1 -DNVM_FLASH_WRITEONCE=1
OBJS+=\
$(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o
ifeq ($(MCUXSDK),1)
CFLAGS+=\
-I$(MCUXPRESSO)/drivers/flash \
-I$(MCUXPRESSO)/drivers/sysmpu \
-I$(MCUXPRESSO)/drivers/ltc \
-I$(MCUXPRESSO)/drivers/port \
-I$(MCUXPRESSO)/drivers/gpio
OBJS+=\
$(MCUXPRESSO)/drivers/flash/fsl_ftfx_flash.o \
$(MCUXPRESSO)/drivers/flash/fsl_ftfx_cache.o \
$(MCUXPRESSO)/drivers/flash/fsl_ftfx_controller.o
else
OBJS+=\
$(MCUXPRESSO_DRIVERS)/drivers/fsl_ftfx_flash.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_ftfx_cache.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_ftfx_controller.o
endif
## The following lines can be used to enable HW acceleration
ifeq ($(MCUXPRESSO_CPU),MK82FN256VLL15)
ifeq ($(PKA),1)
PKA_EXTRA_CFLAGS+=-DFREESCALE_LTC_ECC -DFREESCALE_USE_LTC -DFREESCALE_LTC_TFM
PKA_EXTRA_OBJS+=./lib/wolfssl/wolfcrypt/src/port/nxp/ksdk_port.o $(MCUXPRESSO_DRIVERS)/drivers/fsl_ltc.o
PKA_EXTRA_CFLAGS+=-DFREESCALE_USE_LTC
PKA_EXTRA_OBJS+=./lib/wolfssl/wolfcrypt/src/port/nxp/ksdk_port.o
ifeq ($(MCUXSDK),1)
PKA_EXTRA_OBJS+=$(MCUXPRESSO)/drivers/ltc/fsl_ltc.o
else
PKA_EXTRA_OBJS+=$(MCUXPRESSO_DRIVERS)/drivers/fsl_ltc.o
endif
endif
endif
endif
ifeq ($(TARGET),imx_rt)
CORTEX_M7=1
CFLAGS+=-I$(MCUXPRESSO_DRIVERS)/drivers -I$(MCUXPRESSO_DRIVERS) \
-I$(MCUXPRESSO_DRIVERS)/utilities/debug_console/ \
-I$(MCUXPRESSO_DRIVERS)/utilities/str/ \
-I$(MCUXPRESSO)/components/uart/ \
CFLAGS+=\
-I$(MCUXPRESSO_DRIVERS) \
-I$(MCUXPRESSO_DRIVERS)/drivers \
-I$(MCUXPRESSO)/drivers \
-I$(MCUXPRESSO)/drivers/common \
-I$(MCUXPRESSO)/drivers/flexspi \
-I$(MCUXPRESSO)/drivers/lpuart \
-I$(MCUXPRESSO)/drivers/igpio \
-I$(MCUXPRESSO)/components/uart \
-I$(MCUXPRESSO)/components/flash/nor \
-I$(MCUXPRESSO)/components/flash/nor/flexspi \
-I$(MCUXPRESSO)/components/serial_manager/ \
-DCPU_$(MCUXPRESSO_CPU) -I$(MCUXPRESSO_CMSIS)/Include \
-DCPU_$(MCUXPRESSO_CPU) -I$(MCUXPRESSO_CMSIS)/Core/Include \
-DDEBUG_CONSOLE_ASSERT_DISABLE=1 -I$(MCUXPRESSO_DRIVERS)/project_template/ \
-I$(MCUXPRESSO)/components/serial_manager \
-I$(MCUXPRESSO_DRIVERS)/project_template \
-I$(MCUXPRESSO_CMSIS)/Include \
-I$(MCUXPRESSO_CMSIS)/Core/Include
CFLAGS+=\
-DCPU_$(MCUXPRESSO_CPU) \
-DDEBUG_CONSOLE_ASSERT_DISABLE=1 \
-DXIP_EXTERNAL_FLASH=1 -DDEBUG_CONSOLE_ASSERT_DISABLE=1 -DPRINTF_ADVANCED_ENABLE=1 \
-DSCANF_ADVANCED_ENABLE=1 -DSERIAL_PORT_TYPE_UART=1 -DNDEBUG=1
OBJS+= $(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o $(MCUXPRESSO_DRIVERS)/drivers/fsl_flexspi.o
ifeq ($(MCUXSDK),1)
CFLAGS+=\
-I$(MCUXPRESSO)/utilities/str \
-I$(MCUXPRESSO)/utilities/debug_console
OBJS+=\
$(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o \
$(MCUXPRESSO)/drivers/flexspi/fsl_flexspi.o
ifeq ($(DEBUG_UART),1)
OBJS+= $(MCUXPRESSO)/drivers/lpuart/fsl_lpuart.o
endif
else
CFLAGS+=\
-I$(MCUXPRESSO_DRIVERS)/utilities/str \
-I$(MCUXPRESSO_DRIVERS)/utilities/debug_console
OBJS+=\
$(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_flexspi.o
ifeq ($(DEBUG_UART),1)
OBJS+= $(MCUXPRESSO_DRIVERS)/drivers/fsl_lpuart.o
endif
endif
ifeq ($(MCUXPRESSO_CPU),MIMXRT1064DVL6A)
ARCH_FLASH_OFFSET=0x70000000
CFLAGS+=-I$(MCUXPRESSO)/boards/evkmimxrt1064/xip/
ifeq ($(PKA),1)
PKA_EXTRA_OBJS+= $(MCUXPRESSO)/devices/MIMXRT1064/drivers/fsl_dcp.o
endif
ARCH_FLASH_OFFSET=0x70000000
CFLAGS+=-I$(MCUXPRESSO)/boards/evkmimxrt1064/xip/
endif
ifeq ($(MCUXPRESSO_CPU),MIMXRT1062DVL6A)
ARCH_FLASH_OFFSET=0x60000000
CFLAGS+=-I$(MCUXPRESSO)/boards/evkmimxrt1060/xip/
ifeq ($(PKA),1)
PKA_EXTRA_OBJS+= $(MCUXPRESSO)/devices/MIMXRT1062/drivers/fsl_dcp.o
endif
endif
ifeq ($(MCUXPRESSO_CPU),MIMXRT1052DVJ6B)
ARCH_FLASH_OFFSET=0x60000000
CFLAGS+=-I$(MCUXPRESSO)/boards/evkbimxrt1050/xip/
ifeq ($(PKA),1)
PKA_EXTRA_OBJS+= $(MCUXPRESSO)/devices/MIMXRT1052/drivers/fsl_dcp.o
endif
endif
ifeq ($(PKA),1)
PKA_EXTRA_OBJS+=./lib/wolfssl/wolfcrypt/src/port/nxp/dcp_port.o
PKA_EXTRA_CFLAGS+=-DWOLFSSL_IMXRT_DCP
ifeq ($(MCUXSDK),1)
PKA_EXTRA_OBJS+= $(MCUXPRESSO)/drivers/fsl_dcp.o
else
PKA_EXTRA_OBJS+= $(MCUXPRESSO_DRIVERS)/drivers/fsl_dcp.o
endif
PKA_EXTRA_OBJS+=./lib/wolfssl/wolfcrypt/src/port/nxp/dcp_port.o
PKA_EXTRA_CFLAGS+=-DWOLFSSL_IMXRT_DCP
endif
endif
@ -394,40 +453,70 @@ ifeq ($(TARGET),ti_hercules)
endif
ifeq ($(TARGET),lpc)
CFLAGS+=-I$(MCUXPRESSO_DRIVERS)/drivers -I$(MCUXPRESSO_DRIVERS) -DCPU_$(MCUXPRESSO_CPU) -I$(MCUXPRESSO_CMSIS)/Include -DDEBUG_CONSOLE_ASSERT_DISABLE=1
OBJS+=$(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o $(MCUXPRESSO_DRIVERS)/drivers/fsl_flashiap.o $(MCUXPRESSO_DRIVERS)/drivers/fsl_power.o $(MCUXPRESSO_DRIVERS)/drivers/fsl_reset.o
OBJS+=$(MCUXPRESSO_DRIVERS)/mcuxpresso/libpower_softabi.a $(MCUXPRESSO_DRIVERS)/drivers/fsl_common.o
OBJS+=$(MCUXPRESSO_DRIVERS)/drivers/fsl_usart.o $(MCUXPRESSO_DRIVERS)/drivers/fsl_flexcomm.o
CFLAGS+=\
-I$(MCUXPRESSO_DRIVERS) \
-I$(MCUXPRESSO_DRIVERS)/drivers \
-I$(MCUXPRESSO)/drivers \
-I$(MCUXPRESSO)/drivers/common \
-I$(MCUXPRESSO_CMSIS)/Include \
-I$(MCUXPRESSO_CMSIS)/Core/Include
CFLAGS+=\
-DCPU_$(MCUXPRESSO_CPU) -DDEBUG_CONSOLE_ASSERT_DISABLE=1
OBJS+=\
$(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_power.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_reset.o
LIBS+=\
$(MCUXPRESSO_DRIVERS)/mcuxpresso/libpower_softabi.a
ifeq ($(MCUXSDK),1)
CFLAGS+=\
-I$(MCUXPRESSO)/drivers/flashiap
OBJS+=\
$(MCUXPRESSO)/drivers/common/fsl_common.o \
$(MCUXPRESSO)/drivers/common/fsl_common_arm.o \
$(MCUXPRESSO)/drivers/flashiap/fsl_flashiap.o \
$(MCUXPRESSO)/drivers/flexcomm/fsl_usart.o \
$(MCUXPRESSO)/drivers/flexcomm/fsl_flexcomm.o
else
OBJS+=\
$(MCUXPRESSO_DRIVERS)/drivers/fsl_common.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_flashiap.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_usart.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_flexcomm.o
endif
endif
ifeq ($(TARGET),psoc6)
CORTEX_M0=1
OBJS+= $(CYPRESS_PDL)/drivers/source/cy_flash.o \
$(CYPRESS_PDL)/drivers/source/cy_ipc_pipe.o \
$(CYPRESS_PDL)/drivers/source/cy_ipc_sema.o \
$(CYPRESS_PDL)/drivers/source/cy_ipc_drv.o \
$(CYPRESS_PDL)/drivers/source/cy_device.o \
$(CYPRESS_PDL)/drivers/source/cy_sysclk.o \
$(CYPRESS_PDL)/drivers/source/cy_sysint.o \
$(CYPRESS_PDL)/drivers/source/cy_syslib.o \
$(CYPRESS_PDL)/drivers/source/cy_ble_clk.o \
$(CYPRESS_PDL)/drivers/source/cy_wdt.o \
$(CYPRESS_PDL)/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.o \
$(CYPRESS_PDL)/devices/templates/COMPONENT_MTB/COMPONENT_CM0P/system_psoc6_cm0plus.o
PSOC6_CRYPTO_OBJS=./lib/wolfssl/wolfcrypt/src/port/cypress/psoc6_crypto.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto_core_vu.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto_core_ecc_domain_params.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto_core_ecc_nist_p.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto_core_ecc_ecdsa.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto_core_sha_v2.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto_core_sha_v1.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto_core_mem_v2.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto_core_mem_v1.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto_core_hw.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto_core_hw_v1.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto.o
OBJS+=\
$(CYPRESS_PDL)/drivers/source/cy_flash.o \
$(CYPRESS_PDL)/drivers/source/cy_ipc_pipe.o \
$(CYPRESS_PDL)/drivers/source/cy_ipc_sema.o \
$(CYPRESS_PDL)/drivers/source/cy_ipc_drv.o \
$(CYPRESS_PDL)/drivers/source/cy_device.o \
$(CYPRESS_PDL)/drivers/source/cy_sysclk.o \
$(CYPRESS_PDL)/drivers/source/cy_sysint.o \
$(CYPRESS_PDL)/drivers/source/cy_syslib.o \
$(CYPRESS_PDL)/drivers/source/cy_ble_clk.o \
$(CYPRESS_PDL)/drivers/source/cy_wdt.o \
$(CYPRESS_PDL)/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.o \
$(CYPRESS_PDL)/devices/templates/COMPONENT_MTB/COMPONENT_CM0P/system_psoc6_cm0plus.o
PSOC6_CRYPTO_OBJS=\
./lib/wolfssl/wolfcrypt/src/port/cypress/psoc6_crypto.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto_core_vu.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto_core_ecc_domain_params.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto_core_ecc_nist_p.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto_core_ecc_ecdsa.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto_core_sha_v2.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto_core_sha_v1.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto_core_mem_v2.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto_core_mem_v1.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto_core_hw.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto_core_hw_v1.o \
$(CYPRESS_PDL)/drivers/source/cy_crypto.o
CFLAGS+=-I$(CYPRESS_PDL)/drivers/include/ \
CFLAGS+=\
-I$(CYPRESS_PDL)/drivers/include \
-I$(CYPRESS_PDL)/devices/include \
-I$(CYPRESS_PDL)/cmsis/include \
-I$(CYPRESS_TARGET_LIB) \

10
config/examples/imx-rt1050.config
View File

@ -2,10 +2,11 @@ ARCH?=ARM
TARGET?=imx_rt
SIGN?=ECC256
HASH?=SHA256
MCUXPRESSO?=$(PWD)/../SDK_2_11_0_EVKB-IMXRT1050
MCUXSDK?=0
MCUXPRESSO?=$(PWD)/../SDK_2_14_0_EVKB-IMXRT1050
MCUXPRESSO_CMSIS?=$(MCUXPRESSO)/CMSIS
MCUXPRESSO_CPU?=MIMXRT1052DVJ6B
MCUXPRESSO_DRIVERS?=$(MCUXPRESSO)/devices/MIMXRT1052
MCUXPRESSO_CMSIS?=$(MCUXPRESSO)/CMSIS
DEBUG?=0
VTOR?=1
CORTEX_M0?=0
@ -27,3 +28,8 @@ WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x60010000
WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x60030000
WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x60050000
WOLFBOOT_SMALL_STACK?=1
# Flash Options
CFLAGS_EXTRA+=-DCONFIG_HYPERFLASH
#CFLAGS_EXTRA+=-DCONFIG_FLASH_IS25WP064A
#CFLAGS_EXTRA+=-DCONFIG_FLASH_W25Q64JV

3
config/examples/imx-rt1060.config
View File

@ -2,10 +2,11 @@ ARCH?=ARM
TARGET?=imx_rt
SIGN?=ECC256
HASH?=SHA256
MCUXSDK?=0
MCUXPRESSO?=$(PWD)/../SDK-2.11.0_EVK-MIMXRT1060
MCUXPRESSO_CMSIS?=$(MCUXPRESSO)/CMSIS
MCUXPRESSO_CPU?=MIMXRT1062DVL6A
MCUXPRESSO_DRIVERS?=$(MCUXPRESSO)/devices/MIMXRT1062
MCUXPRESSO_CMSIS?=$(MCUXPRESSO)/CMSIS
DEBUG?=0
VTOR?=1
CORTEX_M0?=0

3
config/examples/imx-rt1064.config
View File

@ -2,10 +2,11 @@ ARCH?=ARM
TARGET?=imx_rt
SIGN?=ECC256
HASH?=SHA256
MCUXSDK?=0
MCUXPRESSO?=$(PWD)/../SDK-2.11.0_EVK-MIMXRT1060
MCUXPRESSO_CMSIS?=$(MCUXPRESSO)/CMSIS
MCUXPRESSO_CPU?=MIMXRT1064DVL6A
MCUXPRESSO_DRIVERS?=$(MCUXPRESSO)/devices/MIMXRT1064
MCUXPRESSO_CMSIS?=$(MCUXPRESSO)/CMSIS
DEBUG?=0
VTOR?=1
CORTEX_M0?=0

28
config/examples/kinetis-k64f.config 100644
View File

@ -0,0 +1,28 @@
ARCH?=ARM
TARGET?=kinetis
SIGN?=ECC256
HASH?=SHA256
MCUXSDK?=0
MCUXPRESSO?=$(PWD)/../FRDM-K64F
MCUXPRESSO_CMSIS?=$(MCUXPRESSO)/CMSIS
MCUXPRESSO_CPU?=MK64FN1M0VLL12
MCUXPRESSO_DRIVERS?=$(MCUXPRESSO)/devices/MK64F12
DEBUG?=0
VTOR?=1
CORTEX_M0?=0
NO_ASM?=0
EXT_FLASH?=0
SPI_FLASH?=0
ALLOW_DOWNGRADE?=0
NVM_FLASH_WRITEONCE?=1
WOLFBOOT_VERSION?=0
V?=0
SPMATH?=1
RAM_CODE?=0
DUALBANK_SWAP?=0
PKA?=1
WOLFBOOT_PARTITION_SIZE?=0x7A000
WOLFBOOT_SECTOR_SIZE?=0x1000
WOLFBOOT_PARTITION_BOOT_ADDRESS?=0xA000
WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x84000
WOLFBOOT_PARTITION_SWAP_ADDRESS?=0xff000

7
config/examples/kinetis-k82f.config
View File

@ -2,10 +2,11 @@ ARCH?=ARM
TARGET?=kinetis
SIGN?=ECC256
HASH?=SHA256
MCUXPRESSO?=$(HOME)/src/FRDM-K82F
MCUXSDK?=0
MCUXPRESSO?=$(PWD)/../FRDM-K82F
MCUXPRESSO_CMSIS?=$(MCUXPRESSO)/CMSIS
MCUXPRESSO_CPU?=MK82FN256VLL15
MCUXPRESSO_DRIVERS?=$(MCUXPRESSO)/devices/MK82F25615
MCUXPRESSO_CMSIS?=$(HOME)/src/FRDM-K64F/CMSIS
DEBUG?=0
VTOR?=1
CORTEX_M0?=0
@ -16,7 +17,7 @@ ALLOW_DOWNGRADE?=0
NVM_FLASH_WRITEONCE?=1
WOLFBOOT_VERSION?=0
V?=0
SPMATH?=1
SPMATH?=0
RAM_CODE?=0
DUALBANK_SWAP?=0
PKA?=1

5
config/examples/lpc54606j512.config
View File

@ -1,10 +1,11 @@
ARCH?=ARM
TARGET?=lpc
SIGN?=ECC256
MCUXPRESSO?=$(HOME)/src/LPC54606J512
MCUXSDK?=0
MCUXPRESSO?=$(PWD)/../FRDM-K64F
MCUXPRESSO_CMSIS?=$(MCUXPRESSO)/CMSIS
MCUXPRESSO_CPU?=LPC54606J512BD208
MCUXPRESSO_DRIVERS?=$(MCUXPRESSO)/devices/LPC54606
MCUXPRESSO_CMSIS?=$(HOME)/src/LPC54606J512/CMSIS
DEBUG?=0
HASH?=SHA256
VTOR?=1

4
config/examples/stm32f4-small-blocks-uart-update.config
View File

@ -2,10 +2,6 @@ ARCH?=ARM
TARGET?=stm32f4
SIGN?=ECC256
HASH?=SHA256
MCUXPRESSO?=/home/dan/src/FRDM-K64F
MCUXPRESSO_CPU?=MK64FN1M0VLL12
MCUXPRESSO_DRIVERS?=/home/dan/src/FRDM-K64F/devices/MK64F12
MCUXPRESSO_CMSIS?=/home/dan/src/FRDM-K64F/CMSIS
STM32CUBE?=/home/dan/STM32Cube/Repository/STM32Cube_FW_WB_V1.3.0
DEBUG?=1
VTOR?=1

2
docs/Signing.md
View File

@ -24,6 +24,8 @@ If the C version of the key tools exists they will be used by wolfBoot's makefil
Use the `wolfBootSignTool.vcxproj` Visual Studio project to build the `sign.exe` and `keygen.exe` tools for use on Windows.
If you see any error about missing `target.h` this is a generated file based on your .config using the make process. It is needed for `WOLFBOOT_SECTOR_SIZE` used in delta updates.
### Python key tools
**Please note that the Python tools are deprecated and will be removed in future versions.**

34
docs/Targets.md
View File

@ -1047,12 +1047,44 @@ A package can be obtained from the [MCUXpresso SDK Builder](https://mcuxpresso.n
Set the wolfBoot `MCUXPRESSO` configuration variable to the path where the SDK package is extracted, then build wolfBoot normally by running `make`.
wolfBoot support for iMX-RT1060/iMX-RT1050 has been tested using MCUXpresso SDK version 2.11.1. Support for the iMX-RT1064 has been tested using MCUXpresso SDK version 2.13.0
wolfBoot support for iMX-RT1060/iMX-RT1050 has been tested using MCUXpresso SDK version 2.14.0. Support for the iMX-RT1064 has been tested using MCUXpresso SDK version 2.13.0
DCP support (hardware acceleration for SHA256 operations) can be enabled by using PKA=1 in the configuration file.
Firmware can be directly uploaded to the target by copying `factory.bin` to the virtual USB drive associated to the device, or by loading the image directly into flash using a JTAG/SWD debugger.
The RT1050 EVKB board comes wired to use the 64MB HyperFlash. If you'd like to use QSPI there is a rework that can be performed (see AN12183). The default onboard QSPI 8MB ISSI IS25WP064A (`CONFIG_FLASH_IS25WP064A`). To use a Winbond W25Q64JV define `CONFIG_FLASH_W25Q64JV`.
You can also get the SDK and CMSIS bundles using these repositories:
* https://github.com/nxp-mcuxpresso/mcux-sdk
* https://github.com/nxp-mcuxpresso/CMSIS_5
Use MCUXSDK=1 with this option, since the pack paths are different.
### Testing Update
```sh
tools/scripts/prepare_update.sh
# HyperFlash
JLinkExe -if swd -speed 5000 -Device "MIMXRT1052XXX6A"
# QSPI
JLinkExe -if swd -speed 5000 -Device "MIMXRT1052XXX6A?BankAddr=0x60000000&Loader=QSPI"
loadbin factory.bin 0x60000000
loadbin update.bin 0x60030000
```
### NXP iMX-RT Debugging JTAG / JLINK
```sh
JLinkGDBServer -Device MIMXRT1052xxx6A -speed 5000 -if swd -port 3333
arm-none-eabi-gdb
add-symbol-file test-app/image.elf 0x60010100
mon reset init
b main
c
```
## NXP Kinetis

730
hal/imx_rt.c
View File

@ -25,23 +25,37 @@
#include <stdint.h>
#include <target.h>
#include "image.h"
#include "printf.h"
#include "fsl_common.h"
#include "fsl_iomuxc.h"
#include "fsl_nor_flash.h"
#include "fsl_flexspi.h"
#ifdef DEBUG_UART
#include "fsl_lpuart.h"
#endif
#ifdef CPU_MIMXRT1062DVL6A
#include "evkmimxrt1060_flexspi_nor_config.h"
#define USE_GET_CONFIG
#endif
#ifdef CPU_MIMXRT1052DVJ6B
#include "evkbimxrt1050_flexspi_nor_config.h"
#endif
#ifdef CPU_MIMXRT1064DVL6A
#include "evkmimxrt1064_flexspi_nor_config.h"
#define USE_GET_CONFIG
#endif
#include "xip/fsl_flexspi_nor_boot.h"
/* #define DEBUG_EXT_FLASH */
/* #define TEST_FLASH */
#ifdef TEST_FLASH
static int test_flash(void);
#endif
#ifdef __WOLFBOOT
/** Built-in ROM API for bootloaders **/
@ -50,8 +64,7 @@ typedef void rtwdog_config_t;
typedef void wdog_config_t;
/* Watchdog structures */
typedef struct
{
typedef struct {
void (*RTWDOG_GetDefaultConfig)(rtwdog_config_t *config);
void (*RTWDOG_Init)(RTWDOG_Type *base, const rtwdog_config_t *config);
void (*RTWDOG_Deinit)(RTWDOG_Type *base);
@ -68,8 +81,7 @@ typedef struct
uint16_t (*RTWDOG_GetCounterValue)(RTWDOG_Type *base);
} rtwdog_driver_interface_t;
typedef struct
{
typedef struct {
void (*WDOG_GetDefaultConfig)(wdog_config_t *config);
void (*WDOG_Init)(WDOG_Type *base, const wdog_config_t *config);
void (*WDOG_Deinit)(WDOG_Type *base);
@ -85,8 +97,7 @@ typedef struct
} wdog_driver_interface_t;
/* Flex SPI op */
typedef enum _FlexSPIOperationType
{
typedef enum _FlexSPIOperationType {
kFlexSpiOperation_Command,
kFlexSpiOperation_Config,
kFlexSpiOperation_Write,
@ -95,8 +106,7 @@ typedef enum _FlexSPIOperationType
} flexspi_operation_t;
/* FLEX SPI Xfer */
typedef struct _FlexSpiXfer
{
typedef struct _FlexSpiXfer {
flexspi_operation_t operation;
uint32_t baseAddress;
uint32_t seqId;
@ -109,12 +119,9 @@ typedef struct _FlexSpiXfer
} flexspi_xfer_t;
/* Serial NOR config option */
typedef struct _serial_nor_config_option
{
union
{
struct
{
typedef struct _serial_nor_config_option {
union {
struct {
uint32_t max_freq : 4; /* Maximum supported Frequency */
uint32_t misc_mode : 4; /* miscellaneous mode */
uint32_t quad_mode_setting : 4; /* Quad mode setting */
@ -126,10 +133,8 @@ typedef struct _serial_nor_config_option
} B;
uint32_t U;
} option0;
union
{
struct
{
union {
struct {
uint32_t dummy_cycles : 8; /* Dummy cycles before read */
uint32_t reserved0 : 8; /* Reserved for future use */
uint32_t pinmux_group : 4; /* The pinmux group selection */
@ -141,8 +146,7 @@ typedef struct _serial_nor_config_option
} serial_nor_config_option_t;
/* NOR flash API */
typedef struct
{
typedef struct {
uint32_t version;
status_t (*init)(uint32_t instance, flexspi_nor_config_t *config);
status_t (*program)(uint32_t instance, flexspi_nor_config_t *config, uint32_t
@ -163,8 +167,7 @@ typedef struct
/* Root pointer */
typedef struct
{
typedef struct {
const uint32_t version; /* Bootloader version number */
const char *copyright; /* Bootloader Copyright */
void (*runBootloader)(void *arg); /* Function to start the bootloader executing */
@ -177,49 +180,46 @@ typedef struct
} bootloader_api_entry_t;
bootloader_api_entry_t *g_bootloaderTree;
flexspi_nor_config_t flexspi_config;
/** Flash configuration in the .flash_config section of flash **/
#ifdef CPU_MIMXRT1064DVL6A
#define CONFIG_FLASH_SIZE (4 * 1024 * 1024) /* 4MBytes */
#define CONFIG_FLASH_PAGE_SIZE 256UL /* 256Bytes */
#define CONFIG_FLASH_SECTOR_SIZE (4 * 1024) /* 4KBytes */
#define CONFIG_FLASH_BLOCK_SIZE (64 * 1024) /* 64KBytes */
#define CONFIG_FLASH_UNIFORM_BLOCKSIZE false
#define CONFIG_SERIAL_CLK_FREQ kFlexSpiSerialClk_100MHz
const flexspi_nor_config_t __attribute__((section(".flash_config"))) qspiflash_config = {
.memConfig =
{
.tag = FLEXSPI_CFG_BLK_TAG,
.version = FLEXSPI_CFG_BLK_VERSION,
.readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
.csHoldTime = 3u,
.csSetupTime = 3u,
.sflashPadType = kSerialFlash_4Pads,
.serialClkFreq = CONFIG_SERIAL_CLK_FREQ,
.sflashA1Size = CONFIG_FLASH_SIZE,
.lookupTable =
{
FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
},
},
.pageSize = CONFIG_FLASH_PAGE_SIZE,
.sectorSize = CONFIG_FLASH_SECTOR_SIZE,
.blockSize = CONFIG_FLASH_BLOCK_SIZE,
.isUniformBlockSize = CONFIG_FLASH_UNIFORM_BLOCKSIZE,
};
#ifdef USE_GET_CONFIG
flexspi_nor_config_t flexspi_config;
#define FLEXSPI_CONFIG &flexspi_config
#else
#define FLEXSPI_CONFIG (flexspi_nor_config_t*)&qspiflash_config
#endif
/* FlexSPI LUT Sequence Instruction index offset */
#define LUT_SEQ_INS_0_1 (0x00U)
#define LUT_SEQ_INS_2_3 (0x01U)
#define LUT_SEQ_INS_4_5 (0x02U)
#define LUT_SEQ_INS_6_7 (0x03U)
/* FlexSPI LUT Sequence index offset (NOR) */
#define LUT_SEQ_IDX_0 (0x00U) /* Read command */
#define LUT_SEQ_IDX_1 (0x04U) /* Read Status command */
#define LUT_SEQ_IDX_2 (0x08U) /* RESERVED */
#define LUT_SEQ_IDX_3 (0x0CU) /* Write Enable command */
#define LUT_SEQ_IDX_4 (0x10U) /* RESERVED - Custom QE Enable */
#define LUT_SEQ_IDX_5 (0x14U) /* Erase Sector command */
#define LUT_SEQ_IDX_6 (0x18U) /* RESERVED */
#define LUT_SEQ_IDX_7 (0x1CU) /* RESERVED */
#define LUT_SEQ_IDX_8 (0x20U) /* RESERVED */
#define LUT_SEQ_IDX_9 (0x24U) /* Page Program command */
#define LUT_SEQ_IDX_10 (0x28U) /* RESERVED */
#define LUT_SEQ_IDX_11 (0x2CU) /* Full Chip Erase */
#define LUT_SEQ_IDX_12 (0x30U) /* RESERVED */
#define LUT_SEQ_IDX_13 (0x34U) /* SFDP */
#define LUT_SEQ_IDX_14 (0x38U) /* RESERVED */
#define LUT_SEQ_IDX_15 (0x3CU) /* Dummy */
/** Flash configuration in the .flash_config section of flash **/
#ifdef CPU_MIMXRT1062DVL6A
#define CONFIG_FLASH_SIZE (8 * 1024 * 1024) /* 8MBytes */
#define CONFIG_FLASH_PAGE_SIZE 256UL /* 256Bytes */
#define CONFIG_FLASH_SECTOR_SIZE (4 * 1024) /* 4KBytes */
#define CONFIG_FLASH_BLOCK_SIZE (64 * 1024) /* 64KBytes */
#define CONFIG_FLASH_UNIFORM_BLOCKSIZE false
#define CONFIG_SERIAL_CLK_FREQ kFlexSpiSerialClk_100MHz
#ifdef CPU_MIMXRT1064DVL6A
#define CONFIG_FLASH_SIZE (4 * 1024 * 1024) /* 4MBytes */
#define CONFIG_FLASH_PAGE_SIZE 256UL /* 256Bytes */
#define CONFIG_FLASH_SECTOR_SIZE (4 * 1024) /* 4KBytes */
#define CONFIG_FLASH_BLOCK_SIZE (64 * 1024) /* 64KBytes */
#define CONFIG_FLASH_UNIFORM_BLOCKSIZE false
#define CONFIG_SERIAL_CLK_FREQ kFlexSpiSerialClk_100MHz
const flexspi_nor_config_t __attribute__((section(".flash_config"))) qspiflash_config = {
.memConfig =
{
@ -231,8 +231,7 @@ const flexspi_nor_config_t __attribute__((section(".flash_config"))) qspiflash_c
.sflashPadType = kSerialFlash_4Pads,
.serialClkFreq = CONFIG_SERIAL_CLK_FREQ,
.sflashA1Size = CONFIG_FLASH_SIZE,
.lookupTable =
{
.lookupTable = {
FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
},
@ -245,46 +244,309 @@ const flexspi_nor_config_t __attribute__((section(".flash_config"))) qspiflash_c
#endif
#ifdef CPU_MIMXRT1052DVJ6B
#define CONFIG_FLASH_SIZE (64 * 1024 * 1024) /* 64MBytes */
#define CONFIG_FLASH_PAGE_SIZE 512UL /* 512Bytes */
#define CONFIG_FLASH_SECTOR_SIZE (256 * 1024) /* 256KBytes */
#define CONFIG_FLASH_BLOCK_SIZE (256 * 1024) /* 256KBytes */
#define CONFIG_FLASH_UNIFORM_BLOCKSIZE true
#define CONFIG_SERIAL_CLK_FREQ kFlexSpiSerialClk_30MHz
/** Flash configuration in the .flash_config section of flash **/
#ifdef CPU_MIMXRT1062DVL6A
#define CONFIG_FLASH_SIZE (8 * 1024 * 1024) /* 8MBytes */
#define CONFIG_FLASH_PAGE_SIZE 256UL /* 256Bytes */
#define CONFIG_FLASH_SECTOR_SIZE (4 * 1024) /* 4KBytes */
#define CONFIG_FLASH_BLOCK_SIZE (64 * 1024) /* 64KBytes */
#define CONFIG_FLASH_UNIFORM_BLOCKSIZE false
#define CONFIG_SERIAL_CLK_FREQ kFlexSpiSerialClk_100MHz
const flexspi_nor_config_t __attribute__((section(".flash_config"))) qspiflash_config = {
.memConfig =
{
{
.tag = FLEXSPI_CFG_BLK_TAG,
.version = FLEXSPI_CFG_BLK_VERSION,
.readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
.csHoldTime = 3u,
.csSetupTime = 3u,
.sflashPadType = kSerialFlash_4Pads,
.serialClkFreq = CONFIG_SERIAL_CLK_FREQ,
.sflashA1Size = CONFIG_FLASH_SIZE,
.lookupTable = {
FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
},
},
.pageSize = CONFIG_FLASH_PAGE_SIZE,
.sectorSize = CONFIG_FLASH_SECTOR_SIZE,
.blockSize = CONFIG_FLASH_BLOCK_SIZE,
.isUniformBlockSize = CONFIG_FLASH_UNIFORM_BLOCKSIZE,
};
#endif
/** Flash configuration in the .flash_config section of flash **/
#ifdef CPU_MIMXRT1052DVJ6B
#ifdef CONFIG_FLASH_W25Q64JV
/* Winbond W25Q64JV */
#define WRITE_STATUS_CMD 0x31
#define QE_ENABLE 0x02 /* S9 */
#elif defined(CONFIG_FLASH_IS25WP064A)
/* ISSI IS25WP064A (on EVKB with rework see AN12183) */
#define WRITE_STATUS_CMD 0x1
#define QE_ENABLE 0x40 /* S6 */
#elif !defined(CONFIG_HYPERFLASH)
/* Hyperflash - Default on RT1050-EVKB */
#define CONFIG_HYPERFLASH
#endif
#ifdef CONFIG_HYPERFLASH
#define CONFIG_FLASH_SIZE (64 * 1024 * 1024) /* 64MBytes */
#define CONFIG_FLASH_PAGE_SIZE 512UL /* 512Bytes */
#define CONFIG_FLASH_SECTOR_SIZE (256 * 1024) /* 256KBytes */
#define CONFIG_FLASH_BLOCK_SIZE (256 * 1024) /* 256KBytes */
#define CONFIG_FLASH_UNIFORM_BLOCKSIZE true
#define CONFIG_SERIAL_CLK_FREQ kFlexSpiSerialClk_133MHz
const flexspi_nor_config_t __attribute__((section(".flash_config"))) qspiflash_config = {
.memConfig = {
.tag = FLEXSPI_CFG_BLK_TAG,
.version = FLEXSPI_CFG_BLK_VERSION,
.readSampleClkSrc = kFlexSPIReadSampleClk_ExternalInputFromDqsPad,
.csHoldTime = 3u,
.csSetupTime = 3u,
.columnAddressWidth = 3u,
/* Enable DDR mode, Word-addressable, Safe configuration, Differential clock */
.controllerMiscOption =
(1u << kFlexSpiMiscOffset_DdrModeEnable) | (1u << kFlexSpiMiscOffset_WordAddressableEnable) |
(1u << kFlexSpiMiscOffset_SafeConfigFreqEnable) | (1u << kFlexSpiMiscOffset_DiffClkEnable),
.sflashPadType = kSerialFlash_8Pads,
.serialClkFreq = kFlexSpiSerialClk_133MHz,
.sflashA1Size = 64u * 1024u * 1024u,
.dataValidTime = {16u, 16u},
.lookupTable =
{
FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0xA0, RADDR_DDR, FLEXSPI_8PAD, 0x18),
FLEXSPI_LUT_SEQ(CADDR_DDR, FLEXSPI_8PAD, 0x10, DUMMY_DDR, FLEXSPI_8PAD, 0x06),
FLEXSPI_LUT_SEQ(READ_DDR, FLEXSPI_8PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0),
},
},
.pageSize = 512u,
.sectorSize = 256u * 1024u,
.blockSize = 256u * 1024u,
.isUniformBlockSize = true,
};
.deviceType = kFlexSpiDeviceType_SerialNOR,
.sflashPadType = kSerialFlash_8Pads,
.serialClkFreq = CONFIG_SERIAL_CLK_FREQ,
.lutCustomSeqEnable = 0x1,
.sflashA1Size = CONFIG_FLASH_SIZE,
.dataValidTime = {15u, 0u},
.busyOffset = 15u,
.busyBitPolarity = 1u,
.lookupTable = {
/* Read LUTs */
[0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0xA0, RADDR_DDR, FLEXSPI_8PAD, 0x18),
[1] = FLEXSPI_LUT_SEQ(CADDR_DDR, FLEXSPI_8PAD, 0x10, DUMMY_DDR, FLEXSPI_8PAD, 0x0C),
[2] = FLEXSPI_LUT_SEQ(READ_DDR, FLEXSPI_8PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0),
/* Read Status LUTs - 0 */
[4 * 1 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x0),
[4 * 1 + 1] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0xAA),
[4 * 1 + 2] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x05),
[4 * 1 + 3] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x70),
/* Read Status LUTs - 1 */
[4 * 2 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0xA0, RADDR_DDR, FLEXSPI_8PAD, 0x18),
[4 * 2 + 1] = FLEXSPI_LUT_SEQ(CADDR_DDR, FLEXSPI_8PAD, 0x10, DUMMY_RWDS_DDR, FLEXSPI_8PAD, 0x0B),
[4 * 2 + 2] = FLEXSPI_LUT_SEQ(READ_DDR, FLEXSPI_8PAD, 0x4, STOP, FLEXSPI_1PAD, 0x0),
/* Write Enable LUTs - 0 */
[4 * 3 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x0),
[4 * 3 + 1] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0xAA),
[4 * 3 + 2] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x05),
[4 * 3 + 3] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0xAA),
/* Write Enable LUTs - 1 */
[4 * 4 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x0),
[4 * 4 + 1] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x55),
[4 * 4 + 2] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x02),
[4 * 4 + 3] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x55),
/* Erase Sector LUTs - 0 */
[4 * 5 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x0),
[4 * 5 + 1] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0xAA),
[4 * 5 + 2] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x05),
[4 * 5 + 3] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x80),
/* Erase Sector LUTs - 1 */
[4 * 6 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x0),
[4 * 6 + 1] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0xAA),
[4 * 6 + 2] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x05),
[4 * 6 + 3] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0xAA),
/* Erase Sector LUTs - 2 */
[4 * 7 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x0),
[4 * 7 + 1] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x55),
[4 * 7 + 2] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x02),
[4 * 7 + 3] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x55),
/* Erase Sector LUTs - 3 */
[4 * 8 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, RADDR_DDR, FLEXSPI_8PAD, 0x18),
[4 * 8 + 1] = FLEXSPI_LUT_SEQ(CADDR_DDR, FLEXSPI_8PAD, 0x10, CMD_DDR, FLEXSPI_8PAD, 0x0),
[4 * 8 + 2] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x30, STOP, FLEXSPI_1PAD, 0x0),
/* Page Program LUTs - 0 */
[4 * 9 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x0),
[4 * 9 + 1] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0xAA),
[4 * 9 + 2] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x05),
[4 * 9 + 3] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0xA0),
/* Page Program LUTs - 1 */
[4 * 10 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, RADDR_DDR, FLEXSPI_8PAD, 0x18),
[4 * 10 + 1] = FLEXSPI_LUT_SEQ(CADDR_DDR, FLEXSPI_8PAD, 0x10, WRITE_DDR, FLEXSPI_8PAD, 0x80),
/* Erase Chip LUTs - 0 */
[4 * 11 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x0),
[4 * 11 + 1] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0xAA),
[4 * 11 + 2] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x05),
[4 * 11 + 3] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x80),
/* Erase Chip LUTs - 1 */
[4 * 12 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x0),
[4 * 12 + 1] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0xAA),
[4 * 12 + 2] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x05),
[4 * 12 + 3] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0xAA),
/* Erase Chip LUTs - 2 */
[4 * 13 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x0),
[4 * 13 + 1] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x55),
[4 * 13 + 2] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x02),
[4 * 13 + 3] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x55),
/* Erase Chip LUTs - 3 */
[4 * 14 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x0),
[4 * 14 + 1] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0xAA),
[4 * 14 + 2] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x05),
[4 * 14 + 3] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0x0, CMD_DDR, FLEXSPI_8PAD, 0x10),
},
/* LUT customized sequence */
.lutCustomSeq = {
{.seqNum = 0, .seqId = 0, .reserved = 0},
{.seqNum = 2, .seqId = 1, .reserved = 0},
{.seqNum = 2, .seqId = 3, .reserved = 0},
{.seqNum = 4, .seqId = 5, .reserved = 0},
{.seqNum = 2, .seqId = 9, .reserved = 0},
{.seqNum = 4, .seqId = 11, .reserved = 0}
},
},
.pageSize = CONFIG_FLASH_PAGE_SIZE,
.sectorSize = CONFIG_FLASH_SECTOR_SIZE,
.ipcmdSerialClkFreq = 1u,
.serialNorType = 1u,
.blockSize = CONFIG_FLASH_BLOCK_SIZE,
.isUniformBlockSize = CONFIG_FLASH_UNIFORM_BLOCKSIZE,
};
#else /* QSPI */
#define CONFIG_FLASH_SIZE (8 * 1024 * 1024) /* 8MBytes */
#define CONFIG_FLASH_PAGE_SIZE 256UL /* 256Bytes */
#define CONFIG_FLASH_SECTOR_SIZE (4 * 1024) /* 4Bytes */
#define CONFIG_FLASH_BLOCK_SIZE (64 * 1024) /* 64KBytes */
#define CONFIG_FLASH_UNIFORM_BLOCKSIZE false
#define CONFIG_SERIAL_CLK_FREQ kFlexSpiSerialClk_100MHz
#define CONFIG_FLASH_ADDR_WIDTH 24u /* Width of flash addresses (either 24 or 32) */
#define CONFIG_FLASH_QE_ENABLE 1
/* Note: By default the RT1050-EVKB uses HyperFlex.
* To use QSPI flash a rework is required. See AN12183
*/
/* QSPI boot header */
/* Credit to: https://community.nxp.com/t5/i-MX-RT/RT1050-Debugging-with-QSPI-flash-on-secondary-pinmux/m-p/934745 */
const flexspi_nor_config_t __attribute__((section(".flash_config"))) qspiflash_config = {
.memConfig = {
.tag = FLEXSPI_CFG_BLK_TAG,
.version = FLEXSPI_CFG_BLK_VERSION,
.readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
.deviceType = kFlexSpiDeviceType_SerialNOR,
.sflashPadType = kSerialFlash_4Pads,
.serialClkFreq = CONFIG_SERIAL_CLK_FREQ,
.sflashA1Size = CONFIG_FLASH_SIZE,
.csHoldTime = 3,
.csSetupTime = 3,
.controllerMiscOption = (1u << kFlexSpiMiscOffset_SafeConfigFreqEnable),
.columnAddressWidth = 0,
.waitTimeCfgCommands = 0, /* 0=use read status (or #*100us) wait instead */
#if CONFIG_FLASH_QE_ENABLE == 1
.deviceModeCfgEnable = 1,
.deviceModeType = kDeviceConfigCmdType_QuadEnable,
.deviceModeSeq.seqNum = 2, /* issue 2 commands starting at index 3 */
.deviceModeSeq.seqId = 3, /* issue write enable and write status */
.deviceModeArg = QE_ENABLE,
#endif
.lutCustomSeqEnable = 0,
.dataValidTime = {16u, 16u},
.busyOffset = 0, /* WIP/Busy bit=0 (read status busy bit offset */
.busyBitPolarity = 0, /* 0 – Busy bit=1 (device is busy) */
.lookupTable = {
#if 0 /* disabled for now, causes issue with page program */
/* Quad Input/output read sequence - with optimized XIP support */
[LUT_SEQ_IDX_0 + LUT_SEQ_INS_0_1] = FLEXSPI_LUT_SEQ(
CMD_SDR, FLEXSPI_1PAD, 0xEB,
RADDR_SDR, FLEXSPI_4PAD, CONFIG_FLASH_ADDR_WIDTH),
[LUT_SEQ_IDX_0 + LUT_SEQ_INS_2_3] = FLEXSPI_LUT_SEQ(
MODE8_SDR, FLEXSPI_4PAD, 0xA0 /* continuous read mode - 2 dummy cycles */,
DUMMY_SDR, FLEXSPI_4PAD, 0x04 /* 4 dummy cycles (6 total) */ ),
[LUT_SEQ_IDX_0 + LUT_SEQ_INS_4_5] = FLEXSPI_LUT_SEQ(
READ_SDR, FLEXSPI_4PAD, 0x04 /* any non-zero value */,
JMP_ON_CS, FLEXSPI_1PAD, 0x01),
#else
/* Quad Input/output read sequence */
[LUT_SEQ_IDX_0 + LUT_SEQ_INS_0_1] = FLEXSPI_LUT_SEQ(
CMD_SDR, FLEXSPI_1PAD, 0xEB,
RADDR_SDR, FLEXSPI_4PAD, CONFIG_FLASH_ADDR_WIDTH),
[LUT_SEQ_IDX_0 + LUT_SEQ_INS_2_3] = FLEXSPI_LUT_SEQ(
DUMMY_SDR, FLEXSPI_4PAD, 0x06 /* 6 dummy cycles */,
READ_SDR, FLEXSPI_4PAD, 0x04 /* any non-zero value */ ),
#endif
/* Read Status */
[LUT_SEQ_IDX_1 + LUT_SEQ_INS_0_1] = FLEXSPI_LUT_SEQ(
CMD_SDR, FLEXSPI_1PAD, 0x05,
READ_SDR, FLEXSPI_1PAD, 0x04 /* Read 4 bytes */ ),
/* Write Enable */
[LUT_SEQ_IDX_3 + LUT_SEQ_INS_0_1] = FLEXSPI_LUT_SEQ(
CMD_SDR, FLEXSPI_1PAD, 0x06,
STOP, FLEXSPI_1PAD, 0x00),
/* Write Status - Custom LUT (QE Enable) */
[LUT_SEQ_IDX_4 + LUT_SEQ_INS_0_1] = FLEXSPI_LUT_SEQ(
CMD_SDR, FLEXSPI_1PAD, WRITE_STATUS_CMD,
WRITE_SDR, FLEXSPI_1PAD, 0x01 /* Write 1 byte */ ),
/* Erase Sector */
[LUT_SEQ_IDX_5 + LUT_SEQ_INS_0_1] = FLEXSPI_LUT_SEQ(
CMD_SDR, FLEXSPI_1PAD, 0x20 /* Sector Erase, 1-bit */,
RADDR_SDR, FLEXSPI_1PAD, CONFIG_FLASH_ADDR_WIDTH),
/* Erase Block - Custom LUT */
[LUT_SEQ_IDX_8 + LUT_SEQ_INS_0_1] = FLEXSPI_LUT_SEQ(
CMD_SDR, FLEXSPI_1PAD, 0xD8 /* Block Erase, 1-bit */,
RADDR_SDR, FLEXSPI_1PAD, CONFIG_FLASH_ADDR_WIDTH),
#if CONFIG_FLASH_QE_ENABLE == 1
/* Quad Page Program */
[LUT_SEQ_IDX_9 + LUT_SEQ_INS_0_1] = FLEXSPI_LUT_SEQ(
CMD_SDR, FLEXSPI_1PAD, 0x32,
RADDR_SDR, FLEXSPI_1PAD, CONFIG_FLASH_ADDR_WIDTH),
[LUT_SEQ_IDX_9 + LUT_SEQ_INS_2_3] = FLEXSPI_LUT_SEQ(
WRITE_SDR, FLEXSPI_4PAD, 0x04 /* any non-zero value */,
STOP, FLEXSPI_1PAD, 0x00),
#else
/* Page Program */
[LUT_SEQ_IDX_9 + LUT_SEQ_INS_0_1] = FLEXSPI_LUT_SEQ(
CMD_SDR, FLEXSPI_1PAD, 0x02,
RADDR_SDR, FLEXSPI_1PAD, CONFIG_FLASH_ADDR_WIDTH),
[LUT_SEQ_IDX_9 + LUT_SEQ_INS_2_3] = FLEXSPI_LUT_SEQ(
WRITE_SDR, FLEXSPI_1PAD, 0x04 /* any non-zero value */,
STOP, FLEXSPI_1PAD, 0x00),
#endif
/* Chip Erase */
[LUT_SEQ_IDX_11 + LUT_SEQ_INS_0_1] = FLEXSPI_LUT_SEQ(
CMD_SDR, FLEXSPI_1PAD, 0x60,
STOP, FLEXSPI_1PAD, 0x00),
/* SFDP - Required for get_config */
[LUT_SEQ_IDX_13 + LUT_SEQ_INS_0_1] = FLEXSPI_LUT_SEQ(
CMD_SDR, FLEXSPI_1PAD, 0x5A,
RADDR_SDR, FLEXSPI_1PAD, CONFIG_FLASH_ADDR_WIDTH ),
[LUT_SEQ_IDX_13 + LUT_SEQ_INS_2_3] = FLEXSPI_LUT_SEQ(
DUMMY_SDR, FLEXSPI_1PAD, 0x08 /* 8 dummy cycles */,
READ_SDR, FLEXSPI_4PAD, 0xFF /* Read 255 bytes */),
},
},
.pageSize = CONFIG_FLASH_PAGE_SIZE,
.sectorSize = CONFIG_FLASH_SECTOR_SIZE,
.blockSize = CONFIG_FLASH_BLOCK_SIZE,
.isUniformBlockSize = CONFIG_FLASH_UNIFORM_BLOCKSIZE,
.ipcmdSerialClkFreq = 0,
};
#endif
#endif /* CPU_MIMXRT1052DVJ6B */
#endif
#ifndef __FLASH_BASE
#if defined(CPU_MIMXRT1052DVJ6B) || defined(CPU_MIMXRT1062DVL6A)
#define __FLASH_BASE 0x60000000
#elif defined(CPU_MIMXRT1064DVL6A)
@ -292,123 +554,131 @@ const flexspi_nor_config_t __attribute__((section(".flash_config"))) qspiflash_c
#else
#error "Please define MCUXPRESSO SDK CPU variant macro (e.g. CPU_MIMXRT1062DVL6A)"
#endif
#endif
#ifndef FLASH_BASE
#define FLASH_BASE __FLASH_BASE
#define PLUGIN_FLAG 0x0UL
#endif
const BOOT_DATA_T __attribute__((section(".boot_data"))) boot_data = {
FLASH_BASE, /* boot start location */
CONFIG_FLASH_SIZE, /* size */
PLUGIN_FLAG, /* Plugin flag*/
0xFFFFFFFF /* empty - extra data word */
};
const uint8_t dcd_data[1] = {0};
extern void isr_reset(void);
const BOOT_DATA_T __attribute__((section(".boot_data"))) boot_data = {
FLASH_BASE, /* boot start location */
CONFIG_FLASH_SIZE, /* size */
PLUGIN_FLAG, /* Plugin flag*/
0xFFFFFFFF /* empty - extra data word */
};
const ivt __attribute__((section(".image_vt"))) image_vector_table = {
IVT_HEADER, /* IVT Header */
(uint32_t)isr_reset, /* Image Entry Function */
IVT_RSVD, /* Reserved = 0 */
(uint32_t)dcd_data, /* Address where DCD information is stored */
(uint32_t)&boot_data, /* Address where BOOT Data Structure is stored */
(uint32_t)&image_vector_table, /* Pointer to IVT Self (absolute address */
(uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */
IVT_RSVD /* Reserved = 0 */
IVT_HEADER, /* IVT Header */
(uint32_t)isr_reset, /* Image Entry Function */
IVT_RSVD, /* Reserved = 0 */
(uint32_t)dcd_data, /* Address where DCD information is stored */
(uint32_t)&boot_data, /* Address where BOOT Data Structure is stored */
(uint32_t)&image_vector_table, /* Pointer to IVT Self (absolute address */
(uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */
IVT_RSVD /* Reserved = 0 */
};
/*******************************************************************************
* Variables for BOARD_BootClockRUN configuration
******************************************************************************/
const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN =
{
.loopDivider = 100, /* PLL loop divider, Fout = Fin * 50 */
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
};
const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN =
{
.loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
.numerator = 0, /* 30 bit numerator of fractional loop divider */
.denominator = 1, /* 30 bit denominator of fractional loop divider */
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
};
const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN =
{
.loopDivider = 0, /* PLL loop divider, Fout = Fin * 20 */
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
};
const clock_video_pll_config_t videoPllConfig_BOARD_BootClockRUN =
{
.loopDivider = 31, /* PLL loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
.postDivider = 8, /* Divider after PLL */
.numerator = 0, /* 30 bit numerator of fractional loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
.denominator = 1, /* 30 bit denominator of fractional loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
};
static int nor_flash_init(void);
const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN = {
.loopDivider = 100, /* PLL loop divider, Fout = Fin * 50 */
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
};
const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN = {
.loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
.numerator = 0, /* 30 bit numerator of fractional loop divider */
.denominator = 1, /* 30 bit denominator of fractional loop divider */
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
};
const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN = {
.loopDivider = 0, /* PLL loop divider, Fout = Fin * 20 */
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
};
const clock_video_pll_config_t videoPllConfig_BOARD_BootClockRUN = {
.loopDivider = 31, /* PLL loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
.postDivider = 8, /* Divider after PLL */
.numerator = 0, /* 30 bit numerator of fractional loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
.denominator = 1, /* 30 bit denominator of fractional loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
};
static void clock_init(void)
{
if (CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_BYPASS_MASK)
{
if (CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_BYPASS_MASK) {
/* Configure ARM_PLL */
CCM_ANALOG->PLL_ARM =
CCM_ANALOG_PLL_ARM_BYPASS(1) | CCM_ANALOG_PLL_ARM_ENABLE(1) | CCM_ANALOG_PLL_ARM_DIV_SELECT(24);
CCM_ANALOG_PLL_ARM_BYPASS(1) |
CCM_ANALOG_PLL_ARM_ENABLE(1) |
CCM_ANALOG_PLL_ARM_DIV_SELECT(24);
/* Wait Until clock is locked */
while ((CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_LOCK_MASK) == 0)
{
}
while ((CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_LOCK_MASK) == 0);
/* Configure PLL_SYS */
CCM_ANALOG->PLL_SYS &= ~CCM_ANALOG_PLL_SYS_POWERDOWN_MASK;
/* Wait Until clock is locked */
while ((CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_LOCK_MASK) == 0)
{
}
while ((CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_LOCK_MASK) == 0);
/* Configure PFD_528 */
CCM_ANALOG->PFD_528 = CCM_ANALOG_PFD_528_PFD0_FRAC(24) | CCM_ANALOG_PFD_528_PFD1_FRAC(24) |
CCM_ANALOG_PFD_528_PFD2_FRAC(19) | CCM_ANALOG_PFD_528_PFD3_FRAC(24);
CCM_ANALOG->PFD_528 =
CCM_ANALOG_PFD_528_PFD0_FRAC(24) |
CCM_ANALOG_PFD_528_PFD1_FRAC(24) |
CCM_ANALOG_PFD_528_PFD2_FRAC(19) |
CCM_ANALOG_PFD_528_PFD3_FRAC(24);
/* Configure USB1_PLL */
CCM_ANALOG->PLL_USB1 =
CCM_ANALOG_PLL_USB1_DIV_SELECT(0) | CCM_ANALOG_PLL_USB1_POWER(1) | CCM_ANALOG_PLL_USB1_ENABLE(1);
while ((CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_LOCK_MASK) == 0)
{
}
CCM_ANALOG_PLL_USB1_DIV_SELECT(0) |
CCM_ANALOG_PLL_USB1_POWER(1) |
CCM_ANALOG_PLL_USB1_ENABLE(1);
while ((CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_LOCK_MASK) == 0);
CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_BYPASS_MASK;
/* Configure PFD_480 */
CCM_ANALOG->PFD_480 = CCM_ANALOG_PFD_480_PFD0_FRAC(35) | CCM_ANALOG_PFD_480_PFD1_FRAC(35) |
CCM_ANALOG_PFD_480_PFD2_FRAC(26) | CCM_ANALOG_PFD_480_PFD3_FRAC(15);
CCM_ANALOG->PFD_480 =
CCM_ANALOG_PFD_480_PFD0_FRAC(35) |
CCM_ANALOG_PFD_480_PFD1_FRAC(35) |
CCM_ANALOG_PFD_480_PFD2_FRAC(26) |
CCM_ANALOG_PFD_480_PFD3_FRAC(15);
/* Configure Clock PODF */
CCM->CACRR = CCM_CACRR_ARM_PODF(1);
CCM->CBCDR = (CCM->CBCDR & (~(CCM_CBCDR_SEMC_PODF_MASK | CCM_CBCDR_AHB_PODF_MASK | CCM_CBCDR_IPG_PODF_MASK))) |
CCM_CBCDR_SEMC_PODF(2) | CCM_CBCDR_AHB_PODF(2) | CCM_CBCDR_IPG_PODF(2);
CCM->CBCDR =
(CCM->CBCDR &
(~(CCM_CBCDR_SEMC_PODF_MASK |
CCM_CBCDR_AHB_PODF_MASK |
CCM_CBCDR_IPG_PODF_MASK))) |
CCM_CBCDR_SEMC_PODF(2) |
CCM_CBCDR_AHB_PODF(2) |
CCM_CBCDR_IPG_PODF(2);
#if defined(CPU_MIMXRT1062DVL6A) || defined(CPU_MIMXRT1064DVL6A)
/* Configure FLEXSPI2 CLOCKS */
CCM->CBCMR =
(CCM->CBCMR &
(~(CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK | CCM_CBCMR_FLEXSPI2_CLK_SEL_MASK | CCM_CBCMR_FLEXSPI2_PODF_MASK))) |
CCM_CBCMR_PRE_PERIPH_CLK_SEL(3) | CCM_CBCMR_FLEXSPI2_CLK_SEL(1) | CCM_CBCMR_FLEXSPI2_PODF(7);
(~(CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK |
CCM_CBCMR_FLEXSPI2_CLK_SEL_MASK |
CCM_CBCMR_FLEXSPI2_PODF_MASK))) |
CCM_CBCMR_PRE_PERIPH_CLK_SEL(3) |
CCM_CBCMR_FLEXSPI2_CLK_SEL(1) |
CCM_CBCMR_FLEXSPI2_PODF(7);
#endif
/* Configure FLEXSPI CLOCKS */
CCM->CSCMR1 = ((CCM->CSCMR1 &
~(CCM_CSCMR1_FLEXSPI_CLK_SEL_MASK | CCM_CSCMR1_FLEXSPI_PODF_MASK | CCM_CSCMR1_PERCLK_PODF_MASK |
CCM_CSCMR1_PERCLK_CLK_SEL_MASK)) |
CCM_CSCMR1_FLEXSPI_CLK_SEL(3) | CCM_CSCMR1_FLEXSPI_PODF(7) | CCM_CSCMR1_PERCLK_PODF(1));
CCM->CSCMR1 =
((CCM->CSCMR1 &
~(CCM_CSCMR1_FLEXSPI_CLK_SEL_MASK |
CCM_CSCMR1_FLEXSPI_PODF_MASK |
CCM_CSCMR1_PERCLK_PODF_MASK |
CCM_CSCMR1_PERCLK_CLK_SEL_MASK)) |
CCM_CSCMR1_FLEXSPI_CLK_SEL(3) |
CCM_CSCMR1_FLEXSPI_PODF(7) |
CCM_CSCMR1_PERCLK_PODF(1));
/* Finally, Enable PLL_ARM, PLL_SYS and PLL_USB1 */
CCM_ANALOG->PLL_ARM &= ~CCM_ANALOG_PLL_ARM_BYPASS_MASK;
@ -418,8 +688,49 @@ static void clock_init(void)
}
#ifdef DEBUG_UART
/* The UART interface (LPUART1 - LPUART8) */
#ifndef UART_BASEADDR
#define UART_BASEADDR LPUART1
#endif
#ifndef UART_BAUDRATE
#define UART_BAUDRATE (115200U)
#endif
void uart_init(void)
{
lpuart_config_t config;
uint32_t uartClkSrcFreq = 20000000U; /* 20 MHz */
LPUART_GetDefaultConfig(&config);
config.baudRate_Bps = UART_BAUDRATE;
config.enableTx = true;
config.enableRx = true;
LPUART_Init(UART_BASEADDR, &config, uartClkSrcFreq);
}
void uart_write(const char* buf, unsigned int sz)
{
int doCrlf = 0;
if (buf[sz-1] == '\n') { /* handle CRLF */
doCrlf = 1;
sz--;
}
LPUART_WriteBlocking(UART_BASEADDR, (const uint8_t*)buf, sz);
if (doCrlf) {
const char* kCrlf = "\r\n";
LPUART_WriteBlocking(UART_BASEADDR, (const uint8_t*)kCrlf, 2);
}
}
#endif /* DEBUG_UART */
extern void ARM_MPU_Disable(void);
extern int wc_dcp_init(void);
static int hal_flash_init(void);
void hal_init(void)
{
@ -427,9 +738,17 @@ void hal_init(void)
wc_dcp_init();
#endif
ARM_MPU_Disable();
g_bootloaderTree = (bootloader_api_entry_t *)*(uint32_t *)0x0020001c;
clock_init();
nor_flash_init();
#ifdef DEBUG_UART
uart_init();
uart_write("wolfBoot HAL Init\n", 18);
#endif
hal_flash_init();
#ifdef TEST_FLASH
if (test_flash() != 0) {
wolfBoot_printf("Flash Test Failed!\n");
}
#endif
}
void hal_prepare_boot(void)
@ -438,29 +757,41 @@ void hal_prepare_boot(void)
#endif /* __WOLFBOOT */
static nor_handle_t norHandle = {NULL};
static serial_nor_config_option_t flexspi_cfg_option = {};
static int nor_flash_init(void)
static int hal_flash_init(void)
{
#if defined(CPU_MIMXRT1062DVL6A) || defined(CPU_MIMXRT1064DVL6A)
flexspi_cfg_option.option0.U = 0xC0000007; /* QuadSPI-NOR, f = default */
g_bootloaderTree->flexSpiNorDriver->get_config(0, &flexspi_config, &flexspi_cfg_option);
#ifdef USE_GET_CONFIG
serial_nor_config_option_t flexspi_cfg_option;
#endif
g_bootloaderTree->flexSpiNorDriver->init(0, &flexspi_config);
if (g_bootloaderTree == NULL) {
g_bootloaderTree = (bootloader_api_entry_t *)*(uint32_t *)0x0020001c;
#ifdef USE_GET_CONFIG
memset(&flexspi_cfg_option, 0, sizeof(flexspi_cfg_option));
flexspi_cfg_option.option0.U = 0xC0000007; /* QuadSPI-NOR, f = default */
g_bootloaderTree->flexSpiNorDriver->get_config(0,
&flexspi_config,
&flexspi_cfg_option);
g_bootloaderTree->flexSpiNorDriver->init(0, &flexspi_config);
g_bootloaderTree->flexSpiNorDriver->clear_cache(0);
#endif
}
return 0;
}
#define FLASH_PAGE_SIZE 0x100
int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
{
status_t status;
uint32_t wbuf[FLASH_PAGE_SIZE / 4];
uint32_t wbuf[CONFIG_FLASH_PAGE_SIZE / sizeof(uint32_t)];
int i;
for (i = 0; i < len; i+= FLASH_PAGE_SIZE) {
memcpy(wbuf, data + i, FLASH_PAGE_SIZE);
status = g_bootloaderTree->flexSpiNorDriver->program(0, &flexspi_config, (address + i) - FLASH_BASE, wbuf);
if (kStatus_Success != status)
hal_flash_init(); /* make sure g_bootloaderTree is set */
#ifdef DEBUG_EXT_FLASH
wolfBoot_printf("flash write: addr 0x%x, len %d\n",
address - FLASH_BASE, len);
#endif
for (i = 0; i < len; i+= CONFIG_FLASH_PAGE_SIZE) {
memcpy(wbuf, data + i, CONFIG_FLASH_PAGE_SIZE);
status = g_bootloaderTree->flexSpiNorDriver->program(0, FLEXSPI_CONFIG,
(address + i) - FLASH_BASE, wbuf);
if (status != kStatus_Success)
return -1;
}
return 0;
@ -477,9 +808,54 @@ void RAMFUNCTION hal_flash_lock(void)
int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
{
status_t status;
status = g_bootloaderTree->flexSpiNorDriver->erase(0, &flexspi_config, address - FLASH_BASE, len);
hal_flash_init(); /* make sure g_bootloaderTree is set */
#ifdef DEBUG_EXT_FLASH
wolfBoot_printf("flash erase: addr 0x%x, len %d\n",
address - FLASH_BASE, len);
#endif
status = g_bootloaderTree->flexSpiNorDriver->erase(0, FLEXSPI_CONFIG,
address - FLASH_BASE, len);
if (status != kStatus_Success)
return -1;
return 0;
}
#ifdef TEST_FLASH
#ifndef TEST_ADDRESS
#define TEST_ADDRESS (FLASH_BASE + 0x700000) /* 7MB */
#endif
/* #define TEST_FLASH_READONLY */
static uint32_t pageData[WOLFBOOT_SECTOR_SIZE/4]; /* force 32-bit alignment */
static int test_flash(void)
{
int ret;
uint32_t i;
#ifndef TEST_FLASH_READONLY
/* Erase sector */
ret = hal_flash_erase(TEST_ADDRESS, WOLFBOOT_SECTOR_SIZE);
wolfBoot_printf("Erase Sector: Ret %d\n", ret);
/* Fill data into the page_buffer */
for (i=0; i<sizeof(pageData)/sizeof(pageData[0]); i++) {
pageData[i] = (i << 24) | (i << 16) | (i << 8) | i;
}
/* Write Page */
ret = hal_flash_write(TEST_ADDRESS, (uint8_t*)pageData, sizeof(pageData));
wolfBoot_printf("Write Page: Ret %d\n", ret);
#endif /* !TEST_FLASH_READONLY */
/* Compare Page */
ret = memcmp((void*)TEST_ADDRESS, pageData, sizeof(pageData));
if (ret != 0) {
wolfBoot_printf("Check Data @ %d failed\n", ret);
return ret;
}
wolfBoot_printf("Flash Test Passed\n");
return ret;
}
#endif /* TEST_FLASH */

2
hal/imx_rt.ld
View File

@ -44,6 +44,8 @@ SECTIONS
.data : AT (_stored_data)
{
_start_data = .;
KEEP(*(.ramcode*))
. = ALIGN(4);
KEEP(*(.data*))
. = ALIGN(4);
_end_data = .;

6
hal/kinetis.c
View File

@ -321,8 +321,8 @@ int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
uint32_t address_align = address - (address & 0x07);
uint32_t start_off = address - address_align;
int i;
memcpy(aligned_dword, address_align, 8);
for (i = start_off; ((i < 8) && (i < len + start_off)); i++)
memcpy(aligned_dword, (void*)address_align, 8);
for (i = start_off; ((i < 8) && (i < len + (int)start_off)); i++)
aligned_dword[i] = data[w++];
if (memcmp(aligned_dword, empty_dword, 8) != 0) {
ret = FLASH_Program(&pflash, address_align, aligned_dword, 8);
@ -333,7 +333,7 @@ int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
len -= i;
} else {
uint32_t len_align = len - (len & 0x07);
ret = FLASH_Program(&pflash, address, data + w, len_align);
ret = FLASH_Program(&pflash, address, (uint8_t*)data + w, len_align);
if (ret != kStatus_FTFx_Success)
return -1;
len -= len_align;

4
hal/nxp_p1021.c
View File

@ -1540,7 +1540,7 @@ void hal_init(void)
#ifdef DEBUG_UART
uart_init();
#if !defined(BUILD_LOADER_STAGE1)
uart_write("wolfBoot HAL Init\n", 19);
uart_write("wolfBoot HAL Init\n", 18);
#endif
#endif
#ifdef ENABLE_PCIE
@ -1909,7 +1909,7 @@ static int test_flash(void)
{
int ret;
uint32_t i;
uint32_t pageData[FLASH_PAGE_SIZE/4]; /* force 32-bit alignment */
uint32_t pageData[WOLFBOOT_SECTOR_SIZE/4]; /* force 32-bit alignment */
#ifndef TEST_FLASH_READONLY
/* Erase sector */

9
include/user_settings.h
View File

@ -80,11 +80,10 @@ extern int tolower(int c);
/* Kinetis LTC support */
# ifdef FREESCALE_USE_LTC
# define LTC_MAX_ECC_BITS (256)
# define LTC_MAX_INT_BYTES (128)
# ifndef LTC_BASE
# define LTC_BASE ((LTC_Type *)LTC0_BASE)
# endif
# define FREESCALE_COMMON
# define FSL_HW_CRYPTO_MANUAL_SELECTION
# define FREESCALE_LTC_ECC
# define FREESCALE_LTC_TFM
# endif
/* SP MATH */

24
src/delta.c
View File

@ -187,19 +187,19 @@ int wb_diff(WB_DIFF_CTX *ctx, uint8_t *patch, uint32_t len)
int found;
uint8_t *pa, *pb;
uint16_t match_len;
uint32_t blk_start;
uint32_t p_off = 0;
uintptr_t blk_start;
uintptr_t p_off = 0;
if (ctx->off_b >= ctx->size_b)
return 0;
if (len < BLOCK_HDR_SIZE)
return -1;
while ((ctx->off_b + BLOCK_HDR_SIZE < ctx->size_b) && (len > p_off + BLOCK_HDR_SIZE)) {
uint32_t page_start = ctx->off_b / WOLFBOOT_SECTOR_SIZE;
uint32_t pa_start;
uintptr_t page_start = ctx->off_b / WOLFBOOT_SECTOR_SIZE;
uintptr_t pa_start;
found = 0;
if (p_off + BLOCK_HDR_SIZE > len)
return p_off;
return (int)p_off;
/* 'A' Patch base is valid for addresses in blocks ahead.
* For matching previous blocks, 'B' is used as base instead.
@ -211,15 +211,15 @@ int wb_diff(WB_DIFF_CTX *ctx, uint8_t *patch, uint32_t len)
pa_start = (WOLFBOOT_SECTOR_SIZE + 1) * page_start;
pa = ctx->src_a + pa_start;
while (((uint32_t)(pa - ctx->src_a) < ctx->size_a ) && (p_off < len)) {
if ((uint32_t)(ctx->size_a - (pa - ctx->src_a)) < BLOCK_HDR_SIZE)
while (((uintptr_t)(pa - ctx->src_a) < (uintptr_t)ctx->size_a) && (p_off < len)) {
if ((uintptr_t)(ctx->size_a - (pa - ctx->src_a)) < BLOCK_HDR_SIZE)
break;
if ((ctx->size_b - ctx->off_b) < BLOCK_HDR_SIZE)
break;
if ((WOLFBOOT_SECTOR_SIZE - (ctx->off_b % WOLFBOOT_SECTOR_SIZE)) < BLOCK_HDR_SIZE)
break;
if ((memcmp(pa, (ctx->src_b + ctx->off_b), BLOCK_HDR_SIZE) == 0)) {
uint32_t b_start;
uintptr_t b_start;
/* Identical areas of BLOCK_HDR_SIZE bytes match between the images.
* initialize match_len; blk_start is the relative offset within
* the src image.
@ -261,13 +261,13 @@ int wb_diff(WB_DIFF_CTX *ctx, uint8_t *patch, uint32_t len)
}
if (!found) {
/* Try matching an earlier section in the resulting image */
uint32_t pb_end = page_start * WOLFBOOT_SECTOR_SIZE;
uintptr_t pb_end = page_start * WOLFBOOT_SECTOR_SIZE;
pb = ctx->src_b;
while (((uint32_t)(pb - ctx->src_b) < pb_end) && (p_off < len)) {
while (((uintptr_t)(pb - ctx->src_b) < pb_end) && (p_off < len)) {
/* Check image boundary */
if ((ctx->size_b - ctx->off_b) < BLOCK_HDR_SIZE)
break;
if ((uint32_t)(ctx->size_b - (pb - ctx->src_b)) < BLOCK_HDR_SIZE)
if ((uintptr_t)(ctx->size_b - (pb - ctx->src_b)) < BLOCK_HDR_SIZE)
break;
/* Don't try matching backwards if the distance between the two
@ -334,7 +334,7 @@ int wb_diff(WB_DIFF_CTX *ctx, uint8_t *patch, uint32_t len)
}
ctx->off_b++;
}
return (p_off);
return (int)p_off;
}
#endif /* DELTA_UPDATES */

23
src/libwolfboot.c
View File

@ -154,6 +154,18 @@ static const uint32_t wolfboot_magic_trail = WOLFBOOT_MAGIC_TRAIL;
static uint8_t NVM_CACHE[NVM_CACHE_SIZE] __attribute__((aligned(16)));
static int nvm_cached_sector = 0;
#ifdef __GNUC__
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Warray-bounds"
#endif
static uint8_t get_base_offset(uint8_t *base, uintptr_t off)
{
return *(base - off); /* ignore array bounds error */
}
#ifdef __GNUC__
#pragma GCC diagnostic pop
#endif
static int RAMFUNCTION nvm_select_fresh_sector(int part)
{
int sel;
@ -209,8 +221,8 @@ static int RAMFUNCTION nvm_select_fresh_sector(int part)
/* Select the sector with more flags set */
for (off = 1; off < WOLFBOOT_SECTOR_SIZE; off++) {
uint8_t byte_0 = *(base - off);
uint8_t byte_1 = *(base - (WOLFBOOT_SECTOR_SIZE + off));
uint8_t byte_0 = get_base_offset(base, off);
uint8_t byte_1 = get_base_offset(base, (WOLFBOOT_SECTOR_SIZE + off));
if (byte_0 == FLASH_BYTE_ERASED && byte_1 != FLASH_BYTE_ERASED) {
sel = 1;
@ -231,13 +243,14 @@ static int RAMFUNCTION nvm_select_fresh_sector(int part)
}
#endif
/* First time boot? Assume no pending update */
if(off == 1) {
if (off == 1) {
sel=0;
break;
}
/* Examine previous position one byte ahead */
byte_0 = *(base + 1 - off);
byte_1 = *(base + 1 - (WOLFBOOT_SECTOR_SIZE + off));
byte_0 = get_base_offset(base, (1 - off));
byte_1 = get_base_offset(base, (1 - (WOLFBOOT_SECTOR_SIZE + off)));
sel = FLAG_CMP(byte_0, byte_1);
break;
}

95
test-app/Makefile
View File

@ -153,47 +153,70 @@ else
endif
ifeq ($(TARGET),kinetis)
CFLAGS+= -I$(MCUXPRESSO_DRIVERS)/drivers -I$(MCUXPRESSO_DRIVERS) -DCPU_$(MCUXPRESSO_CPU) -I$(MCUXPRESSO_CMSIS)/Include -DDEBUG_CONSOLE_ASSERT_DISABLE=1 -DNVM_FLASH_WRITEONCE=1
APP_OBJS+= $(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o $(MCUXPRESSO_DRIVERS)/drivers/fsl_ftfx_flash.o $(MCUXPRESSO_DRIVERS)/drivers/fsl_ftfx_cache.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_ftfx_controller.o $(MCUXPRESSO_DRIVERS)/drivers/fsl_gpio.o
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o
ifeq ($(MCUXSDK),1)
APP_OBJS+=\
$(MCUXPRESSO)/drivers/flash/fsl_ftfx_flash.o \
$(MCUXPRESSO)/drivers/flash/fsl_ftfx_cache.o \
$(MCUXPRESSO)/drivers/flash/fsl_ftfx_controller.o
else
APP_OBJS+=\
$(MCUXPRESSO_DRIVERS)/drivers/fsl_ftfx_flash.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_ftfx_cache.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_ftfx_controller.o
endif
endif
ifeq ($(TARGET),imx_rt)
CFLAGS+=-I$(MCUXPRESSO_DRIVERS)/drivers -I$(MCUXPRESSO_DRIVERS) -DCPU_$(MCUXPRESSO_CPU) -I$(MCUXPRESSO_CMSIS)/Include -DDEBUG_CONSOLE_ASSERT_DISABLE=1 -DXIP_EXTERNAL_FLASH=1 \
-I$(MCUXPRESSO_DRIVERS)/utilities/debug_console/ -I$(MCUXPRESSO)/components/serial_manager \
-I$(MCUXPRESSO)/components/uart/ -I$(MCUXPRESSO_DRIVERS)/utilities/str/ \
-I$(MCUXPRESSO)/components/flash/nor \
-I$(MCUXPRESSO)/components/flash/nor/flexspi \
-DPRINTF_ADVANCED_ENABLE=1 -DSCANF_ADVANCED_ENABLE=1 -DSERIAL_PORT_TYPE_UART=1 -DNDEBUG=1
LDFLAGS+=-mcpu=cortex-m7 -Wall --specs=nosys.specs -fno-common -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -mthumb -mapcs -Xlinker --gc-sections -Xlinker -static -Xlinker -z -Xlinker muldefs -Xlinker -Map=output.map -static -lm -lc -lnosys
LDFLAGS+=\
-mcpu=cortex-m7 -Wall --specs=nosys.specs -fno-common -ffunction-sections -fdata-sections \
-ffreestanding -fno-builtin -mthumb -mapcs -Xlinker --gc-sections -Xlinker -static -Xlinker -z \
-Xlinker muldefs -Xlinker -Map=output.map -static -lm -lc -lnosys
LSCRIPT_TEMPLATE=imx_rt.ld
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/drivers/fsl_gpio.o $(MCUXPRESSO_DRIVERS)/drivers/fsl_common.o $(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_common_arm.o \
imx_rt_clock_config.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_flexspi.o \
$(MCUXPRESSO_DRIVERS)/utilities/str/fsl_str.o \
$(MCUXPRESSO)/components/uart/fsl_adapter_lpuart.o \
$(MCUXPRESSO)/components/serial_manager/fsl_component_serial_manager.o \
$(MCUXPRESSO)/components/lists/fsl_component_generic_list.o \
$(MCUXPRESSO)/components/serial_manager/fsl_component_serial_port_uart.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_lpuart.o \
$(MCUXPRESSO)/components/flash/nor/flexspi/fsl_flexspi_nor_flash.o \
$(MCUXPRESSO_DRIVERS)/utilities/debug_console/fsl_debug_console.o
APP_OBJS+=\
imx_rt_clock_config.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o \
$(MCUXPRESSO)/components/uart/fsl_adapter_lpuart.o \
$(MCUXPRESSO)/components/serial_manager/fsl_component_serial_manager.o \
$(MCUXPRESSO)/components/lists/fsl_component_generic_list.o \
$(MCUXPRESSO)/components/serial_manager/fsl_component_serial_port_uart.o \
$(MCUXPRESSO)/components/flash/nor/flexspi/fsl_flexspi_nor_flash.o
ifeq ($(MCUXSDK),1)
APP_OBJS+=\
$(MCUXPRESSO)/drivers/igpio/fsl_gpio.o \
$(MCUXPRESSO)/drivers/common/fsl_common.o \
$(MCUXPRESSO)/drivers/common/fsl_common_arm.o \
$(MCUXPRESSO)/drivers/flexspi/fsl_flexspi.o \
$(MCUXPRESSO)/utilities/str/fsl_str.o \
$(MCUXPRESSO)/drivers/lpuart/fsl_lpuart.o \
$(MCUXPRESSO)/utilities/debug_console/fsl_debug_console.o
else
APP_OBJS+=\
$(MCUXPRESSO_DRIVERS)/drivers/fsl_gpio.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_common.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_common_arm.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_flexspi.o \
$(MCUXPRESSO_DRIVERS)/utilities/str/fsl_str.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_lpuart.o \
$(MCUXPRESSO_DRIVERS)/utilities/debug_console/fsl_debug_console.o
endif
ifeq ($(MCUXPRESSO_CPU),MIMXRT1052DVJ6B)
CFLAGS+=-I$(MCUXPRESSO_DRIVERS)/project_template/ -I$(MCUXPRESSO)/boards/evkmimxrt1050/xip/
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/system_MIMXRT1052.o
else
ifeq ($(MCUXPRESSO_CPU),MIMXRT1062DVL6A)
CFLAGS+=-I$(MCUXPRESSO_DRIVERS)/project_template/ -I$(MCUXPRESSO)/boards/evkmimxrt1060/xip/
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/system_MIMXRT1062.o
endif
ifeq ($(MCUXPRESSO_CPU),MIMXRT1064DVL6A)
CFLAGS+=-I$(MCUXPRESSO_DRIVERS)/project_template/ -I$(MCUXPRESSO)/boards/evkmimxrt1064/xip/
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/system_MIMXRT1064.o
endif
ifeq ($(MCUXPRESSO_CPU),MIMXRT1052DVJ6B)
CFLAGS+=-I$(MCUXPRESSO_DRIVERS)/project_template/ \
-I$(MCUXPRESSO)/boards/evkmimxrt1050/xip/
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/system_MIMXRT1052.o
else
ifeq ($(MCUXPRESSO_CPU),MIMXRT1062DVL6A)
CFLAGS+=-I$(MCUXPRESSO_DRIVERS)/project_template/ \
-I$(MCUXPRESSO)/boards/evkmimxrt1060/xip/
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/system_MIMXRT1062.o
endif
ifeq ($(MCUXPRESSO_CPU),MIMXRT1064DVL6A)
CFLAGS+=-I$(MCUXPRESSO_DRIVERS)/project_template/ \
-I$(MCUXPRESSO)/boards/evkmimxrt1064/xip/
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/system_MIMXRT1064.o
endif
endif
endif
ifeq ($(TARGET),stm32g0)
@ -280,7 +303,7 @@ standalone: image.bin
$(Q)$(CC) $(CFLAGS) -c $(OUTPUT_FLAG) $@ $^
clean:
$(Q)rm -f *.bin *.elf tags *.o $(LSCRIPT)
$(Q)rm -f *.bin *.elf tags *.o $(LSCRIPT) $(APP_OBJS)
$(LSCRIPT): $(LSCRIPT_TEMPLATE) FORCE
$(Q)printf "%d" $(WOLFBOOT_PARTITION_BOOT_ADDRESS) > .wolfboot-offset

143
test-app/app_imx_rt.c
View File

@ -28,28 +28,34 @@
static int g_pinSet = false;
extern void imx_rt_init_boot_clock(void);
#ifndef USER_LED_GPIO
#define USER_LED_GPIO GPIO1
#endif
#ifndef USER_LED_PIN
#define USER_LED_PIN 9U
#endif
/* Get debug console frequency. */
static uint32_t debug_console_get_freq(void)
{
uint32_t freq;
/* To make it simple, we assume default PLL and divider settings, and the only variable
from application is use PLL3 source or OSC source */
if (CLOCK_GetMux(kCLOCK_UartMux) == 0) /* PLL3 div6 80M */
{
freq = (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
/* To make it simple, we assume default PLL and divider settings, and the
* only variable from application is use PLL3 source or OSC source */
if (CLOCK_GetMux(kCLOCK_UartMux) == 0) { /* PLL3 div6 80M */
freq = (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) /
(CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
}
else
{
else {
freq = CLOCK_GetOscFreq() / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
}
return freq;
}
/* Initialize debug console. */
#define UART_TYPE kSerialPort_Uart
#define UART_BASEADDR (uint32_t) LPUART1
#define UART_TYPE kSerialPort_Uart
#define UART_BASEADDR LPUART1_BASE
#define UART_INSTANCE 1U
#define UART_BAUDRATE (115200U)
void init_debug_console(void)
@ -60,81 +66,94 @@ void init_debug_console(void)
#if defined(CPU_MIMXRT1062DVL6A) || defined(CPU_MIMXRT1064DVL6A)
/* Pin settings (same for both 1062 and 1064) */
void rt1060_init_pins(void) {
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
void rt1060_init_pins(void)
{
gpio_pin_config_t USER_LED_config = {
.direction = kGPIO_DigitalOutput,
.outputLogic = 0U,
.interruptMode = kGPIO_NoIntmode
};
gpio_pin_config_t USER_LED_config = {
.direction = kGPIO_DigitalOutput,
.outputLogic = 0U,
.interruptMode = kGPIO_NoIntmode
};
GPIO_PinInit(GPIO1, 9U, &USER_LED_config);
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_10_ARM_TRACE_SWO, /* GPIO_AD_B0_10 is configured as ARM_TRACE_SWO */
0U);
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 is configured as LPUART1_TX */
0U);
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 is configured as LPUART1_RX */
0U);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B0_10_ARM_TRACE_SWO, /* GPIO_AD_B0_10 PAD functional properties : */
0x90B1U);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 PAD functional properties : */
0x10B0U);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 PAD functional properties : */
0x10B0U);
GPIO_PinInit(USER_LED_GPIO, USER_LED_PIN, &USER_LED_config);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0U);
IOMUXC_SetPinMux( /* GPIO_AD_B0_10 is configured as ARM_TRACE_SWO */
IOMUXC_GPIO_AD_B0_10_ARM_TRACE_SWO, 0U);
IOMUXC_SetPinMux( /* GPIO_AD_B0_12 is configured as LPUART1_TX */
IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0U);
IOMUXC_SetPinMux( /* GPIO_AD_B0_13 is configured as LPUART1_RX */
IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0x10B0U);
IOMUXC_SetPinConfig( /* GPIO_AD_B0_10 PAD functional properties : */
IOMUXC_GPIO_AD_B0_10_ARM_TRACE_SWO, 0x90B1U);
IOMUXC_SetPinConfig( /* GPIO_AD_B0_12 PAD functional properties : */
IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0x10B0U);
IOMUXC_SetPinConfig( /* GPIO_AD_B0_13 PAD functional properties : */
IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0x10B0U);
}
#endif
#ifdef CPU_MIMXRT1052DVJ6B
void rt1050_init_pins(void) {
CLOCK_EnableClock(kCLOCK_Iomuxc);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TXD, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RXD, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_04_CCM_CLKO1, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_05_CCM_CLKO2, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_12_LPUART1_TXD, 0x10B0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_LPUART1_RXD, 0x10B0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_04_CCM_CLKO1, 0x10B0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_05_CCM_CLKO2, 0x10B0U);
void rt1050_init_pins(void)
{
gpio_pin_config_t USER_LED_config = {
.direction = kGPIO_DigitalOutput,
.outputLogic = 0U,
.interruptMode = kGPIO_NoIntmode
};
CLOCK_EnableClock(kCLOCK_Iomuxc);
GPIO_PinInit(USER_LED_GPIO, USER_LED_PIN, &USER_LED_config);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TXD, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RXD, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_04_CCM_CLKO1, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_05_CCM_CLKO2, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0x10B0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_12_LPUART1_TXD, 0x10B0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_LPUART1_RXD, 0x10B0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_04_CCM_CLKO1, 0x10B0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_05_CCM_CLKO2, 0x10B0U);
}
#endif
void main()
void main(void)
{
imx_rt_init_boot_clock();
#if defined(CPU_MIMXRT1062DVL6A) || defined(CPU_MIMXRT1064DVL6A)
rt1060_init_pins();
#endif
#ifdef CPU_MIMXRT1052DVJ6B
#elif defined(CPU_MIMXRT1052DVJ6B)
rt1050_init_pins();
#endif
SystemCoreClockUpdate();
SysTick_Config(SystemCoreClock / 1000U);
init_debug_console();
PRINTF("wolfBoot Test app, version = %d\n", wolfBoot_current_firmware_version());
while(1) {
SDK_DelayAtLeastUs(100000, SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY);
if (g_pinSet)
{
GPIO_PinWrite(GPIO1, 9U, 0U);
PRINTF("wolfBoot Test app, version = %d\r\n",
wolfBoot_current_firmware_version());
/* enable to test update trigger on reboot */
#if 0
wolfBoot_update_trigger();
#endif
while (1) {
/* 100ms delay */
SDK_DelayAtLeastUs(100 * 1000, SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY);
/* toggle user LED */
if (g_pinSet) {
GPIO_PinWrite(USER_LED_GPIO, USER_LED_PIN, 0U);
g_pinSet = false;
}
else
{
GPIO_PinWrite(GPIO1, 9U, 1U);
else {
GPIO_PinWrite(USER_LED_GPIO, USER_LED_PIN, 1U);
g_pinSet = true;
}
}
}

7
tools/config.mk
View File

@ -4,10 +4,11 @@ ifeq ($(ARCH),)
TARGET?=stm32f4
SIGN?=ED25519
HASH?=SHA256
MCUXPRESSO?=$(HOME)/src/FRDM-K64F
MCUXSDK?=1
MCUXPRESSO?=$(PWD)/mcux-sdk
MCUXPRESSO_CPU=MK64FN1M0VLL12
MCUXPRESSO_DRIVERS?=$(MCUXPRESSO)/devices/MK64F12
MCUXPRESSO_CMSIS?=$(MCUXPRESSO)/CMSIS
MCUXPRESSO_CMSIS?=$(PWD)/CMSIS_5/CMSIS
FREEDOM_E_SDK?=$(HOME)/src/freedom-e-sdk
STM32CUBE?=$(HOME)/STM32Cube/Repository/STM32Cube_FW_WB_V1.3.0
CYPRESS_PDL?=$(HOME)/src/psoc6pdl
@ -63,7 +64,7 @@ ifeq ($(ARCH),)
FORCE_32BIT=0
endif
CONFIG_VARS:= ARCH TARGET SIGN HASH MCUXPRESSO MCUXPRESSO_CPU MCUXPRESSO_DRIVERS \
CONFIG_VARS:= ARCH TARGET SIGN HASH MCUXSDK MCUXPRESSO MCUXPRESSO_CPU MCUXPRESSO_DRIVERS \
MCUXPRESSO_CMSIS FREEDOM_E_SDK STM32CUBE CYPRESS_PDL CYPRESS_CORE_LIB CYPRESS_TARGET_LIB DEBUG VTOR \
CORTEX_M0 CORTEX_M7 CORTEX_M33 NO_ASM EXT_FLASH SPI_FLASH NO_XIP UART_FLASH ALLOW_DOWNGRADE NVM_FLASH_WRITEONCE \
DISABLE_BACKUP WOLFBOOT_VERSION V NO_MPU ENCRYPT FLAGS_HOME FLAGS_INVERT \

6
tools/keytools/keygen.c
View File

@ -26,6 +26,10 @@
/* Must also define DEBUG_WOLFSSL in user_settings.h */
//#define DEBUG_SIGNTOOL
#ifdef _WIN32
#define _CRT_SECURE_NO_WARNINGS
#define _CRT_NONSTDC_NO_DEPRECATE /* unlink */
#endif
#include <stdio.h>
#include <stdint.h>
#include <stdarg.h>
@ -554,7 +558,7 @@ static void key_import(uint32_t ktype, const char *fname)
exit(6);
}
readLen = fread(buf, 1, sizeof(buf), file);
readLen = (int)fread(buf, 1, sizeof(buf), file);
if (readLen <= 0) {
printf("Fatal error: could not find valid key in file %s\n", fname);

152
tools/keytools/sign.c
View File

@ -26,6 +26,10 @@
/* Must also define DEBUG_WOLFSSL in user_settings.h */
//#define DEBUG_SIGNTOOL
#ifdef _WIN32
#define _CRT_SECURE_NO_WARNINGS
#define _CRT_NONSTDC_NO_DEPRECATE /* unlink */
#endif
#include <stdio.h>
#include <stdarg.h>
#include <stdlib.h>
@ -37,6 +41,9 @@
#include <sys/types.h>
#include <fcntl.h>
#include <stddef.h>
/* target.h is a generated file based on .config (see target.h.in)
* Provides: WOLFBOOT_SECTOR_SIZE */
#include <target.h>
#include <delta.h>
#include "wolfboot/version.h"
@ -45,11 +52,16 @@
#include <io.h>
#define HAVE_MMAP 0
#define ftruncate(fd, len) _chsize(fd, len)
static inline int fp_truncate(FILE *f, size_t len)
{
int fd;
if (f == NULL)
return -1;
fd = _fileno(f);
return _chsize_s(fd, len);
}
#else
#define HAVE_MMAP 1
#endif
#if HAVE_MMAP
#include <sys/mman.h>
#include <unistd.h>
#endif
@ -1009,7 +1021,7 @@ static int make_header_ex(int is_diff, uint8_t *pubkey, uint32_t pubkey_sz,
mp_clear(&r); mp_clear(&s);
}
#endif
else if (CMD.sign == SIGN_RSA2048 ||
else if (CMD.sign == SIGN_RSA2048 ||
CMD.sign == SIGN_RSA3072 ||
CMD.sign == SIGN_RSA4096) {
@ -1237,7 +1249,11 @@ static int make_header_delta(uint8_t *pubkey, uint32_t pubkey_sz,
static int base_diff(const char *f_base, uint8_t *pubkey, uint32_t pubkey_sz, int padding)
{
#if HAVE_MMAP
int fd1 = -1, fd2 = -1, fd3 = -1;
#else
FILE *f1 = NULL, *f2 = NULL, *f3 = NULL;
#endif
int len1 = 0, len2 = 0, len3 = 0;
struct stat st;
void *base = NULL;
@ -1266,31 +1282,35 @@ static int base_diff(const char *f_base, uint8_t *pubkey, uint32_t pubkey_sz, in
goto cleanup;
}
#if HAVE_MMAP
/* Open base image */
fd1 = open(f_base, O_RDWR);
if (fd1 < 0) {
printf("Cannot open file %s\n", f_base);
goto cleanup;
}
#if HAVE_MMAP
base = mmap(NULL, len1, PROT_READ|PROT_WRITE, MAP_SHARED, fd1, 0);
if (base == (void *)(-1)) {
perror("mmap");
goto cleanup;
}
#else
f1 = fopen(f_base, "wb");
if (f1 == NULL) {
printf("Cannot open file %s\n", f_base);
goto cleanup;
}
base = malloc(len1);
if (base == NULL) {
fprintf(stderr, "Error malloc for base %d\n", len1);
goto cleanup;
}
if (len1 != read(fd1, base, len1)) {
if (len1 != (int)fread(base, len1, 1, f1)) {
perror("read of base");
goto cleanup;
}
#endif
/* Check base image version */
base_ver_p = strstr(f_base, "_v");
if (base_ver_p) {
@ -1313,6 +1333,7 @@ static int base_diff(const char *f_base, uint8_t *pubkey, uint32_t pubkey_sz, in
printf("Delta base version: %u\n", delta_base_version);
}
#if HAVE_MMAP
/* Open second image file */
fd2 = open(CMD.output_image_file, O_RDONLY);
if (fd2 < 0) {
@ -1325,23 +1346,11 @@ static int base_diff(const char *f_base, uint8_t *pubkey, uint32_t pubkey_sz, in
goto cleanup;
}
len2 = st.st_size;
#if HAVE_MMAP
buffer = mmap(NULL, len2, PROT_READ, MAP_SHARED, fd2, 0);
if (buffer == (void *)(-1)) {
perror("mmap");
goto cleanup;
}
#else
buffer = malloc(len2);
if (buffer == NULL) {
fprintf(stderr, "Error malloc for buffer %d\n", len2);
goto cleanup;
}
if (len2 != read(fd2, buffer, len2)) {
perror("fread of buffer");
goto cleanup;
}
#endif
/* Open output file */
fd3 = open(wolfboot_delta_file, O_RDWR|O_CREAT|O_TRUNC, 0660);
@ -1350,15 +1359,54 @@ static int base_diff(const char *f_base, uint8_t *pubkey, uint32_t pubkey_sz, in
goto cleanup;
}
if (len2 <= 0) {
printf("Invalid file size: %d\n", len2);
goto cleanup;
}
lseek(fd3, MAX_SRC_SIZE -1, SEEK_SET);
io_sz = write(fd3, &ff, 1);
if (io_sz != 1) {
printf("Could not write to output file: %s\n", strerror(errno));
goto cleanup;
}
lseek(fd3, 0, SEEK_SET);
len3 = 0;
#else
/* Open second image file */
f2 = fopen(CMD.output_image_file, "rb");
if (f2 == NULL) {
printf("Cannot open file %s\n", CMD.output_image_file);
goto cleanup;
}
/* Get second file size */
fseek(f2, 0L, SEEK_END);
len2 = ftell(f2);
fseek(f2, 0L, SEEK_SET);
buffer = malloc(len2);
if (buffer == NULL) {
fprintf(stderr, "Error malloc for buffer %d\n", len2);
goto cleanup;
}
if (len2 != (int)fread(buffer, len2, 1, f2)) {
perror("fread of buffer");
goto cleanup;
}
/* Open output file */
f3 = fopen(wolfboot_delta_file, "wb");
if (f3 == NULL) {
printf("Cannot open file %s for writing\n", wolfboot_delta_file);
goto cleanup;
}
if (len2 <= 0) {
goto cleanup;
}
fseek(f3, MAX_SRC_SIZE -1, SEEK_SET);
io_sz = (int)fwrite(&ff, 1, 1, f3);
if (io_sz != 1) {
goto cleanup;
}
fseek(f3, 0, SEEK_SET);
len3 = 0;
#endif
/* Direct base->second patch */
if (wb_diff_init(&diff_ctx, base, len1, buffer, len2) < 0) {
@ -1368,7 +1416,11 @@ static int base_diff(const char *f_base, uint8_t *pubkey, uint32_t pubkey_sz, in
r = wb_diff(&diff_ctx, dest, blksz);
if (r < 0)
goto cleanup;
#if HAVE_MMAP
io_sz = write(fd3, dest, r);
#else
io_sz = (int)fwrite(dest, r, 1, f3);
#endif
if (io_sz != r) {
goto cleanup;
}
@ -1377,7 +1429,11 @@ static int base_diff(const char *f_base, uint8_t *pubkey, uint32_t pubkey_sz, in
patch_sz = len3;
while ((len3 % padding) != 0) {
uint8_t zero = 0;
#if HAVE_MMAP
io_sz = write(fd3, &zero, 1);
#else
io_sz = (int)fwrite(&zero, 1, 1, f3);
#endif
if (io_sz != 1) {
goto cleanup;
}
@ -1394,57 +1450,75 @@ static int base_diff(const char *f_base, uint8_t *pubkey, uint32_t pubkey_sz, in
r = wb_diff(&diff_ctx, dest, blksz);
if (r < 0)
goto cleanup;
#if HAVE_MMAP
io_sz = write(fd3, dest, r);
#else
io_sz = (int)fwrite(dest, r, 1, f3);
#endif
if (io_sz != r) {
goto cleanup;
}
patch_inv_sz += r;
len3 += r;
} while (r > 0);
ret = ftruncate(fd3, len3);
#if HAVE_MMAP
if (fd3 >= 0) {
if (len3 > 0) {
ret = ftruncate(fd3, len3);
}
close(fd3);
fd3 = -1;
}
#else
if (f3 != NULL) {
if (len3 > 0) {
ret = fp_truncate(f3, len3);
}
fclose(f3);
f3 = NULL;
}
#endif
if (ret != 0) {
goto cleanup;
}
close(fd3);
fd3 = -1;
printf("Successfully created output file %s\n", wolfboot_delta_file);
/* Create delta file, with header, from the resulting patch */
ret = make_header_delta(pubkey, pubkey_sz, wolfboot_delta_file, CMD.output_diff_file,
delta_base_version, patch_sz, patch_inv_off, patch_inv_sz);
cleanup:
if (fd3 >= 0) {
if (len3 > 0) {
io_sz = ftruncate(fd3, len3);
(void)io_sz; /* ignore failure */
}
close(fd3);
fd3 = -1;
}
/* Unlink output file */
unlink(wolfboot_delta_file);
#if HAVE_MMAP
/* Cleanup/close */
if (fd2 >= 0) {
if (len2 > 0) {
#if HAVE_MMAP
munmap(buffer, len2);
#else
free(buffer);
#endif
}
close(fd2);
}
if (fd1 >= 0) {
if (len1 > 0) {
#if HAVE_MMAP
munmap(base, len1);
#else
free(base);
#endif
}
close(fd1);
}
#else
if (f2 != NULL) {
if (len2 > 0) {
free(buffer);
}
fclose(f2);
}
if (f1 != NULL) {
if (len1 > 0) {
free(base);
}
fclose(f1);
}
#endif
return ret;
}

2
tools/scripts/prepare_encrypted_delta_update.sh
View File

@ -16,7 +16,7 @@ echo -n "0123456789abcdef0123456789abcdef0123456789ab" > enc_key.der
$SIGN_TOOL --ecc256 \
--encrypt enc_key.der \
--delta test-app/image_v1_signed.bin \
test-app/image.bin ecc256.der $VERSION
test-app/image.bin wolfboot_signing_private_key.der $VERSION
dd if=/dev/zero bs=$SIZE count=1 2>/dev/null | tr "\000" "\377" > update.bin
dd if=$APP of=update.bin bs=1 conv=notrunc
printf "pBOOT" >> update.bin

2
tools/scripts/prepare_update.sh
View File

@ -9,7 +9,7 @@ fi
SIZE=131067
VERSION=8
APP=test-app/image_v"$VERSION"_signed.bin
$SIGN_TOOL --ecc256 test-app/image.bin ecc256.der $VERSION
$SIGN_TOOL --ecc256 test-app/image.bin wolfboot_signing_private_key.der $VERSION
dd if=/dev/zero bs=$SIZE count=1 2>/dev/null | tr "\000" "\377" > update.bin
dd if=$APP of=update.bin bs=1 conv=notrunc
printf "pBOOT" >> update.bin

2
tools/scripts/prepare_update_l5.sh
View File

@ -9,7 +9,7 @@ fi
SIZE=129019
VERSION=8
APP=test-app/image_v"$VERSION"_signed.bin
$SIGN_TOOL --sha256 --ecc256 test-app/image.bin ecc256.der $VERSION
$SIGN_TOOL --sha256 --ecc256 test-app/image.bin wolfboot_signing_private_key.der $VERSION
dd if=/dev/zero bs=$SIZE count=1 2>/dev/null | tr "\000" "\377" > update.bin
dd if=$APP of=update.bin bs=1 conv=notrunc
printf "pBOOT" >> update.bin

2
tools/scripts/prepare_update_l5_dualbank.sh
View File

@ -9,7 +9,7 @@ fi
SIZE=229371
VERSION=8
APP=test-app/image_v"$VERSION"_signed.bin
$SIGN_TOOL --ecc256 test-app/image.bin ecc256.der $VERSION
$SIGN_TOOL --ecc256 test-app/image.bin wolfboot_signing_private_key.der $VERSION
dd if=/dev/zero bs=$SIZE count=1 2>/dev/null | tr "\000" "\377" > update.bin
dd if=$APP of=update.bin bs=1 conv=notrunc
printf "pBOOT" >> update.bin