Update the new `spi_xfer` to include a "continue" flag to allow leaving the CS asserted.

hal/nxp_p1021.c

@@ -488,7 +488,7 @@ void hal_espi_init(uint32_t cs, uint32_t clock_hz, uint32_t mode)
 }
 
 /* Note: This code assumes all input buffers are multiple of 4 */
-int hal_espi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz)
+int hal_espi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz, int cont)
 {
     uint32_t reg, blks;
 
@@ -517,10 +517,12 @@ int hal_espi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz)
         set32(ESPI_SPIE, ESPI_SPIE_RNE); /* clear event */
     }
 
-    /* toggle ESPI_SPMODE_EN - to deassert CS */
-    reg = get32(ESPI_SPMODE);
-    set32(ESPI_SPMODE, reg & ~ESPI_SPMODE_EN);
-    set32(ESPI_SPMODE, reg);
+    if (!cont) {
+        /* toggle ESPI_SPMODE_EN - to deassert CS */
+        reg = get32(ESPI_SPMODE);
+        set32(ESPI_SPMODE, reg & ~ESPI_SPMODE_EN);
+        set32(ESPI_SPMODE, reg);
+    }
 
     return 0;
 }
@@ -1463,7 +1465,7 @@ int test_tpm(void)
     uint8_t rx[8] = {0};
 
     hal_espi_init(SPI_CS_TPM, 2000000, 0);
-    hal_espi_xfer(SPI_CS_TPM, tx, rx, (uint32_t)sizeof(rx));
+    hal_espi_xfer(SPI_CS_TPM, tx, rx, (uint32_t)sizeof(rx), 0);
 
     wolfBoot_printf("RX: 0x%x\n", *((uint32_t*)&rx[4]));
     return rx[4] != 0xFF ? 0 : -1;

hal/spi/spi_drv_nrf52.c

@@ -126,7 +126,7 @@ void spi_release(void)
 }
 
 #ifdef WOLFBOOT_TPM
-int spi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz)
+int spi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz, int cont)
 {
     uint32_t i;
     spi_cs_on(SPI_CS_TPM_PIO_BASE, cs);
@@ -134,7 +134,9 @@ int spi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz)
         spi_write((const char)tx[i]);
         rx[i] = spi_read();
     }
-    spi_cs_off(SPI_CS_TPM_PIO_BASE, cs);
+    if (!cont) {
+        spi_cs_off(SPI_CS_TPM_PIO_BASE, cs);
+    }
     return 0;
 }
 #endif /* WOLFBOOT_TPM */

hal/spi/spi_drv_nxp.c

@@ -32,7 +32,7 @@
 #if defined(PLATFORM_nxp_p1021)
 /* functions from nxp_p1021.c hal */
 extern void hal_espi_init(uint32_t cs, uint32_t clock_hz, uint32_t mode);
-extern int hal_espi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz);
+extern int hal_espi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz, int cont);
 extern void hal_espi_deinit(void);
 #endif
 
@@ -55,8 +55,8 @@ void spi_release(void)
     hal_espi_deinit();
 }
 
-int spi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz)
+int spi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz, int cont)
 {
-    return hal_espi_xfer(cs, tx, rx, sz);
+    return hal_espi_xfer(cs, tx, rx, sz, cont);
 }
 #endif /* WOLFBOOT_TPM */

hal/spi/spi_drv_stm32.c

@@ -500,7 +500,7 @@ void RAMFUNCTION spi_release(void)
 }
 
 #ifdef WOLFBOOT_TPM
-int spi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz)
+int spi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz, int cont)
 {
     uint32_t i;
     spi_cs_on(SPI_CS_TPM_PIO_BASE, cs);
@@ -508,7 +508,9 @@ int spi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz)
         spi_write((const char)tx[i]);
         rx[i] = spi_read();
     }
-    spi_cs_off(SPI_CS_TPM_PIO_BASE, cs);
+    if (!cont) {
+        spi_cs_off(SPI_CS_TPM_PIO_BASE, cs);
+    }
     return 0;
 }
 #endif /* WOLFBOOT_TPM */

hal/spi/spi_drv_zynq.c

@@ -71,7 +71,7 @@ void spi_release(void)
 }
 
 #ifdef WOLFBOOT_TPM
-int spi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz)
+int spi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz, int cont)
 {
     uint32_t i;
     spi_cs_on(SPI_CS_TPM_PIO_BASE, cs);
@@ -79,7 +79,9 @@ int spi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz)
         spi_write((const char)tx[i]);
         rx[i] = spi_read();
     }
-    spi_cs_off(SPI_CS_TPM_PIO_BASE, cs);
+    if (!cont) {
+        spi_cs_off(SPI_CS_TPM_PIO_BASE, cs);
+    }
     return 0;
 }
 #endif /* WOLFBOOT_TPM */

include/spi_drv.h

@@ -64,7 +64,9 @@ uint8_t spi_read(void);
 #endif
 
 #ifdef WOLFBOOT_TPM
-int spi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz);
+/* Perform a SPI transaction. Set cont!=0 to not let CS go low after this */
+/* cont 0=is last transfer and will de-assert CS, 1=leave CS asserted */
+int spi_xfer(int cs, const uint8_t* tx, uint8_t* rx, uint32_t sz, int cont);
 #endif
 
 #if defined(QSPI_FLASH) || defined(OCTOSPI_FLASH)

src/image.c

@@ -720,7 +720,9 @@ static int TPM2_IoCb(TPM2_CTX* ctx, const byte* txBuf, byte* rxBuf,
     int ret;
 
     memset(rxBuf, 0, xferSz);
-    ret = spi_xfer(SPI_CS_TPM, txBuf, rxBuf, xferSz);
+    ret = spi_xfer(SPI_CS_TPM, txBuf, rxBuf, xferSz, 0);
+
+    /* TODO: Add TIS wait states */
 
     /*
     printf("\r\nSPI TX: ");