mirror of https://github.com/wolfSSL/wolfBoot.git
commit
2d4d897acb
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@ -4,12 +4,13 @@ SIGN?=RSA4096
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HASH?=SHA3
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HASH?=SHA3
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DEBUG?=1
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DEBUG?=1
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VTOR?=1
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VTOR?=1
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NO_XIP?=1
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SPMATH?=1
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SPMATH?=1
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IMAGE_HEADER_SIZE?=1024
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IMAGE_HEADER_SIZE?=1024
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PKA?=1
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PKA?=1
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WOLFTPM?=0
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WOLFTPM?=0
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DEBUG_UART?=0
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DEBUG_UART?=0
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NO_XIP?=1
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NO_QNX?=1
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WOLFBOOT_SECTOR_SIZE=0x400
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WOLFBOOT_SECTOR_SIZE=0x400
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WOLFBOOT_NO_PARTITIONS=1
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WOLFBOOT_NO_PARTITIONS=1
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WOLFBOOT_LOAD_ADDRESS?=0x3080000
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WOLFBOOT_LOAD_ADDRESS?=0x3080000
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@ -102,6 +102,7 @@ static inline void delay(int32_t count)
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asm volatile("nop");
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asm volatile("nop");
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}
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}
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}
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}
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#if defined(DEBUG_UART)
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/**
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/**
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* write message to mailbox
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* write message to mailbox
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*/
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*/
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@ -213,7 +214,7 @@ void uart_init()
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/* enable UART0 transfer & receive*/
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/* enable UART0 transfer & receive*/
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*UART0_CR = (1 << 0) | (1 << 8) | (1 << 9);
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*UART0_CR = (1 << 0) | (1 << 8) | (1 << 9);
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}
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}
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#endif
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void* hal_get_primary_address(void)
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void* hal_get_primary_address(void)
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{
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{
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return (void*)&kernel_addr;
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return (void*)&kernel_addr;
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@ -300,7 +301,7 @@ void hal_init(void)
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"0123456789abcdef";
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"0123456789abcdef";
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wolfBoot_set_encrypt_key((uint8_t *)enc_key,(uint8_t *)(enc_key + 32));
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wolfBoot_set_encrypt_key((uint8_t *)enc_key,(uint8_t *)(enc_key + 32));
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#endif
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#endif
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#if defined(DEBUG_UART)
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uart_init();
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uart_init();
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/* length of the message */
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/* length of the message */
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@ -341,7 +342,7 @@ void hal_init(void)
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wolfBoot_printf("\n M2MC clock : %d Hz", getclocks(13));
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wolfBoot_printf("\n M2MC clock : %d Hz", getclocks(13));
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wolfBoot_printf("\n PIXEL_BVB clock : %d Hz\n", getclocks(14));
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wolfBoot_printf("\n PIXEL_BVB clock : %d Hz\n", getclocks(14));
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#endif
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#endif
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#endif
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}
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}
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void hal_prepare_boot(void)
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void hal_prepare_boot(void)
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@ -0,0 +1,28 @@
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/* raspi3.h
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*
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* Copyright (C) 2025 wolfSSL Inc.
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*
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* This file is part of wolfBoot.
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*
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* wolfBoot is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* wolfBoot is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
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*/
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#ifndef _RASPI3_H_
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#define _RASPI3_H_
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#define USE_BUILTIN_STARTUP
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#define USE_SIMPLE_STARTUP
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#endif /* _RASPI3_H_ */
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@ -563,7 +563,9 @@ endif
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ifeq ($(NO_XIP),1)
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ifeq ($(NO_XIP),1)
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CFLAGS+=-D"NO_XIP"
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CFLAGS+=-D"NO_XIP"
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endif
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endif
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ifeq ($(NO_QNX),1)
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CFLAGS+=-D"NO_QNX"
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endif
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ifeq ($(ALLOW_DOWNGRADE),1)
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ifeq ($(ALLOW_DOWNGRADE),1)
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CFLAGS+= -D"ALLOW_DOWNGRADE"
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CFLAGS+= -D"ALLOW_DOWNGRADE"
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@ -1,6 +1,6 @@
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/* boot_aarch64.c
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/* boot_aarch64.c
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*
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*
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* Copyright (C) 2024 wolfSSL Inc.
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* Copyright (C) 2025 wolfSSL Inc.
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*
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*
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* This file is part of wolfBoot.
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* This file is part of wolfBoot.
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*
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*
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@ -30,6 +30,10 @@
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#include "hal/nxp_ls1028a.h"
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#include "hal/nxp_ls1028a.h"
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#endif
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#endif
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#ifdef TARGET_raspi3
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#include "hal/raspi3.h"
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#endif
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/* GICv2 Register Offsets */
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/* GICv2 Register Offsets */
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#ifndef GICD_BASE
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#ifndef GICD_BASE
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#define GICD_BASE 0xF9010000
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#define GICD_BASE 0xF9010000
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@ -1028,7 +1032,55 @@ FPUStatus:
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.skip 1
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.skip 1
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.align 8
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.align 8
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#elif defined(USE_SIMPLE_STARTUP)
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.section ".boot"
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.global _vector_table
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_vector_table:
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mov x21, x0 // read ATAG/FDT address
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4: ldr x1, =_vector_table // get start of .text in x1
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// Read current EL
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mrs x0, CurrentEL
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and x0, x0, #0x0C
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// EL == 3?
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cmp x0, #12
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bne 2f
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3: mrs x2, scr_el3
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orr x2, x2, 0x0F // scr_el3 |= NS|IRQ|FIQ|EA
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msr scr_el3, x2
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msr cptr_el3, xzr // enable FP/SIMD
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// EL == 1?
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2: cmp x0, #4
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beq 1f
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// EL == 2?
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mov x2, #3 << 20
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msr cptr_el2, x2 /* Enable FP/SIMD */
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b 0f
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1: mov x0, #3 << 20
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msr cpacr_el1, x0 // Enable FP/SIMD for EL1
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msr sp_el1, x1
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/* Suspend slave CPUs */
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0: mrs x3, mpidr_el1 // read MPIDR_EL1
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and x3, x3, #3 // CPUID = MPIDR_EL1 & 0x03
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cbz x3, 8f // if 0, branch forward
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7: wfi // infinite sleep
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b 7b
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8: mov sp, x1 // set stack pointer
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bl boot_entry_C // boot_entry_C never returns
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b 7b // go to sleep anyhow in case.
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#if 0
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.section ".boot"
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.global _vector_table
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_vector_table:
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bl boot_entry_C // boot_entry_C never returns
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#endif
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#endif /* !USE_BUILTIN_STARTUP */
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#endif /* !USE_BUILTIN_STARTUP */
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