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wolfBoot
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Added build test. Updated mcxa + mcxw to mcux-sdk

pull/551/head
Daniele Lacamera 2025-02-17 08:35:03 +01:00
parent 4d1bf5df28
commit 354df34b6c
6 changed files with 95 additions and 82 deletions
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17
.github/workflows/test-configs.yml vendored
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@ -159,12 +159,17 @@ jobs:
arch: ppc
config-file: ./config/examples/nxp-t2080.config
# MCXA test disabled until MCXA is available in mcux
# nxp_mcxa_test:
# uses: ./.github/workflows/test-build-mcux-sdk.yml
# with:
# arch: arm
# config-file: ./config/examples/mcxa.config
nxp_mcxa_test:
uses: ./.github/workflows/test-build-mcux-sdk.yml
with:
arch: arm
config-file: ./config/examples/mcxa.config
nxp_mcxw_test:
uses: ./.github/workflows/test-build-mcux-sdk.yml
with:
arch: arm
config-file: ./config/examples/mcxw.config
raspi3_test:
uses: ./.github/workflows/test-build.yml

19
arch.mk
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@ -613,6 +613,7 @@ ifeq ($(TARGET),mcxa)
CFLAGS+=\
-I$(MCUXPRESSO_DRIVERS) \
-I$(MCUXPRESSO_DRIVERS)/drivers \
-I$(MCUXPRESSO_DRIVERS)/drivers/common \
-I$(MCUXPRESSO)/drivers \
-I$(MCUXPRESSO)/drivers/common \
-I$(MCUXPRESSO_CMSIS)/Include \
@ -624,18 +625,16 @@ ifeq ($(TARGET),mcxa)
LDFLAGS+=-mcpu=cortex-m33
OBJS+=\
$(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_spc.o
$(MCUXPRESSO)/drivers/mcx_spc/fsl_spc.o \
$(MCUXPRESSO_DRIVERS)/project_template/clock_config.o
ifeq ($(MCUXSDK),1)
CFLAGS+=\
-I$(MCUXPRESSO)/drivers/flash \
-I$(MCUXPRESSO)/drivers/mcx_spc \
-I$(MCUXPRESSO)/drivers/sysmpu \
-I$(MCUXPRESSO)/drivers/ltc \
-I$(MCUXPRESSO)/drivers/port \
-I$(MCUXPRESSO)/drivers/gpio
else
endif
endif
ifeq ($(TARGET),mcxw)
@ -645,6 +644,8 @@ ifeq ($(TARGET),mcxw)
-I$(MCUXPRESSO_DRIVERS)/drivers \
-I$(MCUXPRESSO_DRIVERS)/periph2 \
-I$(MCUXPRESSO)/drivers \
-I$(MCUXPRESSO)/drivers/flash_k4 \
-I$(MCUXPRESSO)/drivers/ccm32k \
-I$(MCUXPRESSO)/drivers/common \
-I$(MCUXPRESSO_CMSIS)/Include \
-I$(MCUXPRESSO_CMSIS)/Core/Include
@ -655,21 +656,19 @@ ifeq ($(TARGET),mcxw)
LDFLAGS+=-mcpu=cortex-m33
OBJS+=\
$(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_spc.o \
$(MCUXPRESSO)/drivers/spc/fsl_spc.o \
$(MCUXPRESSO_DRIVERS)/project_template/clock_config.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_ccm32k.o \
$(MCUXPRESSO)/drivers/ccm32k/fsl_ccm32k.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_romapi.o
ifeq ($(MCUXSDK),1)
CFLAGS+=\
-I$(MCUXPRESSO)/drivers/flash \
-I$(MCUXPRESSO)/drivers/spc \
-I$(MCUXPRESSO)/drivers/sysmpu \
-I$(MCUXPRESSO)/drivers/ltc \
-I$(MCUXPRESSO)/drivers/port \
-I$(MCUXPRESSO)/drivers/gpio
else
endif
endif
ifeq ($(TARGET),imx_rt)

42
config/examples/mcxw.config 100644
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@ -0,0 +1,42 @@
ARCH?=ARM
TARGET?=mcxw
SIGN?=ECC256
HASH?=SHA256
MCUXSDK?=0
MCUXPRESSO?=$(PWD)/../NXP/MCXW71
MCUXPRESSO_CMSIS?=$(MCUXPRESSO)/CMSIS
MCUXPRESSO_CPU?=MCXW716CMFTA
MCUXPRESSO_DRIVERS?=$(MCUXPRESSO)/devices/MCXW716C
DEBUG?=0
VTOR?=1
CORTEX_M0?=0
NO_ASM?=0
NO_MPU=1
EXT_FLASH?=0
SPI_FLASH?=0
ALLOW_DOWNGRADE?=0
NVM_FLASH_WRITEONCE?=0
NO_ARM_ASM=1
WOLFBOOT_VERSION?=0
V?=0
SPMATH?=1
RAM_CODE?=1
DUALBANK_SWAP?=0
PKA?=1
# 8KB sectors
WOLFBOOT_SECTOR_SIZE?=0x2000
# Default configuration
# 32KB boot, 44KB partitions, 8KB swap
WOLFBOOT_PARTITION_SIZE?=0xB000
WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x8000
WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x13000
WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x1E000
# Alternate larger configuration for debugging or ARMASM
# 40KB boot, 40KB partitions, 8KB swap
#WOLFBOOT_PARTITION_SIZE?=0xA000
#WOLFBOOT_PARTITION_BOOT_ADDRESS?=0xA000
#WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x14000
#WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x1E000

55
hal/mcxa.c
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@ -38,6 +38,10 @@
static flash_config_t pflash;
static int flash_init = 0;
uint32_t SystemCoreClock;
extern void BOARD_BootClockFRO96M(void);
#ifdef __WOLFBOOT
/* Assert hook needed by Kinetis SDK */
void __assert_func(const char *a, int b, const char *c, const char *d)
@ -46,57 +50,6 @@ void __assert_func(const char *a, int b, const char *c, const char *d)
;
}
/* The following clock setting function is autogenerated by the MCUXpresso IDE */
void BOARD_BootClockFRO96M(void)
{
uint32_t coreFreq;
spc_active_mode_core_ldo_option_t ldoOption;
spc_sram_voltage_config_t sramOption;
/* Get the CPU Core frequency */
coreFreq = CLOCK_GetCoreSysClkFreq();
/* The flow of increasing voltage and frequency */
if (coreFreq <= BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) {
/* Set the LDO_CORE VDD regulator level */
ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
(void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
/* Configure Flash to support different voltage level and frequency */
FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U));
/* Specifies the operating voltage for the SRAM's read/write timing margin */
sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
sramOption.requestVoltageUpdate = true;
(void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
}
CLOCK_SetupFROHFClocking(96000000U); /*!< Enable FRO HF(96MHz) output */
CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */
CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO_HF */
/* The flow of decreasing voltage and frequency */
if (coreFreq > BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) {
/* Configure Flash to support different voltage level and frequency */
FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U));
/* Specifies the operating voltage for the SRAM's read/write timing margin */
sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
sramOption.requestVoltageUpdate = true;
(void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
/* Set the LDO_CORE VDD regulator level */
ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
(void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
}
/*!< Set up clock selectors - Attach clocks to the peripheries */
/*!< Set up dividers */
CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */
CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */
}
void hal_init(void)
{
/* Clock setting */

33
hal/mcxw.c
View File

@ -30,12 +30,15 @@
/* Clock + RAM voltage settings */
#include "fsl_clock.h"
#include "fsl_spc.h"
//#include "fsl_spc.h"
/* Flash driver */
#include "fsl_device_registers.h"
#include "fsl_lpspi_flash.h"
#include "fsl_k4_flash.h"
#include "fsl_flash_api.h"
#include "fsl_ccm32k.h"
#define FLASH FMU0
/*!< Core clock frequency: 48000000Hz */
#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 48000000U
@ -87,24 +90,24 @@ int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
{
int ret;
int w = 0;
const uint8_t empty_qword[16] = {
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
const uint32_t empty_qword[4] = {
0xFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF
};
while (len > 0) {
if ((len < 16) || address & 0x0F) {
uint8_t aligned_qword[16];
if ((len < 16) || (address & 0x0F)) {
uint32_t aligned_qword[4];
uint32_t address_align = address - (address & 0x0F);
uint32_t start_off = address - address_align;
int i;
memcpy(aligned_qword, (void*)address_align, 16);
for (i = start_off; ((i < 16) && (i < len + (int)start_off)); i++) {
aligned_qword[i] = data[w++];
((uint8_t *)aligned_qword)[i] = data[w++];
}
if (memcmp(aligned_qword, empty_qword, 16) != 0) {
ret = FLASH_Program(&pflash, FLASH, address_align, aligned_qword, 16);
ret = FLASH_Program(&pflash, FLASH, address_align, aligned_qword,
16);
if (ret != kStatus_Success)
return -1;
}
@ -113,7 +116,17 @@ int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
}
else {
uint32_t len_align = len - (len & 0x0F);
ret = FLASH_Program(&pflash, FLASH, address, (uint8_t*)data + w, len_align);
if (((uint32_t)data + w) & 0x0F) {
uint32_t __attribute__((aligned(16))) aligned_data[4];
memcpy(aligned_data, (void*)((uint32_t)data + w), len_align);
ret = FLASH_Program(&pflash, FLASH, address, (uint32_t*)data + w,
len_align);
}
else
{
ret = FLASH_Program(&pflash, FLASH, address, (uint32_t*)data + w,
len_align);
}
if (ret != kStatus_Success)
return -1;
len -= len_align;

11
test-app/Makefile
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@ -296,19 +296,20 @@ endif
ifeq ($(TARGET),mcxa)
LSCRIPT_TEMPLATE=ARM-mcxa.ld
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/project_template/clock_config.o
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/drivers/fsl_reset.o
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/drivers/fsl_gpio.o
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/drivers/fsl_spc.o
APP_OBJS+=$(MCUXPRESSO)/drivers/gpio/fsl_gpio.o
APP_OBJS+=$(MCUXPRESSO)/drivers/mcx_spc/fsl_spc.o
endif
ifeq ($(TARGET),mcxw)
LSCRIPT_TEMPLATE=ARM-mcxw.ld
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/drivers/fsl_gpio.o
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/drivers/fsl_spc.o
APP_OBJS+=$(MCUXPRESSO)/drivers/gpio/fsl_gpio.o
APP_OBJS+=$(MCUXPRESSO)/drivers/spc/fsl_spc.o
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/project_template/clock_config.o
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/drivers/fsl_ccm32k.o
APP_OBJS+=$(MCUXPRESSO)/drivers/ccm32k/fsl_ccm32k.o
APP_OBJS+=$(MCUXPRESSO_DRIVERS)/drivers/fsl_romapi.o
endif