diff --git a/IDE/Keil/Objects/wolfBoot.sct b/IDE/Keil/Objects/wolfBoot.sct
new file mode 100644
index 00000000..26aa9913
--- /dev/null
+++ b/IDE/Keil/Objects/wolfBoot.sct
@@ -0,0 +1,16 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x00000000 0x00040000 { ; load region size_region
+ ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
+ .ANY (+XO)
+ }
+ RW_IRAM1 0x20000000 0x00020000 { ; RW data
+ .ANY (+RW +ZI)
+ }
+}
+
diff --git a/IDE/Keil/RTE/Device/ARMCM4/startup_ARMCM4.s b/IDE/Keil/RTE/Device/ARMCM4/startup_ARMCM4.s
new file mode 100644
index 00000000..f981fada
--- /dev/null
+++ b/IDE/Keil/RTE/Device/ARMCM4/startup_ARMCM4.s
@@ -0,0 +1,172 @@
+;/**************************************************************************//**
+; * @file startup_ARMCM4.s
+; * @brief CMSIS Core Device Startup File for
+; * ARMCM4 Device
+; * @version V1.0.1
+; * @date 23. July 2019
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+
+
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x00000400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+__stack_limit
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x00000C00
+
+ IF Heap_Size != 0 ; Heap is provided
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+ ENDIF
+
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ; Top of Stack
+ DCD Reset_Handler ; Reset Handler
+ DCD NMI_Handler ; -14 NMI Handler
+ DCD HardFault_Handler ; -13 Hard Fault Handler
+ DCD MemManage_Handler ; -12 MPU Fault Handler
+ DCD BusFault_Handler ; -11 Bus Fault Handler
+ DCD UsageFault_Handler ; -10 Usage Fault Handler
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD 0 ; Reserved
+ DCD SVC_Handler ; -5 SVCall Handler
+ DCD DebugMon_Handler ; -4 Debug Monitor Handler
+ DCD 0 ; Reserved
+ DCD PendSV_Handler ; -2 PendSV Handler
+ DCD SysTick_Handler ; -1 SysTick Handler
+
+ ; Interrupts
+ DCD Interrupt0_Handler ; 0 Interrupt 0
+ DCD Interrupt1_Handler ; 1 Interrupt 1
+ DCD Interrupt2_Handler ; 2 Interrupt 2
+ DCD Interrupt3_Handler ; 3 Interrupt 3
+ DCD Interrupt4_Handler ; 4 Interrupt 4
+ DCD Interrupt5_Handler ; 5 Interrupt 5
+ DCD Interrupt6_Handler ; 6 Interrupt 6
+ DCD Interrupt7_Handler ; 7 Interrupt 7
+ DCD Interrupt8_Handler ; 8 Interrupt 8
+ DCD Interrupt9_Handler ; 9 Interrupt 9
+
+ SPACE (214 * 4) ; Interrupts 10 .. 224 are left out
+__Vectors_End
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+
+ AREA |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; The default macro is not used for HardFault_Handler
+; because this results in a poor debug illusion.
+HardFault_Handler PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+
+; Macro to define default exception/interrupt handlers.
+; Default handler are weak symbols with an endless loop.
+; They can be overwritten by real handlers.
+ MACRO
+ Set_Default_Handler $Handler_Name
+$Handler_Name PROC
+ EXPORT $Handler_Name [WEAK]
+ B .
+ ENDP
+ MEND
+
+
+; Default exception/interrupt handler
+
+ Set_Default_Handler NMI_Handler
+ Set_Default_Handler MemManage_Handler
+ Set_Default_Handler BusFault_Handler
+ Set_Default_Handler UsageFault_Handler
+ Set_Default_Handler SVC_Handler
+ Set_Default_Handler DebugMon_Handler
+ Set_Default_Handler PendSV_Handler
+ Set_Default_Handler SysTick_Handler
+
+ Set_Default_Handler Interrupt0_Handler
+ Set_Default_Handler Interrupt1_Handler
+ Set_Default_Handler Interrupt2_Handler
+ Set_Default_Handler Interrupt3_Handler
+ Set_Default_Handler Interrupt4_Handler
+ Set_Default_Handler Interrupt5_Handler
+ Set_Default_Handler Interrupt6_Handler
+ Set_Default_Handler Interrupt7_Handler
+ Set_Default_Handler Interrupt8_Handler
+ Set_Default_Handler Interrupt9_Handler
+
+ ALIGN
+
+
+; User setup Stack & Heap
+
+ IF :LNOT::DEF:__MICROLIB
+ IMPORT __use_two_region_memory
+ ENDIF
+
+ EXPORT __stack_limit
+ EXPORT __initial_sp
+ IF Heap_Size != 0 ; Heap is provided
+ EXPORT __heap_base
+ EXPORT __heap_limit
+ ENDIF
+
+ END
diff --git a/IDE/Keil/RTE/Device/ARMCM4/system_ARMCM4.c b/IDE/Keil/RTE/Device/ARMCM4/system_ARMCM4.c
new file mode 100644
index 00000000..d0c30188
--- /dev/null
+++ b/IDE/Keil/RTE/Device/ARMCM4/system_ARMCM4.c
@@ -0,0 +1,81 @@
+/**************************************************************************//**
+ * @file system_ARMCM4.c
+ * @brief CMSIS Device System Source File for
+ * ARMCM4 Device
+ * @version V1.0.1
+ * @date 15. November 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if defined (ARMCM4)
+ #include "ARMCM4.h"
+#elif defined (ARMCM4_FP)
+ #include "ARMCM4_FP.h"
+#else
+ #error device not specified!
+#endif
+
+/*----------------------------------------------------------------------------
+ Define clocks
+ *----------------------------------------------------------------------------*/
+#define XTAL (50000000UL) /* Oscillator frequency */
+
+#define SYSTEM_CLOCK (XTAL / 2U)
+
+/*----------------------------------------------------------------------------
+ Exception / Interrupt Vector table
+ *----------------------------------------------------------------------------*/
+extern const VECTOR_TABLE_Type __VECTOR_TABLE[240];
+
+
+/*----------------------------------------------------------------------------
+ System Core Clock Variable
+ *----------------------------------------------------------------------------*/
+uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
+
+
+/*----------------------------------------------------------------------------
+ System Core Clock update function
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)
+{
+ SystemCoreClock = SYSTEM_CLOCK;
+}
+
+/*----------------------------------------------------------------------------
+ System initialization function
+ *----------------------------------------------------------------------------*/
+void SystemInit (void)
+{
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+ SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]);
+#endif
+
+#if defined (__FPU_USED) && (__FPU_USED == 1U)
+ SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
+ (3U << 11U*2U) ); /* enable CP11 Full Access */
+#endif
+
+#ifdef UNALIGNED_SUPPORT_DISABLE
+ SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
+#endif
+
+ SystemCoreClock = SYSTEM_CLOCK;
+}
diff --git a/IDE/Keil/RTE/_Target_1/RTE_Components.h b/IDE/Keil/RTE/_Target_1/RTE_Components.h
new file mode 100644
index 00000000..6c14abb6
--- /dev/null
+++ b/IDE/Keil/RTE/_Target_1/RTE_Components.h
@@ -0,0 +1,21 @@
+
+/*
+ * Auto generated Run-Time-Environment Configuration File
+ * *** Do not modify ! ***
+ *
+ * Project: 'wolfBoot'
+ * Target: 'Target 1'
+ */
+
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+
+/*
+ * Define the Device Header File:
+ */
+#define CMSIS_device_header "ARMCM4.h"
+
+
+
+#endif /* RTE_COMPONENTS_H */
diff --git a/IDE/Keil/ecc256_pub_key.c b/IDE/Keil/ecc256_pub_key.c
new file mode 100644
index 00000000..7d27a730
--- /dev/null
+++ b/IDE/Keil/ecc256_pub_key.c
@@ -0,0 +1,20 @@
+/*
+ * This file has been generated and contains the public key which is
+ * used by wolfBoot to verify the updates.
+ */
+#include
+
+#warning "USING PRE-GENERATED EXAMPLE ECC KEY -- BOOTLOADER IS NOT SECURE!"
+
+
+const uint8_t ecc256_pub_key[64] = {
+ 0xFA, 0x77, 0xAE, 0xC6, 0x4A, 0x3E, 0xDF, 0x91,
+0x60, 0x2B, 0x2E, 0x83, 0x12, 0x0C, 0x6C, 0x91,
+0x8C, 0x5D, 0xC2, 0x29, 0x7C, 0xB8, 0x91, 0xEA,
+0x5A, 0x12, 0xE0, 0x8E, 0x36, 0x40, 0x69, 0x8D,
+0xE1, 0xDC, 0xF6, 0x44, 0x7F, 0xD9, 0x16, 0x49,
+0x49, 0x55, 0x1F, 0x46, 0x47, 0xB7, 0x83, 0x34,
+0x04, 0x2F, 0x9B, 0x23, 0x2B, 0x84, 0x67, 0x09,
+0x3F, 0xFC, 0xCE, 0x55, 0x33, 0x64, 0xCB, 0xE8
+};
+const uint32_t ecc256_pub_key_len = 64;
diff --git a/IDE/Keil/wolfBoot.uvoptx b/IDE/Keil/wolfBoot.uvoptx
new file mode 100644
index 00000000..dd0aa0f4
--- /dev/null
+++ b/IDE/Keil/wolfBoot.uvoptx
@@ -0,0 +1,508 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ Target 1
+ 0x4
+ ARM-ADS
+
+ 12000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+ .\Listings\
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
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+
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+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+ BIN\UL2CM3.DLL
+
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)
+
+
+
+
+ 0
+
+
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
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+ 0
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+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+ Source Group 1
+ 0
+ 0
+ 0
+ 0
+
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+ ..\..\src\boot_arm.c
+ boot_arm.c
+ 0
+ 0
+
+
+ 1
+ 2
+ 1
+ 0
+ 0
+ 0
+ ..\..\src\image.c
+ image.c
+ 0
+ 0
+
+
+ 1
+ 3
+ 1
+ 0
+ 0
+ 0
+ ..\..\src\libwolfboot.c
+ libwolfboot.c
+ 0
+ 0
+
+
+ 1
+ 4
+ 1
+ 0
+ 0
+ 0
+ ..\..\src\loader.c
+ loader.c
+ 0
+ 0
+
+
+ 1
+ 5
+ 1
+ 0
+ 0
+ 0
+ ..\..\src\string.c
+ string.c
+ 0
+ 0
+
+
+ 1
+ 6
+ 1
+ 0
+ 0
+ 0
+ ..\..\src\update_flash.c
+ update_flash.c
+ 0
+ 0
+
+
+ 1
+ 7
+ 1
+ 0
+ 0
+ 0
+ ..\..\src\xmalloc_ecc.c
+ xmalloc_ecc.c
+ 0
+ 0
+
+
+ 1
+ 8
+ 5
+ 0
+ 0
+ 0
+ ..\..\include\hal.h
+ hal.h
+ 0
+ 0
+
+
+ 1
+ 9
+ 5
+ 0
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+ 0
+ ..\..\include\image.h
+ image.h
+ 0
+ 0
+
+
+ 1
+ 10
+ 5
+ 0
+ 0
+ 0
+ ..\..\include\loader.h
+ loader.h
+ 0
+ 0
+
+
+ 1
+ 11
+ 5
+ 0
+ 0
+ 0
+ ..\..\include\printf.h
+ printf.h
+ 0
+ 0
+
+
+ 1
+ 12
+ 5
+ 0
+ 0
+ 0
+ ..\..\include\spi_drv.h
+ spi_drv.h
+ 0
+ 0
+
+
+ 1
+ 13
+ 5
+ 0
+ 0
+ 0
+ ..\..\include\spi_flash.h
+ spi_flash.h
+ 0
+ 0
+
+
+ 1
+ 14
+ 5
+ 0
+ 0
+ 0
+ ..\..\include\target.h
+ target.h
+ 0
+ 0
+
+
+ 1
+ 15
+ 5
+ 0
+ 0
+ 0
+ ..\..\include\uart_flash.h
+ uart_flash.h
+ 0
+ 0
+
+
+ 1
+ 16
+ 5
+ 0
+ 0
+ 0
+ ..\..\include\user_settings.h
+ user_settings.h
+ 0
+ 0
+
+
+ 1
+ 17
+ 5
+ 0
+ 0
+ 0
+ ..\..\include\wolfboot\wolfboot.h
+ wolfboot.h
+ 0
+ 0
+
+
+ 1
+ 18
+ 1
+ 0
+ 0
+ 0
+ ..\..\hal\stm32f4.c
+ stm32f4.c
+ 0
+ 0
+
+
+ 1
+ 19
+ 1
+ 0
+ 0
+ 0
+ ..\..\lib\wolfssl\wolfcrypt\src\sp_cortexm.c
+ sp_cortexm.c
+ 0
+ 0
+
+
+ 1
+ 20
+ 1
+ 0
+ 0
+ 0
+ ..\..\lib\wolfssl\wolfcrypt\src\sp_int.c
+ sp_int.c
+ 0
+ 0
+
+
+ 1
+ 21
+ 1
+ 0
+ 0
+ 0
+ ..\..\lib\wolfssl\wolfcrypt\src\sha256.c
+ sha256.c
+ 0
+ 0
+
+
+ 1
+ 22
+ 1
+ 0
+ 0
+ 0
+ ..\..\lib\wolfssl\wolfcrypt\src\hash.c
+ hash.c
+ 0
+ 0
+
+
+ 1
+ 23
+ 1
+ 0
+ 0
+ 0
+ ..\..\lib\wolfssl\wolfcrypt\src\memory.c
+ memory.c
+ 0
+ 0
+
+
+ 1
+ 24
+ 1
+ 0
+ 0
+ 0
+ ..\..\lib\wolfssl\wolfcrypt\src\wc_port.c
+ wc_port.c
+ 0
+ 0
+
+
+ 1
+ 25
+ 1
+ 0
+ 0
+ 0
+ ..\..\lib\wolfssl\wolfcrypt\src\ecc.c
+ ecc.c
+ 0
+ 0
+
+
+ 1
+ 26
+ 1
+ 0
+ 0
+ 0
+ .\ecc256_pub_key.c
+ ecc256_pub_key.c
+ 0
+ 0
+
+
+
+
+ ::CMSIS
+ 0
+ 0
+ 0
+ 1
+
+
+
+ ::Device
+ 1
+ 0
+ 0
+ 1
+
+
+
diff --git a/IDE/Keil/wolfBoot.uvprojx b/IDE/Keil/wolfBoot.uvprojx
new file mode 100644
index 00000000..403bd60e
--- /dev/null
+++ b/IDE/Keil/wolfBoot.uvprojx
@@ -0,0 +1,579 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ Target 1
+ 0x4
+ ARM-ADS
+ 6140000::V6.14::ARMCLANG
+ 1
+
+
+ ARMCM4
+ ARM
+ ARM.CMSIS.5.7.0
+ http://www.keil.com/pack/
+ IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE
+
+
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)
+ 0
+ $$Device:ARMCM4$Device\ARM\ARMCM4\Include\ARMCM4.h
+
+
+
+
+
+
+
+
+
+
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ .\Objects\
+ wolfBoot
+ 1
+ 0
+ 1
+ 1
+ 1
+ .\Listings\
+ 1
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+ 0
+
+ 0
+ 0
+
+
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+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 1
+
+
+ SARMCM3.DLL
+ -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 1
+ 0
+ 0
+ 1
+ 1
+ 4096
+
+ 1
+ BIN\UL2CM3.DLL
+ "" ()
+
+
+
+
+ 0
+
+
+
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+
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+
+ 1
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+ 0
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+ 0
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+ 0
+ 0
+ 0
+ 3
+ 3
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ __WOLFBOOT WOLFBOOT_SIGN_ECC256 XMALLOC_USER IMAGE_HEADER_SIZE=256 WOLFBOOT_HASH_SHA256 WOLFSSL_USER_SETTINGS WOLFSSL_SP_ASM WOLFSSL_SP_ARM_CORTEX_M_ASM
+
+ ..\..\include;..\..\hal;..\..\lib\wolfssl\
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
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+ 0
+ 1
+
+
+
+
+
+
+
+
+ 1
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+ 0x00000000
+ 0x20000000
+
+ .\wolfBoot.sct
+
+
+
+
+
+
+
+
+
+
+ Source Group 1
+
+
+ boot_arm.c
+ 1
+ ..\..\src\boot_arm.c
+
+
+ image.c
+ 1
+ ..\..\src\image.c
+
+
+ libwolfboot.c
+ 1
+ ..\..\src\libwolfboot.c
+
+
+ loader.c
+ 1
+ ..\..\src\loader.c
+
+
+ string.c
+ 1
+ ..\..\src\string.c
+
+
+ update_flash.c
+ 1
+ ..\..\src\update_flash.c
+
+
+ xmalloc_ecc.c
+ 1
+ ..\..\src\xmalloc_ecc.c
+
+
+ hal.h
+ 5
+ ..\..\include\hal.h
+
+
+ image.h
+ 5
+ ..\..\include\image.h
+
+
+ loader.h
+ 5
+ ..\..\include\loader.h
+
+
+ printf.h
+ 5
+ ..\..\include\printf.h
+
+
+ spi_drv.h
+ 5
+ ..\..\include\spi_drv.h
+
+
+ spi_flash.h
+ 5
+ ..\..\include\spi_flash.h
+
+
+ target.h
+ 5
+ ..\..\include\target.h
+
+
+ uart_flash.h
+ 5
+ ..\..\include\uart_flash.h
+
+
+ user_settings.h
+ 5
+ ..\..\include\user_settings.h
+
+
+ wolfboot.h
+ 5
+ ..\..\include\wolfboot\wolfboot.h
+
+
+ stm32f4.c
+ 1
+ ..\..\hal\stm32f4.c
+
+
+ sp_cortexm.c
+ 1
+ ..\..\lib\wolfssl\wolfcrypt\src\sp_cortexm.c
+
+
+ sp_int.c
+ 1
+ ..\..\lib\wolfssl\wolfcrypt\src\sp_int.c
+
+
+ sha256.c
+ 1
+ ..\..\lib\wolfssl\wolfcrypt\src\sha256.c
+
+
+ hash.c
+ 1
+ ..\..\lib\wolfssl\wolfcrypt\src\hash.c
+
+
+ memory.c
+ 1
+ ..\..\lib\wolfssl\wolfcrypt\src\memory.c
+
+
+ wc_port.c
+ 1
+ ..\..\lib\wolfssl\wolfcrypt\src\wc_port.c
+
+
+ ecc.c
+ 1
+ ..\..\lib\wolfssl\wolfcrypt\src\ecc.c
+
+
+ ecc256_pub_key.c
+ 1
+ .\ecc256_pub_key.c
+
+
+
+
+ ::CMSIS
+
+
+ ::Device
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ RTE\Device\ARMCM4\startup_ARMCM4.s
+
+
+
+
+
+
+
+ RTE\Device\ARMCM4\system_ARMCM4.c
+
+
+
+
+
+
+
+
+
+
+
+
+ <Project Info>
+
+
+
+
+
+ 0
+ 1
+
+
+
+
+
diff --git a/include/image.h b/include/image.h
index ad991d20..02216617 100644
--- a/include/image.h
+++ b/include/image.h
@@ -29,6 +29,10 @@
#include "target.h"
#include "wolfboot/wolfboot.h"
+#ifdef __ARMCC_VERSION
+#define asm __asm
+#endif
+
#ifndef RAMFUNCTION
#if defined(__WOLFBOOT) && defined(RAM_CODE)
diff --git a/src/boot_arm.c b/src/boot_arm.c
index 8bd234ba..f4c0ab5f 100644
--- a/src/boot_arm.c
+++ b/src/boot_arm.c
@@ -34,7 +34,12 @@ extern unsigned int _end_bss;
extern uint32_t *END_STACK;
+#ifndef __ARMCC_VERSION
extern void main(void);
+#else
+extern int main(void);
+#endif
+
#ifndef WOLFBOOT_NO_MPU
#define MPU_BASE (0xE000ED90)
@@ -162,6 +167,8 @@ static void mpu_off(void)
void isr_reset(void) {
+#ifndef __ARMCC_VERSION
+
register unsigned int *src, *dst;
#if defined(PLATFORM_kinetis)
/* Immediately disable Watchdog after boot */
@@ -190,6 +197,7 @@ void isr_reset(void) {
mpu_init();
/* Run the program! */
main();
+#endif
}
void isr_fault(void)
{
@@ -217,6 +225,10 @@ void isr_empty(void)
static void *app_entry;
static uint32_t app_end_stack;
+#ifdef __ARMCC_VERSION
+#define asm __asm
+#endif
+
void RAMFUNCTION do_boot(const uint32_t *app_offset)
{
@@ -248,6 +260,8 @@ typedef void(*NMIHANDLER)(void);
# define isr_NMI isr_empty
#endif
+
+#ifndef __ARMCC_VERSION
__attribute__ ((section(".isr_vector")))
void (* const IV[])(void) =
{
@@ -311,6 +325,8 @@ void (* const IV[])(void) =
isr_empty,
};
+#endif
+
#ifdef RAM_CODE
#define AIRCR *(volatile uint32_t *)(0xE000ED0C)
diff --git a/src/loader.c b/src/loader.c
index f8160616..12adf9c7 100644
--- a/src/loader.c
+++ b/src/loader.c
@@ -166,8 +166,11 @@ static int wolfBoot_update(int fallback_allowed)
}
#endif
-
+#ifdef __ARMCC_VERSION
int main(void)
+#else
+void main(void)
+#endif
{
hal_init();
spi_flash_probe();
@@ -181,5 +184,4 @@ int main(void)
wolfBoot_start();
while(1)
;
- return 0;
}