mirror of https://github.com/wolfSSL/wolfBoot.git
pic32cz: add wolfHSM client target
Run wolfBoot on the PIC32CZ CA9x host core (Cortex-M7) as a wolfHSM client, offloading the image digest (SHA-256) and the ECDSA P-256 signature check to the wolfHSM server.pull/837/head
parent
15c7e621ed
commit
36b665bfcc
4
Makefile
4
Makefile
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@ -289,6 +289,10 @@ ifeq ($(TARGET),stm32n6)
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endif
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endif # TZEN=1
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ifeq ($(TARGET),pic32cz)
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MAIN_TARGET:=wolfboot.bin test-app/image_v1_signed.bin
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endif
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ifeq ($(TARGET),x86_64_efi)
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MAIN_TARGET:=wolfboot.efi
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endif
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40
arch.mk
40
arch.mk
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@ -243,6 +243,46 @@ ifeq ($(ARCH),ARM)
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ARCH_FLASH_OFFSET=0x08000000
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CORTEX_M7=1
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OBJS+=hal/pic32c.o
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ifeq ($(WOLFHSM_CLIENT),1)
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ifeq ($(WOLFHSM_MICROCHIP_PIC32CZ),)
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$(error WOLFHSM_MICROCHIP_PIC32CZ is not set: point it at the wolfHSM \
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PIC32CZ client port directory (the one containing port/))
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endif
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CFLAGS+=-I$(WOLFHSM_MICROCHIP_PIC32CZ) \
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-DWOLFHSM_CFG_NO_SYS_TIME \
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-DWOLFHSM_CFG_TRANSPORT_MEM \
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-DWOLFHSM_CFG_CLIENT_ID=WOLFBOOT_WOLFHSM_CLIENT_ID \
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-DPIC32CZ_CFG_SHARED_MEM_PHYS_BASE=0x20100000U \
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-DPIC32CZ_CFG_SHARED_MEM_REQ_SIZE=4096 \
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-DPIC32CZ_CFG_SHARED_MEM_RESP_SIZE=4096 \
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'-DPIC32CZ_CFG_SHARED_MEM_TOTAL_SIZE=(PIC32CZ_CFG_SHARED_MEM_REQ_SIZE+PIC32CZ_CFG_SHARED_MEM_RESP_SIZE)'
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OBJS+=$(WOLFHSM_MICROCHIP_PIC32CZ)/port/mailbox.o \
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$(WOLFHSM_MICROCHIP_PIC32CZ)/port/client/czhsm_client.o \
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$(WOLFHSM_MICROCHIP_PIC32CZ)/port/client/fwmetadata.o \
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$(WOLFBOOT_LIB_WOLFHSM)/src/wh_transport_mem.o
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# HSM server firmware. Optional: set HSM_FW_BIN to have wolfBoot load/boot
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# the HSM core from it at boot; leave it unset when the firmware is already
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# resident and wolfBoot must not touch it.
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ifneq ($(HSM_FW_BIN),)
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ifeq ($(wildcard $(HSM_FW_BIN)),)
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$(error HSM_FW_BIN=$(HSM_FW_BIN) not found: build the wolfHSM server \
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firmware before wolfBoot)
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endif
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HSM_FW_ADDR?=0x0c1c0000
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HSM_FW_SIZE:=$(shell stat -c %s $(HSM_FW_BIN))
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CFLAGS+=-DHSM_FW_ADDR=$(HSM_FW_ADDR) -DHSM_FW_SIZE=$(HSM_FW_SIZE)
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endif
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# Signing pubkey header. Optional: set HSM_PUBKEY_HEADER to have the HAL
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# push the key into the HSM at boot; leave it unset when pre-provisioned.
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ifneq ($(HSM_PUBKEY_HEADER),)
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CFLAGS+=-DHSM_PUBKEY_HEADER='"$(HSM_PUBKEY_HEADER)"'
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endif
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endif
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endif
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ifeq ($(TARGET),pic32ck)
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@ -0,0 +1,30 @@
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ARCH=ARM
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TARGET=pic32cz
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SIGN?=ECC256
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HASH?=SHA256
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VTOR?=1
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SPMATH?=1
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NO_MPU=1
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DEBUG_UART=1
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WOLFHSM_CLIENT=1
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# Must match the client ID the server provisions keys under.
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WOLFHSM_CLIENT_ID=12
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WOLFHSM_NVM_IMAGE=0
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# MUST equal the czhsm-server build's WOLFHSM_CFG_COMM_DATA_LEN
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WOLFHSM_CFG_COMM_DATA_LEN=1280
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BOOTLOADER_PARTITION_SIZE=0x10000
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HSM_FW_ADDR=0x0c1c0000
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WOLFBOOT_SECTOR_SIZE=0x1000
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WOLFBOOT_PARTITION_SIZE=0x100000
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WOLFBOOT_PARTITION_BOOT_ADDRESS=0x0c000000
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WOLFBOOT_PARTITION_UPDATE_ADDRESS=0x0c200000
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WOLFBOOT_PARTITION_SWAP_ADDRESS=0x0c1ff000
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DUALBANK_SWAP=1
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@ -5193,6 +5193,21 @@ The test behavior depends on whether the `DUALBANK_SWAP` feature is enabled:
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- **If `DUALBANK_SWAP=1`:** The higher version of the application will be automatically selected, and LED1 will turn on.
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- **If `DUALBANK_SWAP=0`:** The application version 1 will boot first. The application will trigger the update and light LED0. On the next reset, wolfBoot will update the application, boot application version 2, and turn on LED1.
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### PIC32CZ with wolfHSM
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On Microchip PIC32CZ CA9x devices, wolfBoot can run on the Cortex-M7 host core as
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a [wolfHSM](https://www.wolfssl.com/products/wolfhsm/) client, offloading the
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image digest and signature verification to the wolfHSM server running on the
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Cortex-M0+ HSM core.
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Currently, wolfBoot as wolfHSM for PIC32CZ is distributed as part of the wolfHSM
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PIC32CZ platform release bundle, not as a standalone package. This bundle is
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under NDA and is not publicly available.
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For access to the PIC32CZ platform release or for more information on using
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wolfBoot and wolfHSM on PIC32CZ devices, contact
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[facts@wolfssl.com](mailto:facts@wolfssl.com).
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## Microchip SAME51
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@ -21,6 +21,7 @@ wolfBoot supports using wolfHSM on the following platforms:
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- wolfBoot simulator (using wolfHSM POSIX TCP transport)
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- AURIX TC3xx (shared memory transport)
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- Microchip PIC32CZ CA9x (shared memory transport)
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- STM32H5 TrustZone (the secure-side wolfBoot hosts a wolfHSM server and exposes it to the non-secure application through a single NSC veneer; see [STM32H5 TrustZone Engine](#stm32h5-trustzone-engine) below)
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Details on configuring wolfBoot to use wolfHSM on each of these platforms can be found in the wolfBoot (and wolfHSM) documentation specific to that target, with the exception of the simulator, which is documented here. The remainder of this document focuses on the generic wolfHSM-related configuration options.
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139
hal/pic32cz.c
139
hal/pic32cz.c
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@ -25,6 +25,41 @@
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#include <hal/pic32c.h>
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#ifdef DEBUG_UART
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#include "uart_drv.h"
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#endif
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#if defined(WOLFBOOT_ENABLE_WOLFHSM_CLIENT)
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/* wolfHSM */
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#include "wolfhsm/wh_error.h"
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#include "wolfhsm/wh_client.h"
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#include "wolfhsm/wh_client_crypto.h"
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#include "wolfhsm/wh_transport_mem.h"
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/* PIC32CZ wolfHSM port (shared with the czhsm-client reference application) */
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#include "port/client/czhsm_client.h"
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#include "port/client/fwmetadata.h"
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/* PIC32CZ_CFG_* (shared-memory window) comes from arch.mk, not a header: unlike
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* the czhsm-client application, wolfBoot does not define WOLFHSM_CFG, so the
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* port sources skip "pic32cz_cfg.h" and take the configuration on the command
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* line instead. */
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/* FCW_BASE */
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#include "hal/pic32cz_registers.h"
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#include <wolfssl/wolfcrypt/ecc.h>
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#include <wolfssl/wolfcrypt/asn.h>
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#ifndef WOLFBOOT_WOLFHSM_CLIENT_ID
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#error "WOLFBOOT_WOLFHSM_CLIENT_ID is not defined. Set WOLFHSM_CLIENT_ID in your .config."
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#endif
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#define FCW_MUTEX (*(volatile uint32_t*)(FCW_BASE + 0x08U))
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#define FCW_MUTEX_RELEASE (0x2)
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#endif /* WOLFBOOT_ENABLE_WOLFHSM_CLIENT */
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#define SUPC_BASE (0x44020000U)
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#define SUPC_VREGCTRL (*(volatile uint32_t *)(SUPC_BASE + 0x1CU))
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#define SUPC_STATUS (*(volatile uint32_t *)(SUPC_BASE + 0x0CU))
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@ -88,6 +123,12 @@ void hal_init(void)
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pic32_clock_pll0_init(12, 225, 1, 3);
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pic32_clock_gclk_gen0(2, 1);
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pic32_delay_cnt(700);
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#ifdef DEBUG_UART
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/* Must follow the PLL setup above: the SERCOM baud divisor assumes
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* GCLK1 = PLL0/2 = 150 MHz. */
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uart_init(115200, 8, 'N', 1);
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uart_write("wolfBoot PIC32CZ\r\n", 18);
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#endif
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#if defined(TEST_FLASH)
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pic32_flash_test();
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while (1) {}
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@ -106,3 +147,101 @@ void hal_prepare_boot(void)
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pic32_clock_reset();
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#endif
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}
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#if defined(WOLFBOOT_ENABLE_WOLFHSM_CLIENT)
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/* wolfBoot's signing public key, DER encoded, as a 'hsm_pubkey_der[]' C array.
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*/
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#ifdef HSM_PUBKEY_HEADER
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#include HSM_PUBKEY_HEADER
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#endif
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whClientContext hsmClientCtx = {0};
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const int hsmDevIdHash = WH_DEV_ID;
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const int hsmDevIdPubKey = WH_DEV_ID;
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/* Key slot the verification key lives at on the server; image.c references it by
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* this id (wh_Client_EccSetKeyId(hsmKeyIdPubKey)). wolfBoot either pushes the key
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* here at boot (HSM_PUBKEY_HEADER) or relies on it being pre-provisioned. */
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const int hsmKeyIdPubKey = 0xFF;
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/*
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* Boot the HSM core and connect to the wolfHSM server running on it.
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*/
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int hal_hsm_init_connect(void)
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{
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int rc;
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whClientConfig cfg;
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memset((void*)PIC32CZ_CFG_SHARED_MEM_PHYS_BASE, 0,
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PIC32CZ_CFG_SHARED_MEM_TOTAL_SIZE);
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FCW_MUTEX = FCW_MUTEX_RELEASE;
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#if defined(HSM_FW_ADDR) && defined(HSM_FW_SIZE)
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/* Load/boot the HSM core from the firmware image; blocks until it has booted
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* and acknowledged. Skipped when HSM_FW_BIN is unset: the firmware is then
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* assumed already resident and wolfBoot connects to the running server. */
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rc = czhsm_load_hsm_firmware(HSM_FW_ADDR, HSM_FW_SIZE);
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if (rc != 0) {
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return rc;
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}
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#endif
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rc = czhsm_setup(&cfg);
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if (rc != 0) {
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return rc;
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}
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rc = wh_Client_Init(&hsmClientCtx, &cfg);
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if (rc != WH_ERROR_OK) {
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return rc;
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}
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rc = wh_Client_CommInit(&hsmClientCtx, NULL, NULL);
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if (rc != WH_ERROR_OK) {
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return rc;
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}
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#ifdef HSM_PUBKEY_HEADER
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{
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ecc_key pubkey;
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whKeyId keyId = (whKeyId)hsmKeyIdPubKey;
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word32 idx = 0;
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rc = wc_ecc_init_ex(&pubkey, NULL, INVALID_DEVID);
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if (rc != 0) {
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return rc;
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}
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rc = wc_EccPublicKeyDecode(hsm_pubkey_der, &idx, &pubkey,
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(word32)sizeof(hsm_pubkey_der));
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if (rc == 0) {
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rc = wh_Client_EccImportKey(&hsmClientCtx, &pubkey, &keyId,
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WH_NVM_FLAGS_USAGE_VERIFY, 0, NULL);
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}
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wc_ecc_free(&pubkey);
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}
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#endif /* HSM_PUBKEY_HEADER */
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return rc;
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}
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/*
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* Close the wolfHSM session before handing control to the application.
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*/
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int hal_hsm_disconnect(void)
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{
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int rc;
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rc = wh_Client_CommClose(&hsmClientCtx);
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if (rc != WH_ERROR_OK) {
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return rc;
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}
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return wh_Client_Cleanup(&hsmClientCtx);
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}
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#endif /* WOLFBOOT_ENABLE_WOLFHSM_CLIENT */
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@ -0,0 +1,168 @@
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/* uart_drv_pic32cz.c
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*
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* Driver for the PIC32CZ SERCOM UART, used for wolfBoot debug output.
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*
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* Uses SERCOM1 on the host (Cortex-M7) core: TX on PC4 (EXT1 pin 14),
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* RX on PC7. 115200 8N1, transmit only.
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*
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* Derived from the reference driver in the wolfHSM PIC32CZ port
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* (czhsm-client/uart.c), which is in turn based on the plib driver generated
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* by MPLAB.
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*
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* Copyright (C) 2026 wolfSSL Inc.
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*
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* This file is part of wolfBoot.
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*
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* wolfBoot is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* wolfBoot is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
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*/
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#ifdef TARGET_pic32cz
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#include <stdint.h>
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#include <stddef.h>
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#define GCLK_BASE (0x44050000U)
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#define SERCOM_BASE (0x46000000U)
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#define PORT_BASE (0x44840000U)
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/* SERCOM1 */
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#define SERCOM_OFF (0x2000U)
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#define SERCOM1 (SERCOM_BASE + SERCOM_OFF)
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#define SERCOM_PCHCTRL (22) /* GCLK peripheral channel for SERCOM1 */
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#define SERCOM_CTRLA (*(volatile uint32_t*)(SERCOM1 + 0x00U))
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#define SERCOM_CTRLB (*(volatile uint32_t*)(SERCOM1 + 0x04U))
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#define SERCOM_BAUD (*(volatile uint16_t*)(SERCOM1 + 0x0CU))
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#define SERCOM_INTFLAG (*(volatile uint8_t*)(SERCOM1 + 0x18U))
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#define SERCOM_SYNCBUSY (*(volatile uint32_t*)(SERCOM1 + 0x1CU))
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#define SERCOM_DATA (*(volatile uint32_t*)(SERCOM1 + 0x28U))
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#define CTRLA_MODE_USART_INT (0x1U << 2) /* USART with internal clock */
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#define CTRLA_ENABLE (0x1U << 1)
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#define CTRLA_IBON (0x1U << 8)
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#define CTRLA_DORD (0x1U << 30) /* LSB first */
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#define CTRLB_CHSIZE_8BIT (0x0U << 0)
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#define CTRLB_SBMODE_1BIT (0x0U << 6)
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#define CTRLB_TXEN (0x1U << 16)
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#define INTFLAG_DRE (0x1U << 0) /* Data Register Empty */
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/* GCLK: generator 1 sources SERCOM1 */
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#define GCLK_GENCTRL1 (*(volatile uint32_t*)(GCLK_BASE + 0x20U + (1 * 4)))
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#define GCLK_SYNCBUSY (*(volatile uint32_t*)(GCLK_BASE + 0x04U))
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#define GCLK_PCHCTRL(n) (*(volatile uint32_t*)(GCLK_BASE + 0x80U + ((n) * 4)))
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#define GCLK_GENCTRL_SRC_PLL0 (6U << 0)
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#define GCLK_GENCTRL_DIV(x) (((uint32_t)(x) & 0xFFFFU) << 16)
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#define GCLK_GENCTRL_GENEN (0x1U << 8)
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#define GCLK_SYNCBUSY_GENCTRL1 (0x1U << 3)
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#define GCLK_PCHCTRL_GEN1 (0x1U << 0)
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#define GCLK_PCHCTRL_CHEN (0x1U << 6)
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/* PORT group 2 == port C */
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#define PORT_GROUP_SIZE (0x80U)
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#define PORTC (PORT_BASE + (2 * PORT_GROUP_SIZE))
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#define PORTC_PMUX(n) (*(volatile uint8_t*)(PORTC + 0x30U + (n)))
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#define PORTC_PINCFG(n) (*(volatile uint8_t*)(PORTC + 0x40U + (n)))
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#define PINCFG_PMUXEN (0x1U)
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/* Baud register value for 115200 with GCLK1 = PLL0/2 (150 MHz), 16x sampling.
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*
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* hal_init() programs PLL0 to 300 MHz before uart_init() runs, and GCLK
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* generator 1 below divides it by 2, so the source clock is fixed regardless of
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* what the caller passes. wolfBoot only ever asks for 115200, so rather than
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* divide at runtime we use the same constant the reference driver does. */
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#define BAUD_115200 (64730U)
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static void pins_setup(void)
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{
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/* PC4 = SERCOM1 TX, PC7 = SERCOM1 RX; both on peripheral function D. */
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PORTC_PINCFG(4) = PINCFG_PMUXEN;
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PORTC_PINCFG(7) = PINCFG_PMUXEN;
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PORTC_PMUX(2) = 0x3U; /* PC4 -> even nibble */
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PORTC_PMUX(3) = 0x30U; /* PC7 -> odd nibble */
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}
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static void clock_setup(void)
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{
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GCLK_GENCTRL1 =
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GCLK_GENCTRL_DIV(2U) | GCLK_GENCTRL_SRC_PLL0 | GCLK_GENCTRL_GENEN;
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while ((GCLK_SYNCBUSY & GCLK_SYNCBUSY_GENCTRL1) != 0U) {
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/* wait for generator 1 to synchronise */
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}
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GCLK_PCHCTRL(SERCOM_PCHCTRL) = GCLK_PCHCTRL_GEN1 | GCLK_PCHCTRL_CHEN;
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while ((GCLK_PCHCTRL(SERCOM_PCHCTRL) & GCLK_PCHCTRL_CHEN) == 0U) {
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/* wait for the peripheral channel to be enabled */
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}
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}
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int uart_init(uint32_t bitrate, uint8_t data, char parity, uint8_t stop)
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{
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/* Fixed 115200 8N1: see BAUD_115200. */
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(void)bitrate;
|
||||
(void)data;
|
||||
(void)parity;
|
||||
(void)stop;
|
||||
|
||||
pins_setup();
|
||||
clock_setup();
|
||||
|
||||
SERCOM_CTRLA = CTRLA_MODE_USART_INT | CTRLA_DORD | CTRLA_IBON;
|
||||
SERCOM_BAUD = (uint16_t)BAUD_115200;
|
||||
|
||||
/* Transmit only: nothing on this port ever reads from the console. */
|
||||
SERCOM_CTRLB = CTRLB_CHSIZE_8BIT | CTRLB_SBMODE_1BIT | CTRLB_TXEN;
|
||||
while (SERCOM_SYNCBUSY != 0U) {
|
||||
/* wait */
|
||||
}
|
||||
|
||||
SERCOM_CTRLA |= CTRLA_ENABLE;
|
||||
while (SERCOM_SYNCBUSY != 0U) {
|
||||
/* wait */
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int uart_tx(const uint8_t c)
|
||||
{
|
||||
while ((SERCOM_INTFLAG & INTFLAG_DRE) == 0U) {
|
||||
/* wait for the data register to drain */
|
||||
}
|
||||
SERCOM_DATA = c;
|
||||
return 1;
|
||||
}
|
||||
|
||||
int uart_rx(uint8_t* c)
|
||||
{
|
||||
/* RX is not enabled on this port: CTRLB sets TXEN only. */
|
||||
(void)c;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef DEBUG_UART
|
||||
void uart_write(const char* buf, unsigned int len)
|
||||
{
|
||||
while (len--) {
|
||||
uart_tx((uint8_t)*buf);
|
||||
buf++;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* TARGET_pic32cz */
|
||||
|
|
@ -1083,6 +1083,9 @@ endif
|
|||
|
||||
ifeq ($(TARGET), pic32cz)
|
||||
APP_OBJS+=../hal/pic32c.o
|
||||
ifeq ($(DEBUG_UART),1)
|
||||
APP_OBJS+=../hal/uart/uart_drv_pic32cz.o
|
||||
endif
|
||||
endif
|
||||
|
||||
CFLAGS+=-I"$(WOLFBOOT_LIB_WOLFSSL)"
|
||||
|
|
|
|||
|
|
@ -0,0 +1,60 @@
|
|||
#!/bin/sh
|
||||
#
|
||||
# der2c.sh <file.der> <symbol> - emit a DER blob as a C array on stdout.
|
||||
#
|
||||
# Used to embed wolfBoot's exported signing public key into a HAL that must
|
||||
# hand it to an HSM at boot
|
||||
#
|
||||
# Copyright (C) 2026 wolfSSL Inc.
|
||||
#
|
||||
# This file is part of wolfBoot.
|
||||
#
|
||||
# wolfBoot is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 3 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# wolfBoot is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
|
||||
|
||||
set -eu
|
||||
|
||||
if [ $# -ne 2 ]; then
|
||||
echo "usage: $0 <file.der> <symbol>" >&2
|
||||
exit 1
|
||||
fi
|
||||
|
||||
DER="$1"
|
||||
SYM="$2"
|
||||
|
||||
if [ ! -r "$DER" ]; then
|
||||
echo "$0: cannot read $DER" >&2
|
||||
exit 1
|
||||
fi
|
||||
|
||||
echo "/* Generated from $(basename "$DER") by tools/scripts/der2c.sh. Do not edit. */"
|
||||
echo "#ifndef WOLFBOOT_GEN_$(echo "$SYM" | tr '[:lower:]' '[:upper:]')_H"
|
||||
echo "#define WOLFBOOT_GEN_$(echo "$SYM" | tr '[:lower:]' '[:upper:]')_H"
|
||||
echo ""
|
||||
echo "#include <stdint.h>"
|
||||
echo ""
|
||||
echo "static const uint8_t ${SYM}[] = {"
|
||||
od -An -v -tx1 "$DER" | awk '
|
||||
{
|
||||
for (i = 1; i <= NF; i++) {
|
||||
if (n % 12 == 0) printf " "
|
||||
printf " 0x%s,", $i
|
||||
n++
|
||||
if (n % 12 == 0) printf "\n"
|
||||
}
|
||||
}
|
||||
END { if (n % 12 != 0) printf "\n" }'
|
||||
echo "};"
|
||||
echo ""
|
||||
echo "#endif"
|
||||
Loading…
Reference in New Issue