mirror of https://github.com/wolfSSL/wolfBoot.git
Fixed erase page size and PG bit
parent
f9f10cb099
commit
3bd71fa96e
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@ -76,13 +76,13 @@
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/*** FLASH ***/
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#define FLASH_BASE (0x58004000)
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#define FLASH_ACR (*(volatile uint32_t *)(FLASH_BASE + 0x00)) //RM0444 - 3.7.1 - FLASH_ACR
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#define FLASH_KEY (*(volatile uint32_t *)(FLASH_BASE + 0x08)) //RM0444 - 3.7.2 - FLASH_KEYR
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#define FLASH_SR (*(volatile uint32_t *)(FLASH_BASE + 0x10)) //RM0444 - 3.7.4 - FLASH_SR
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#define FLASH_CR (*(volatile uint32_t *)(FLASH_BASE + 0x14)) //RM0444 - 3.7.5 - FLASH_CR
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#define FLASH_ACR (*(volatile uint32_t *)(FLASH_BASE + 0x00))
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#define FLASH_KEY (*(volatile uint32_t *)(FLASH_BASE + 0x08))
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#define FLASH_SR (*(volatile uint32_t *)(FLASH_BASE + 0x10))
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#define FLASH_CR (*(volatile uint32_t *)(FLASH_BASE + 0x14))
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#define FLASHMEM_ADDRESS_SPACE (0x08000000)
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#define FLASH_PAGE_SIZE (0x800) /* 2KB */
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#define FLASH_PAGE_SIZE (0x1000) /* 4KB */
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/* Register values */
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#define FLASH_ACR_LATENCY_MASK (0x07)
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@ -195,11 +195,11 @@ int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
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end_address = address + len - 1;
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for (p = address; p < end_address; p += FLASH_PAGE_SIZE) {
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uint32_t reg = FLASH_CR & (~(FLASH_CR_PNB_MASK << FLASH_CR_PNB_SHIFT));
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FLASH_CR = reg | ((p >> 11) << FLASH_CR_PNB_SHIFT) | FLASH_CR_PER;
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FLASH_CR = reg | ((p >> 12) << FLASH_CR_PNB_SHIFT) | FLASH_CR_PER | FLASH_CR_PG;
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DMB();
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FLASH_CR |= FLASH_CR_STRT;
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flash_wait_complete();
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FLASH_CR &= ~FLASH_CR_PER;
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FLASH_CR &= ~(FLASH_CR_PER | FLASH_CR_PG);
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}
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return 0;
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}
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