Various items for STM32WB55

pull/31/head
David Garske 2019-12-19 10:23:12 -08:00 committed by Daniele Lacamera
parent 485253f305
commit 5779baa8a9
6 changed files with 52 additions and 4 deletions

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@ -43,6 +43,11 @@ ifeq ($(ARCH),ARM)
SPI_TARGET=stm32
endif
ifeq ($(TARGET),stm32wb)
ARCH_FLASH_OFFSET=0x08000000
SPI_TARGET=stm32
endif
## Cortex-M CPU
ifeq ($(CORTEX_M0),1)
CFLAGS+=-mcpu=cortex-m0

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@ -0,0 +1,10 @@
TARGET=stm32wb
SIGN=ECC256
WOLFBOOT_SECTOR_SIZE?=0x1000
WOLFBOOT_PARTITION_SIZE?=0x20000
WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x8000
WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x28000
WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x48000
NVM_FLASH_WRITEONCE=1
PKA=0
WOLFTPM=1

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@ -0,0 +1,8 @@
source [find interface/stlink.cfg]
source [find target/stm32wbx.cfg]
$_TARGETNAME configure -event reset-init {
mmw 0xe0042004 0x7 0x0
}
init
reset
halt

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@ -88,6 +88,7 @@ Compile with:
`make TARGET=stm32g0 NVM_FLASH_WRITEONCE=1`
## STM32WB55
Example partitioning on Nucleo-68 board:
@ -115,6 +116,30 @@ Compile with:
`make TARGET=stm32wb NVM_FLASH_WRITEONCE=1`
### Loading the firmware
`openocd --file ./config/openocd/openocd_stm32wbx.cfg`
```
telnet localhost 4444
flash write_image unlock erase wolfboot.bin 0x08000000
flash verify_bank 0 wolfboot.bin
flash write_image unlock erase test-app/image_v1_signed.bin 0x080008000
flash verify_bank 0 test-app/image_v1_signed.bin 0x080008000
reset
```
### Debugging
Use `make DEBUG=1` and reload firmware.
```
arm-none-eabi-gdb wolfboot.elf -ex "set remotetimeout 240" -ex "target extended-remote localhost:3333"
(gdb) add-symbol-file test-app/image.elf 0x8000
(gdb) add-symbol-file wolfboot.elf 0x0
```
## SiFive HiFive1 RISC-V
### Features
@ -367,9 +392,8 @@ telnet localhost 4444
flash write_image unlock erase wolfboot.bin 0x08000000
flash verify_bank 0 wolfboot.bin
flash write_image unlock erase test-app/image_v1_signed.bin 0x08020000
flash verify_bank 0 test-app/image_v1_signed.bin 0x20000
flash verify_bank 0 test-app/image_v1_signed.bin 0x08020000
reset
resume 0x08000000
```
To sign the same application image as new version (2), use the python script `sign.py` provided:

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@ -44,9 +44,10 @@
#define GPIOC_BASE (0x48000800)
#define GPIOD_BASE (0x48000C00)
/* STM32WB55 NUCLEO: CN9: D13=SCK, D12=MISO, D11=MOSI, FLASHCS=D10, TPMCS=D9 */
#define SPI_CS_GPIO GPIOA_BASE
#define SPI_CS_FLASH 4 /* Flash CS connected to GPIOA4 */
#define SPI_CS_TPM 0 /* TPM CS connected to GPIOA0 */
#define SPI_CS_TPM 9 /* TPM CS connected to GPIOA9 */
#define SPI1_PIN_AF 5 /* Alternate function for SPI pins */
#define SPI1_CLOCK_PIN 5 /* SPI_SCK: PA5 */
#define SPI1_MISO_PIN 6 /* SPI_MISO PA6 */

@ -1 +1 @@
Subproject commit 9fd56281482bac15de56269e68162b26f2fab6e7
Subproject commit 2aa8fa2de688b93c5efd21145c6b899b53eb2da9