mirror of https://github.com/wolfSSL/wolfBoot.git
docs: small cleanup.
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@ -107,9 +107,6 @@ These two hash-based PQ signature options are supported:
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- LMS: uses wolfcrypt implementation from `wc_lms.c`, and `wc_lms_impl.c`.
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- LMS: uses wolfcrypt implementation from `wc_lms.c`, and `wc_lms_impl.c`.
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- XMSS: uses wolfcrypt implementation from `wc_xmss.c`, and `wc_xmss_impl.c`.
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- XMSS: uses wolfcrypt implementation from `wc_xmss.c`, and `wc_xmss_impl.c`.
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The wolfcrypt implementations are more performant and are recommended.
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The external integrations are experimental and for testing interoperability.
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### LMS/HSS Config
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### LMS/HSS Config
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A new LMS sim example has been added here:
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A new LMS sim example has been added here:
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@ -1106,13 +1106,13 @@ This should output 3 binary files, `wolfboot.bin`, `image_v1_signed.bin` and `fa
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### Hardware Setup LS1028ARDB
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### Hardware Setup LS1028ARDB
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DIP Switch Configuraiton for XSPI_NOR_BOOT:
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DIP Switch Configuration for XSPI_NOR_BOOT:
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```
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```
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SW2 : 0xF8 = 11111000 SW3 : 0x70 = 01110000 SW5 : 0x20 = 00100000
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SW2 : 0xF8 = 11111000 SW3 : 0x70 = 01110000 SW5 : 0x20 = 00100000
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Where '1' = UP/ON
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Where '1' = UP/ON
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```
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```
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UART Configuraiton:
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UART Configuration:
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```
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```
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Baud Rate: 115200
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Baud Rate: 115200
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Data Bits: 8
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Data Bits: 8
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@ -1155,15 +1155,15 @@ the RCW is `0x0` and the address offset for wolboot is `0x1000`.
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#### Other Tools
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#### Other Tools
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1. Make sure the memory addresses are alinged with the `.config` file.
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1. Make sure the memory addresses are aligned with the `.config` file.
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2. Note the important NOR flash addresses in the defualt config are as follows.
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2. Note the important NOR flash addresses in the default config are as follows.
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3. RCW location is offset `0x0` or `0x20000000` memory mapped.
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3. RCW location is offset `0x0` or `0x20000000` memory mapped.
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4. Wolfboot location is offset `0x1000` or `0x20001000` where wolfboot starts.
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4. Wolfboot location is offset `0x1000` or `0x20001000` where wolfboot starts.
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5. Application location is offset `0x20000` or `0x20020000` where application code goes.
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5. Application location is offset `0x20000` or `0x20020000` where application code goes.
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6. Update location is offset `0x40000` or `0x20040000` where the new or updated applciaiton goes.
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6. Update location is offset `0x40000` or `0x20040000` where the new or updated applciaiton goes.
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7. Load Location is `0x18020100` which is OCRAM or where the applciaiton code is loaded if using RAM loading from
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7. Load Location is `0x18020100` which is OCRAM or where the applciaiton code is loaded if using RAM loading from
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8. DTS Location is
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8. DTS Location is
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9. Update memory locations as neeeded.
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9. Update memory locations as needed.
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## Cortex-A53 / Raspberry PI 3 (experimental)
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## Cortex-A53 / Raspberry PI 3 (experimental)
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@ -1251,7 +1251,7 @@ cp wolfboot_linux_raspi.bin /media/foo/boot/kernel8.img
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* Troubleshooting
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* Troubleshooting
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o Turn on UART for debugging to know what boot-process is going on. Chaning DEBUG_UART property in .config to 1.
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o Turn on UART for debugging to know what boot-process is going on. Changing DEBUG_UART property in .config to 1.
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```
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```
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DEBUG_UART?=1
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DEBUG_UART?=1
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```
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```
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