mirror of https://github.com/wolfSSL/wolfBoot.git
Fix build and test issues with stm32f4 targets
- Add the new CLOCK_SPEED and STM32_PLLx variables to the CMakeLists file - Rename references of 'stm32f4.config' to 'stm32f407-discovery.config' documentation and github workflow files.pull/572/head
parent
248fd985b3
commit
5b36a6dddd
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@ -30,7 +30,7 @@ jobs:
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- name: Select config
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run: |
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cp config/examples/stm32f4.config .config && make include/target.h
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cp config/examples/stm32f407-discovery.config .config && make include/target.h
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- name: Build key tools
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run: |
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@ -30,10 +30,17 @@ jobs:
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- name: Build wolfBoot
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run: make -C build
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- name: Run CMake build for STM32F4
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- name: Run CMake build for STM32F407-DISCOVERY
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run: |
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rm -rf ./build
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cmake -B build -DWOLFBOOT_TARGET=stm32f4 -DWOLFBOOT_PARTITION_SIZE=0x20000 -DWOLFBOOT_SECTOR_SIZE=0x20000 -DWOLFBOOT_PARTITION_BOOT_ADDRESS=0x08020000 -DWOLFBOOT_PARTITION_UPDATE_ADDRESS=0x08040000 -DWOLFBOOT_PARTITION_SWAP_ADDRESS=0x08060000
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cmake -B build -DWOLFBOOT_TARGET=stm32f4 -DWOLFBOOT_PARTITION_SIZE=0x20000 -DWOLFBOOT_SECTOR_SIZE=0x20000 -DWOLFBOOT_PARTITION_BOOT_ADDRESS=0x08020000 -DWOLFBOOT_PARTITION_UPDATE_ADDRESS=0x08040000 -DWOLFBOOT_PARTITION_SWAP_ADDRESS=0x08060000 -DCLOCK_SPEED=160000000 -DSTM32_PLLM=8 -DSTM32_PLLN=336 -DSTM32_PLLP=2 -DSTM32_PLLQ=7
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- name: Build wolfBoot
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run: make -C build
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- name: Run CMake build for STM32F411-BLACKPILL
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run: |
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rm -rf ./build
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cmake -B build -DWOLFBOOT_TARGET=stm32f4 -DWOLFBOOT_PARTITION_SIZE=0x20000 -DWOLFBOOT_SECTOR_SIZE=0x20000 -DWOLFBOOT_PARTITION_BOOT_ADDRESS=0x08020000 -DWOLFBOOT_PARTITION_UPDATE_ADDRESS=0x08040000 -DWOLFBOOT_PARTITION_SWAP_ADDRESS=0x08060000 -DCLOCK_SPEED=84000000 -DSTM32_PLLM=25 -DSTM32_PLLN=336 -DSTM32_PLLP=4 -DSTM32_PLLQ=7
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- name: Build wolfBoot
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run: make -C build
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@ -272,11 +272,17 @@ jobs:
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arch: arm
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config-file: ./config/examples/stm32f4-small-blocks-uart-update.config
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stm32f4_test:
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stm32f407_discovery_test:
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uses: ./.github/workflows/test-build.yml
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with:
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arch: arm
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config-file: ./config/examples/stm32f4.config
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config-file: ./config/examples/stm32f407-discovery.config
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stm32f411_blackpill_test:
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uses: ./.github/workflows/test-build.yml
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with:
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arch: arm
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config-file: ./config/examples/stm32f411-blackpill.config
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stm32f7_dualbank_test:
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uses: ./.github/workflows/test-build.yml
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@ -238,6 +238,29 @@ if(ARCH STREQUAL "ARM")
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if(${WOLFBOOT_TARGET} STREQUAL "stm32f4")
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set(ARCH_FLASH_OFFSET 0x08000000)
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set(WOLFBOOT_ORIGIN ${ARCH_FLASH_OFFSET})
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if(NOT DEFINED CLOCK_SPEED)
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message(FATAL_ERROR "CLOCK_SPEED must be defined")
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endif()
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if(NOT DEFINED STM32_PLLM)
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message(FATAL_ERROR "STM32_PLLM must be defined")
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endif()
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if(NOT DEFINED STM32_PLLN)
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message(FATAL_ERROR "STM32_PLLN must be defined")
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endif()
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if(NOT DEFINED STM32_PLLP)
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message(FATAL_ERROR "STM32_PLLP must be defined")
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endif()
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if(NOT DEFINED STM32_PLLQ)
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message(FATAL_ERROR "STM32_PLLQ must be defined")
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endif()
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add_compile_definitions(
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CLOCK_SPEED=${CLOCK_SPEED}
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STM32_PLLM=${STM32_PLLM}
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STM32_PLLN=${STM32_PLLN}
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STM32_PLLP=${STM32_PLLP}
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STM32_PLLQ=${STM32_PLLQ}
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)
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endif()
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if(${WOLFBOOT_TARGET} STREQUAL "stm32u5")
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@ -12,7 +12,7 @@ application image starts at address 0x08020000.
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```
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$template=Get-Content -path ..\..\include\target.h.in;
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Get-Content -path ..\..\config\examples\stm32f4.config | ForEach-Object {$v=$_.Split('?='); $a=$v[0]; $b=$v[2]; $template=($template -replace "##$a##",$b) };
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Get-Content -path ..\..\config\examples\stm32f407-discovery.config | ForEach-Object {$v=$_.Split('?='); $a=$v[0]; $b=$v[2]; $template=($template -replace "##$a##",$b) };
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$template=($template -replace "##.*##","");
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Set-Content -path target.h $template
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```
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@ -91,4 +91,4 @@ If you are using a STM32F407-discovery board, a red LED will turn on upon applic
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## Armored Mode (Glitch Resistance)
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If you would like to enable the "Armored" mode (glitch resistance) in IAR you can set the compiler pre-processor macro `WOLFBOOT_ARMORED`. Note: This has only been tested with ECDSA on Cortex-M.
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If you would like to enable the "Armored" mode (glitch resistance) in IAR you can set the compiler pre-processor macro `WOLFBOOT_ARMORED`. Note: This has only been tested with ECDSA on Cortex-M.
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@ -27,3 +27,8 @@ WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x00000
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WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x4000
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WOLFBOOT_LOAD_ADDRESS?=0x200000
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WOLFBOOT_LOAD_DTS_ADDRESS?=0x400000
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CLOCK_SPEED?=160000000
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STM32_PLLM?=8
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STM32_PLLN?=336
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STM32_PLLP?=2
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STM32_PLLQ?=7
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