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wolfBoot
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Fix build for ZCU102. Fix ARM ASM defaults.

pull/525/head
David Garske 2024-11-13 11:24:35 -08:00 committed by Daniele Lacamera
parent 7500ae9526
commit 6e39fd1b63
7 changed files with 46 additions and 25 deletions
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20
arch.mk
View File

@ -80,13 +80,16 @@ ifeq ($(ARCH),AARCH64)
endif
SPI_TARGET=nxp
else
# By default disable ARM ASM for other targets
NO_ARM_ASM=1
endif
ifeq ($(SPMATH),1)
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_arm64.o
endif
ifeq ($(NO_ASM),0)
ifeq ($(NO_ARM_ASM),0)
ARCH_FLAGS=-mstrict-align
CFLAGS+=$(ARCH_FLAGS) -DWOLFSSL_ARMASM -DWOLFSSL_ARMASM_INLINE -DWC_HASH_DATA_ALIGNMENT=8
WOLFCRYPT_OBJS += lib/wolfssl/wolfcrypt/src/port/arm/armv8-sha256.o \
@ -228,11 +231,13 @@ ifeq ($(CORTEX_A5),1)
MATH_OBJS+=./lib/wolfssl/wolfcrypt/src/sp_c32.o
else
MATH_OBJS+=./lib/wolfssl/wolfcrypt/src/sp_arm32.o
OBJS+=./lib/wolfssl/wolfcrypt/src/port/arm/armv8-sha256.o
OBJS+=./lib/wolfssl/wolfcrypt/src/port/arm/armv8-32-sha256-asm.o
OBJS+=./lib/wolfssl/wolfcrypt/src/port/arm/armv8-32-sha256-asm_c.o
CFLAGS+=-DWOLFSSL_SP_ARM32_ASM -DWOLFSSL_ARMASM -DWOLFSSL_ARMASM_NO_HW_CRYPTO \
-DWOLFSSL_ARM_ARCH=7 -DWOLFSSL_ARMASM_INLINE -DWOLFSSL_ARMASM_NO_NEON
ifneq ($(NO_ARM_ASM),1)
OBJS+=./lib/wolfssl/wolfcrypt/src/port/arm/armv8-sha256.o
OBJS+=./lib/wolfssl/wolfcrypt/src/port/arm/armv8-32-sha256-asm.o
OBJS+=./lib/wolfssl/wolfcrypt/src/port/arm/armv8-32-sha256-asm_c.o
CFLAGS+=-DWOLFSSL_SP_ARM32_ASM -DWOLFSSL_ARMASM -DWOLFSSL_ARMASM_NO_HW_CRYPTO \
-DWOLFSSL_ARM_ARCH=7 -DWOLFSSL_ARMASM_INLINE -DWOLFSSL_ARMASM_NO_NEON
endif
endif
else
# All others use boot_arm.o
@ -256,8 +261,7 @@ else
CORTEXM_ARM_EXTRA_CFLAGS+=-DWOLFSSL_ARMASM -DWOLFSSL_ARMASM_NO_HW_CRYPTO \
-DWOLFSSL_ARMASM_NO_NEON
CORTEXM_ARM_EXTRA_CFLAGS+=-DWOLFSSL_ARMASM_THUMB2
-DWOLFSSL_ARMASM_NO_NEON -DWOLFSSL_ARMASM_THUMB2
endif
ifeq ($(CORTEX_M33),1)
CFLAGS+=-mcpu=cortex-m33 -DCORTEX_M33

12
hal/nxp_ls1028a-ocram.ld
View File

@ -6,7 +6,7 @@ MEMORY
{
/*The flash address range on LS1028A RDB is 0x20000000 - 0x23FFFFFF.*/
FLASH (rx) : ORIGIN = @WOLFBOOT_ORIGIN@, LENGTH = @BOOTLOADER_PARTITION_SIZE@
/* DDR4 - 2GB */
DRAM (rwx) : ORIGIN = 0x80001000 , LENGTH = 0xBFFFFFFF
@ -22,7 +22,7 @@ SECTIONS
PROVIDE (_CORE_NUMBER = 0);
PROVIDE (_MEMORY_SIZE = LENGTH(OCRAM));
PROVIDE (_FLASH_SIZE = LENGTH(FLASH));
PROVIDE (STACK_SIZE = 20K);
PROVIDE (_STACK_SIZE = 20K);
.boot :
{
@ -74,7 +74,7 @@ SECTIONS
_rodata_end = .;
} > OCRAM
PROVIDE(_stored_data = .);
PROVIDE(_stored_data = .);
.data :
{
@ -84,7 +84,7 @@ SECTIONS
KEEP(*(.ramcode))
. = ALIGN(8);
_end_data = .;
} > OCRAM
} > OCRAM
.bss :
{
@ -100,10 +100,10 @@ SECTIONS
} > OCRAM
. = ALIGN(16);
.stack :
.stack :
{
_start_stack = .;
. = . + STACK_SIZE;
. = . + _STACK_SIZE;
_end_stack = .;
} > OCRAM

10
hal/nxp_ls1028a.ld
View File

@ -6,7 +6,7 @@ MEMORY
{
/*The flash address range on LS1028A RDB is 0x20000000 - 0x23FFFFFF.*/
FLASH (rx) : ORIGIN = @WOLFBOOT_ORIGIN@, LENGTH = @BOOTLOADER_PARTITION_SIZE@
/* DDR4 - 2GB */
DRAM (rwx) : ORIGIN = 0x80001000 , LENGTH = 0xBFFFFFFF
@ -22,7 +22,7 @@ SECTIONS
PROVIDE (_CORE_NUMBER = 0);
PROVIDE (_MEMORY_SIZE = LENGTH(OCRAM));
PROVIDE (_FLASH_SIZE = LENGTH(FLASH));
PROVIDE (STACK_SIZE = 64K);
PROVIDE (_STACK_SIZE = 64K);
.boot :
{
@ -74,7 +74,7 @@ SECTIONS
_rodata_end = .;
} > FLASH
PROVIDE(_stored_data = .);
PROVIDE(_stored_data = .);
.data :
{
@ -100,10 +100,10 @@ SECTIONS
} > OCRAM
. = ALIGN(16);
.stack :
.stack :
{
_start_stack = .;
. = . + STACK_SIZE;
. = . + _STACK_SIZE;
_end_stack = .;
} > OCRAM

6
hal/nxp_p1021.ld
View File

@ -2,8 +2,8 @@ OUTPUT_ARCH( "powerpc" )
ENTRY( _reset )
HEAP_SIZE = 4K; /* heap not used */
STACK_SIZE = 128K;
_HEAP_SIZE = 4K; /* heap not used */
_STACK_SIZE = 128K;
MEMORY
{
@ -85,6 +85,6 @@ PROVIDE(_start_heap = _end);
/* If relocated to DDR already then use stack end from DDR */
/* If debugging and DDR is not ready, use L1 or L2 */
PROVIDE(_end_stack = _end + HEAP_SIZE + STACK_SIZE );
PROVIDE(_end_stack = _end + _HEAP_SIZE + _STACK_SIZE );
/* PROVIDE(_end_stack = ORIGIN(L1RAM) + (LENGTH(L1RAM)) ); */
/* PROVIDE(_end_stack = ORIGIN(L2RAM) + (LENGTH(L2RAM)) ); */

11
hal/zynq.ld
View File

@ -11,7 +11,11 @@ _EL2_STACK_SIZE = DEFINED(_EL2_STACK_SIZE) ? _EL2_STACK_SIZE : 1024;
/* Define Memories in the system */
MEMORY
{
/* psu_ddr_0_MEM_0 : ORIGIN = 0x0, LENGTH = 0x7FF00000 */
psu_ddr_0_MEM_0 : ORIGIN = 0x40000000, LENGTH = 0x100000
psu_ddr_1_MEM_0 : ORIGIN = 0x800000000, LENGTH = 0x80000000
psu_ocm_ram_0_MEM_0 : ORIGIN = 0xFFFC0000, LENGTH = 0x40000
psu_qspi_linear_0_MEM_0 : ORIGIN = 0xC0000000, LENGTH = 0x20000000
}
@ -21,6 +25,11 @@ ENTRY(_vector_table)
/* Define the sections, and where they are mapped in memory */
SECTIONS
{
PROVIDE (_DDR_ADDRESS = 0x80001000);
PROVIDE (_OCRAM_ADDRESS = ORIGIN(psu_ocm_ram_0_MEM_0));
PROVIDE (_MEMORY_SIZE = LENGTH(psu_ocm_ram_0_MEM_0));
.text : {
KEEP (*(.vectors))
*(.boot)
@ -302,5 +311,7 @@ _SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 );
__el0_stack = .;
} > psu_ddr_0_MEM_0
PROVIDE(_stack_base = .);
_end = .;
}

8
src/boot_aarch64.c
View File

@ -28,14 +28,16 @@
/* Linker exported variables */
extern unsigned int __bss_start__;
extern unsigned int __bss_end__;
#ifndef NO_XIP
extern unsigned int _stored_data;
extern unsigned int _start_data;
extern unsigned int _end_data;
#endif
extern void main(void);
extern void gicv2_init_secure(void);
void boot_entry_C(void)
void boot_entry_C(void)
{
register unsigned int *dst, *src;
@ -46,6 +48,7 @@ void boot_entry_C(void)
dst++;
}
#ifndef NO_XIP
/* Copy data section from flash to RAM if necessary */
src = (unsigned int*)&_stored_data;
dst = (unsigned int*)&_start_data;
@ -56,6 +59,9 @@ void boot_entry_C(void)
src++;
}
}
#else
(void)src;
#endif
/* Run wolfboot! */
main();

4
src/boot_aarch64_start.S
View File

@ -1,6 +1,6 @@
/**
* Aarch64 bootup
* Copyright (C) 2021 wolfSSL Inc.
* Copyright (C) 2024 wolfSSL Inc.
*
* This file is part of wolfBoot.
*
@ -269,7 +269,7 @@ init_stack:
sub x0, x0, #16
and x0, x0, #-16
mov sp, x0
ldr x1, =STACK_SIZE
ldr x1, =_STACK_SIZE
msr sp_el2, x0
msr sp_el1, x0
msr sp_el0, x0