Fix RT1050 example app LED. Fix documentation for test-app location. Peer review feedback to clarify RT1050 flash chip configuration.

pull/348/head^2
David Garske 2023-08-15 10:21:55 -07:00 committed by Daniele Lacamera
parent b33da11d7d
commit 7073bf33b4
3 changed files with 82 additions and 69 deletions

View File

@ -1053,6 +1053,8 @@ DCP support (hardware acceleration for SHA256 operations) can be enabled by usin
Firmware can be directly uploaded to the target by copying `factory.bin` to the virtual USB drive associated to the device, or by loading the image directly into flash using a JTAG/SWD debugger. Firmware can be directly uploaded to the target by copying `factory.bin` to the virtual USB drive associated to the device, or by loading the image directly into flash using a JTAG/SWD debugger.
For the RT1050 board it comes wired to use the HyperFlash, but wolfBoot is setup for QSPI. There is a rework that can be performed (see AN12183) to use the onboard 8MB ISSI IS25WP064A. Optionally you can define `CONFIG_FLASH_W25Q64JV` for the Winbond W25Q64JV.
### Testing Update ### Testing Update
```sh ```sh
@ -1072,7 +1074,7 @@ loadbin update.bin 0x60030000
```sh ```sh
JLinkGDBServer -Device MIMXRT1052xxx6A -speed 5000 -if swd -port 3333 JLinkGDBServer -Device MIMXRT1052xxx6A -speed 5000 -if swd -port 3333
arm-none-eabi-gdb arm-none-eabi-gdb
add-symbol-file test-app/image.elf 0x60010000 add-symbol-file test-app/image.elf 0x60010100
mon reset init mon reset init
b main b main
c c

View File

@ -285,14 +285,10 @@ const flexspi_nor_config_t __attribute__((section(".flash_config"))) qspiflash_c
#define CONFIG_FLASH_ADDR_WIDTH 24u /* Width of flash addresses (either 24 or 32) */ #define CONFIG_FLASH_ADDR_WIDTH 24u /* Width of flash addresses (either 24 or 32) */
#define CONFIG_FLASH_QE_ENABLE 1 #define CONFIG_FLASH_QE_ENABLE 1
/* Please define one of these */ #ifdef CONFIG_FLASH_W25Q64JV /* Winbond W25Q64JV */
//#define CONFIG_FLASH_IS25WP064A /* ISSI IS25WP064A */
//#define CONFIG_FLASH_W25Q64JV /* Winbond W25Q64JV */
#ifdef CONFIG_FLASH_W25Q64JV
#define WRITE_STATUS_CMD 0x31 #define WRITE_STATUS_CMD 0x31
#define QE_ENABLE 0x02 /* S9 */ #define QE_ENABLE 0x02 /* S9 */
#else #else /* Default - ISSI IS25WP064A (on EVKB) */
#define WRITE_STATUS_CMD 0x1 #define WRITE_STATUS_CMD 0x1
#define QE_ENABLE 0x40 /* S6 */ #define QE_ENABLE 0x40 /* S6 */
#endif #endif
@ -551,7 +547,6 @@ void hal_init(void)
ARM_MPU_Disable(); ARM_MPU_Disable();
clock_init(); clock_init();
hal_flash_init(); hal_flash_init();
//SCB_EnableICache();
} }
void hal_prepare_boot(void) void hal_prepare_boot(void)

View File

@ -28,20 +28,26 @@
static int g_pinSet = false; static int g_pinSet = false;
extern void imx_rt_init_boot_clock(void); extern void imx_rt_init_boot_clock(void);
#ifndef USER_LED_GPIO
#define USER_LED_GPIO GPIO1
#endif
#ifndef USER_LED_PIN
#define USER_LED_PIN 9U
#endif
/* Get debug console frequency. */ /* Get debug console frequency. */
static uint32_t debug_console_get_freq(void) static uint32_t debug_console_get_freq(void)
{ {
uint32_t freq; uint32_t freq;
/* To make it simple, we assume default PLL and divider settings, and the only variable
from application is use PLL3 source or OSC source */ /* To make it simple, we assume default PLL and divider settings, and the
if (CLOCK_GetMux(kCLOCK_UartMux) == 0) /* PLL3 div6 80M */ * only variable from application is use PLL3 source or OSC source */
{ if (CLOCK_GetMux(kCLOCK_UartMux) == 0) { /* PLL3 div6 80M */
freq = (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U); freq = (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) /
(CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
} }
else else {
{
freq = CLOCK_GetOscFreq() / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U); freq = CLOCK_GetOscFreq() / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
} }
@ -60,41 +66,47 @@ void init_debug_console(void)
#if defined(CPU_MIMXRT1062DVL6A) || defined(CPU_MIMXRT1064DVL6A) #if defined(CPU_MIMXRT1062DVL6A) || defined(CPU_MIMXRT1064DVL6A)
/* Pin settings (same for both 1062 and 1064) */ /* Pin settings (same for both 1062 and 1064) */
void rt1060_init_pins(void) { void rt1060_init_pins(void)
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */ {
gpio_pin_config_t USER_LED_config = { gpio_pin_config_t USER_LED_config = {
.direction = kGPIO_DigitalOutput, .direction = kGPIO_DigitalOutput,
.outputLogic = 0U, .outputLogic = 0U,
.interruptMode = kGPIO_NoIntmode .interruptMode = kGPIO_NoIntmode
}; };
GPIO_PinInit(GPIO1, 9U, &USER_LED_config);
IOMUXC_SetPinMux( CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
IOMUXC_GPIO_AD_B0_10_ARM_TRACE_SWO, /* GPIO_AD_B0_10 is configured as ARM_TRACE_SWO */
0U); GPIO_PinInit(USER_LED_GPIO, USER_LED_PIN, &USER_LED_config);
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 is configured as LPUART1_TX */ IOMUXC_SetPinMux( /* GPIO_AD_B0_10 is configured as ARM_TRACE_SWO */
0U); IOMUXC_GPIO_AD_B0_10_ARM_TRACE_SWO, 0U);
IOMUXC_SetPinMux( IOMUXC_SetPinMux( /* GPIO_AD_B0_12 is configured as LPUART1_TX */
IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 is configured as LPUART1_RX */ IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0U);
0U); IOMUXC_SetPinMux( /* GPIO_AD_B0_13 is configured as LPUART1_RX */
IOMUXC_SetPinConfig( IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0U);
IOMUXC_GPIO_AD_B0_10_ARM_TRACE_SWO, /* GPIO_AD_B0_10 PAD functional properties : */ IOMUXC_SetPinConfig( /* GPIO_AD_B0_10 PAD functional properties : */
0x90B1U); IOMUXC_GPIO_AD_B0_10_ARM_TRACE_SWO, 0x90B1U);
IOMUXC_SetPinConfig( IOMUXC_SetPinConfig( /* GPIO_AD_B0_12 PAD functional properties : */
IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 PAD functional properties : */ IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0x10B0U);
0x10B0U); IOMUXC_SetPinConfig( /* GPIO_AD_B0_13 PAD functional properties : */
IOMUXC_SetPinConfig( IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0x10B0U);
IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 PAD functional properties : */
0x10B0U);
} }
#endif #endif
#ifdef CPU_MIMXRT1052DVJ6B #ifdef CPU_MIMXRT1052DVJ6B
void rt1050_init_pins(void) { void rt1050_init_pins(void)
{
gpio_pin_config_t USER_LED_config = {
.direction = kGPIO_DigitalOutput,
.outputLogic = 0U,
.interruptMode = kGPIO_NoIntmode
};
CLOCK_EnableClock(kCLOCK_Iomuxc); CLOCK_EnableClock(kCLOCK_Iomuxc);
GPIO_PinInit(USER_LED_GPIO, USER_LED_PIN, &USER_LED_config);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TXD, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TXD, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RXD, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RXD, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_04_CCM_CLKO1, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_04_CCM_CLKO1, 0U);
@ -107,34 +119,38 @@ void rt1050_init_pins(void) {
#endif #endif
void main(void)
void main()
{ {
imx_rt_init_boot_clock(); imx_rt_init_boot_clock();
#if defined(CPU_MIMXRT1062DVL6A) || defined(CPU_MIMXRT1064DVL6A) #if defined(CPU_MIMXRT1062DVL6A) || defined(CPU_MIMXRT1064DVL6A)
rt1060_init_pins(); rt1060_init_pins();
#endif #elif defined(CPU_MIMXRT1052DVJ6B)
#ifdef CPU_MIMXRT1052DVJ6B
rt1050_init_pins(); rt1050_init_pins();
#endif #endif
SystemCoreClockUpdate(); SystemCoreClockUpdate();
SysTick_Config(SystemCoreClock / 1000U); SysTick_Config(SystemCoreClock / 1000U);
init_debug_console(); init_debug_console();
PRINTF("wolfBoot Test app, version = %d\n", wolfBoot_current_firmware_version());
PRINTF("wolfBoot Test app, version = %d\r\n",
wolfBoot_current_firmware_version());
/* enable to test update trigger on reboot */
#if 0
wolfBoot_update_trigger();
#endif
while (1) { while (1) {
SDK_DelayAtLeastUs(100000, SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY); /* 100ms delay */
if (g_pinSet) SDK_DelayAtLeastUs(100 * 1000, SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY);
{
GPIO_PinWrite(GPIO1, 9U, 0U); /* toggle user LED */
if (g_pinSet) {
GPIO_PinWrite(USER_LED_GPIO, USER_LED_PIN, 0U);
g_pinSet = false; g_pinSet = false;
} }
else else {
{ GPIO_PinWrite(USER_LED_GPIO, USER_LED_PIN, 1U);
GPIO_PinWrite(GPIO1, 9U, 1U);
g_pinSet = true; g_pinSet = true;
} }
} }
} }