mirror of https://github.com/wolfSSL/wolfBoot.git
Initial wolfHSM support for simulator and AURIX TC3xx
Brett Nicholas
Daniele Lacamera
parent
03aae5a912
commit
78e4275f99
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@ -433,3 +433,9 @@ jobs:
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arch: aarch64
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config-file: ./config/examples/zynqmp.config
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make-args: CROSS_COMPILE=aarch64-linux-gnu-
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sim_wolfhsm_test:
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uses: ./.github/workflows/test-build.yml
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with:
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arch: host
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config-file: ./config/examples/sim-wolfHSM.config
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@ -0,0 +1,66 @@
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name: wolfHSM simulator test
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on:
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push:
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branches: [ 'master', 'main', 'release/**' ]
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pull_request:
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branches: [ '*' ]
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workflow_dispatch:
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jobs:
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wolfhsm_simulator_test:
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runs-on: ubuntu-latest
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steps:
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- uses: actions/checkout@v3
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with:
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submodules: true
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- name: Workaround for sources.list
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run: sudo sed -i 's|http://azure.archive.ubuntu.com/ubuntu/|http://mirror.arizona.edu/ubuntu/|g' /etc/apt/sources.list
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- name: Update repository
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run: sudo apt-get update
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- name: make clean
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run: |
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make distclean
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- name: Select config (wolfHSM simulator)
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run: |
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cp config/examples/sim-wolfHSM.config .config
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- name: Build tools
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run: |
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make -C tools/keytools && make -C tools/bin-assemble
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- name: Build wolfboot.elf
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run: |
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make clean && make test-sim-internal-flash-with-update
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# checkout and build wolfHSM examples repo
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- name: Checkout wolfHSM-examples
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uses: actions/checkout@v3
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with:
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repository: wolfssl/wolfHSM-examples
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path: wolfHSM-examples
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- name: Build example POSIX TCP server
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run: cd wolfHSM-examples/posix/tcp/wh_server_tcp && make WOLFSSL_DIR=../../../../lib/wolfssl WOLFHSM_DIR=../../../../lib/wolfHSM
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# Start the server in the background
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- name: Run POSIX TCP server
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run: |
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cd wolfHSM-examples/posix/tcp/wh_server_tcp
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./Build/wh_server_tcp.elf --client 12 --id 255 --key ../../../../wolfboot_signing_private_key_pub.der &
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TCP_SERVER_PID=$!
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echo "TCP_SERVER_PID=$TCP_SERVER_PID" >> $GITHUB_ENV
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# Run the sunny day update test against the server
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- name: Run sunny day update test
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run: |
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tools/scripts/sim-sunnyday-update.sh
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# Kill the server if it is still running
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- name: Kill POSIX TCP server
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run: |
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kill $TCP_SERVER_PID
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@ -209,6 +209,8 @@ IDE/AURIX/SDK/*
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!IDE/AURIX/SDK/placeholder.txt
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IDE/AURIX/Configurations/*
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!IDE/AURIX/Configurations/placeholder.txt
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IDE/AURIX/wolfHSM-infineon-tc3xx/*
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!IDE/AURIX/wolfHSM-infineon-tc3xx/placeholder.txt
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tpm_seal_key.key
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@ -7,3 +7,6 @@
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[submodule "lib/wolfPKCS11"]
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path = lib/wolfPKCS11
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url = https://github.com/wolfSSL/wolfPKCS11.git
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[submodule "lib/wolfHSM"]
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path = lib/wolfHSM
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url = https://github.com/wolfssl/wolfhsm.git
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@ -1,12 +1,32 @@
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# Overview
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# WolfBoot on Infineon AURIX TC3xx
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This example demonstrates using wolfBoot on the Infineon AURIX TC3xx family of microcontrollers. The example is based on the TC375 Lite-Kit V2, but should be easily adaptable to other TC3xx devices. This README assumes basic familiarity with the TC375 SoC, the AURIX IDE, and Lauterbach Trace32 debugger.
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## Overview
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- [WolfBoot on Infineon AURIX TC3xx](#wolfboot-on-infineon-aurix-tc3xx)
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- [Overview](#overview)
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- [Important notes](#important-notes)
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- [Flash Partitioning](#flash-partitioning)
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- [Building and running the wolfBoot demo](#building-and-running-the-wolfboot-demo)
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- [Prerequisites](#prerequisites)
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- [Clone wolfBoot](#clone-wolfboot)
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- [Build wolfBoot keytools and generate keys](#build-wolfboot-keytools-and-generate-keys)
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- [Install the Infineon TC3xx SDK into the wolfBoot project](#install-the-infineon-tc3xx-sdk-into-the-wolfboot-project)
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- [Build wolfBoot](#build-wolfboot)
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- [Connect the Lauterbach to the TC375 Device in TRACE32](#connect-the-lauterbach-to-the-tc375-device-in-trace32)
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- [Update the start address in UCBs using TRACE32](#update-the-start-address-in-ucbs-using-trace32)
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- [Load and run the wolfBoot demo in TRACE32](#load-and-run-the-wolfboot-demo-in-trace32)
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- [wolfHSM Compatibility](#wolfhsm-compatibility)
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- [Building wolfBoot with wolfHSM](#building-wolfboot-with-wolfhsm)
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- [Troubleshooting](#troubleshooting)
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- [WSL "bad interpreter" error](#wsl-bad-interpreter-error)
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The example contains two projects: `wolfBoot-tc3xx` and `test-app`. The `wolfBoot-tc3xx` project contains the wolfBoot bootloader, and the `test-app` project contains a simple firmware application that will be loaded and executed by wolfBoot. The `test-app` project is a simple blinky application that blinks LED2 on the TC375 Lite-Kit V2 once per second when running the base image, and rapidly (~3x/sec) when running the update image. The test app determines if it is a base or update image by inspecting the firmware version (obtained through the wolfBoot API). The firmware version is set in the image header by the wolfBoot keytools when signing the test app binaries. The same test app binary is used for both the base and update images, with the only difference being the firmware version set by the keytools.
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## Important notes
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- In the TC375 UCBs, BMDHx.STAD must point to the wolfBoot entrypoint `0xA000_0000`. This is the default value of the TC375 and so need not be changed unless it has already been modified or you wish to rearrange the memory map.
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- In the TC375 UCBs, BMDHx.STAD must point to the wolfBoot entrypoint `0xA00A_0000`. You can modify this in the `UCB` section of the TRACE32 IDE as described in the steps later in this document. Please refer to the TRACE32 manual and the TC37xx user manual for more information on the UCBs.
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- Because TC3xx PFLASH ECC prevents reading from erased flash, the `EXT_FLASH` option is used to redirect flash reads to the `ext_flash_read()` HAL API, where the flash pages requested to be read can be blank-checked by hardware before reading.
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- TC3xx PFLASH is write-once (`NVM_FLASH_WRITEONCE`), however wolfBoot `NVM_FLASH_WRITEONCE` does not support `EXT_FLASH`. Therefore the write-once functionality is re-implemented in the `HAL` layer.
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- This demo app is only compatible with the GCC toolchain build configurations shipped with the AURIX IDE. The TASKING compiler build configurations are not yet supported.
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@ -18,20 +38,22 @@ The TC3xx AURIX port of wolfBoot places all images in PFLASH, and uses both PFLA
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```
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+==========+
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| PFLASH0 |
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+==========+ <-- 0x8000_0000
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| wolfBoot | 128K
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+----------+ <-- 0x8002_0000
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| SWAP | 16K
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+----------+ <-- 0x8002_4000
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| Unused | ~2.86M
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+----------+ <-- 0x8000_0000
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| Unused | 640K
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+==========+ <-- 0x800A_0000
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| wolfBoot | 172K
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+----------+ <-- 0x8002_B000
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| Unused | ~2.8M
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+----------+ <-- 0x8030_0000
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+==========+
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| PFLASH1 |
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+==========+ <-- 0x8030_0000
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| BOOT | 1.5M
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+----------+ <-- 0x8048_0000
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| UPDATE | 1.5M
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| BOOT | 1.5M (0x17E000)
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+----------+ <-- 0x8047_E000
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| UPDATE | 1.5M (0x17E000)
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+----------+ <-- 0x805F_C000
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| SWAP | 16K (0x4000)
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+----------+ <-- 0x8060_0000
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```
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@ -54,20 +76,19 @@ Please refer to the [wolfBoot](wolfBoot-tc3xx/Lcf_Gnu_Tricore_Tc.lsl) and [test-
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1. Open a WSL2 terminal and navigate to the top level `wolfBoot` directory
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2. Compile the keytools by running `make keytools`
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3. Use the helper script to generate a new signing key pair using RSA 4096
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3. Use the helper script to generate a new signing key pair using ECC 256
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1. Navigate to `wolfBoot/tools/scripts/tc3xx`
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2. Run `./gen-tc3xx-keys.sh`. This generates the signing private key `wolfBoot/priv.der` and adds the public key to the wolfBoot keystore (see [keygen](https://github.com/wolfSSL/wolfBoot/blob/aurix-tc3xx-support/docs/Signing.md) for more information). If you already have generated a key, you will be prompted to overwrite it.
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```
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$ ./gen-tc3xx-keys.sh
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+ cd ../../../
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+ ./tools/keytools/keygen -g priv.der --rsa4096
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Keytype: RSA4096
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Generating key (type: RSA4096)
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RSA public key len: 550 bytes
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+ tools/keytools/keygen --ecc256 -g priv.der
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Keytype: ECC256
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Generating key (type: ECC256)
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Associated key file: priv.der
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Partition ids mask: ffffffff
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Key type : RSA4096
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Key type : ECC256
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Public key slot: 0
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Done.
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```
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```
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$ ./gen-tc3xx-signed-test-apps-release.sh
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+ ../../keytools/sign --rsa4096 --sha256 '../../../IDE/AURIX/test-app/TriCore Release (GCC)/test-app.bin' ../../../priv.der 1
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+ ../../keytools/sign --ecc256 --sha256 '../../../IDE/AURIX/test-app/TriCore Release (GCC)/test-app.bin' ../../../priv.der 1
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wolfBoot KeyTools (Compiled C version)
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wolfBoot version 2010000
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wolfBoot version 2020000
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Update type: Firmware
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Input image: ../../../IDE/AURIX/test-app/TriCore Release (GCC)/test-app.bin
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Selected cipher: RSA4096
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Selected cipher: ECC256
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Selected hash : SHA256
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Public key: ../../../priv.der
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Output image: ../../../IDE/AURIX/test-app/TriCore Release (GCC)/test-app_v1_signed.bin
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Target partition id : 1
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Found RSA512 key
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image header size calculated at runtime (1024 bytes)
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image header size calculated at runtime (256 bytes)
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Calculating SHA256 digest...
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Signing the digest...
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Output image(s) successfully created.
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+ ../../keytools/sign --rsa4096 --sha256 '../../../IDE/AURIX/test-app/TriCore Release (GCC)/test-app.bin' ../../../priv.der 2
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+ ../../keytools/sign --ecc256 --sha256 '../../../IDE/AURIX/test-app/TriCore Release (GCC)/test-app.bin' ../../../priv.der 2
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wolfBoot KeyTools (Compiled C version)
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wolfBoot version 2010000
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wolfBoot version 2020000
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Update type: Firmware
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Input image: ../../../IDE/AURIX/test-app/TriCore Release (GCC)/test-app.bin
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Selected cipher: RSA4096
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Selected cipher: ECC256
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Selected hash : SHA256
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Public key: ../../../priv.der
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Output image: ../../../IDE/AURIX/test-app/TriCore Release (GCC)/test-app_v2_signed.bin
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Target partition id : 1
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Found RSA512 key
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image header size calculated at runtime (1024 bytes)
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image header size calculated at runtime (256 bytes)
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Calculating SHA256 digest...
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Signing the digest...
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Output image(s) successfully created.
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```
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### Load and run the wolfBoot demo
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### Connect the Lauterbach to the TC375 Device in TRACE32
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1. Load wolfBoot and the firmware application images to the tc3xx device using Trace32 and a Lauterbach probe
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1. Ensure the Lauterbach probe is connected to the debug port of the tc375 LiteKit
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2. Open Trace32 Power View for Tricore
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3. Open the SYStem menu and click "DETECT" to detect the tc375 device. Click "CONTINUE" in the pop-up window, and then choose "Set TC375xx" when the device is detected
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4. Click "File" -> "ChangeDir and Run Script" and choose the `wolfBoot/tools/scripts/tc3xx/wolfBoot-loadAll-$BUILD.cmm` script, where $BUILD should be either "debug" or "release" depending on your build type in (4) and (6).
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1. Ensure the Lauterbach probe is connected to the debug port of the tc375 LiteKit
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2. Open Trace32 Power View for Tricore
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3. Open the SYStem menu and click "DETECT" to detect the tc375 device. Click "CONTINUE" in the pop-up window, and then choose "Set TC375xx" when the device is detected
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### Update the start address in UCBs using TRACE32
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The default Boot Mode Header (BMHD) start address on a new TC375 `0xA0000000` but the wolfBoot application has a start address of `0xA00A0000`. We must therefore update the BMHD UCBs with the correct entry point such that it can boot wolfBoot out of reset.
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1. Select the TC37x dropdown menu and click UCBs
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2. Expand `BMHD0_COPY`
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3. Click "Edit"
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4. Set the `STAD` to `0xA00A0000`
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5. Click "Update" to recompute the CRC
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6. Click "Check" to verify the new CRC
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7. Click "Write" to update the UCB in flash
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8. Perform the same operations (2-7) on the `BMHD0_ORIG` UCB
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The device is now configured to boot from `0xA00A0000` out of reset.
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### Load and run the wolfBoot demo in TRACE32
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We can now load wolfBoot and the firmware application images to the tc3xx device using Trace32 and a Lauterbach probe
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1. Click "File" -> "ChangeDir and Run Script" and choose the `wolfBoot/tools/scripts/tc3xx/wolfBoot-loadAll-$BUILD.cmm` script, where $BUILD should be either "debug" or "release" depending on your build type in (4) and (6).
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wolfBoot and the demo applications are now loaded into flash, and core0 will be halted at the wolfBoot entry point (`core0_main()`).
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@ -173,6 +211,36 @@ wolfBoot and the demo applications are now loaded into flash, and core0 will be
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To rerun the demo, simply rerun the loader script in Trace32 and repeat the above steps
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## wolfHSM Compatibility
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wolfBoot has full support for wolfHSM on the AURIX TC3xx platform. The wolfBoot application functions as the HSM client, and all cryptographic operations required to verify application images are offloaded to the HSM. When used in tandem with wolfHSM, wolfBoot can be configured to use keys stored on the HSM for cryptographic operations, or to store keys in the default keystore and send them on-demand to the HSM for usage. The former option is the default configuration, and is recommended for most use cases, as key material will never leave the secure boundary of the HSM. The latter option is useful for development and testing, before keys have been preloaded onto the HSM.
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Note that information regarding the AURIX TC3xx HSM core is restricted by NDA with Infineon. Source code for the wolfHSM TC3xx platform port is therefore not publicly available and cannot be included for distribution in wolfBoot. Instructions to build wolfBoot with wolfHSM compatibility are provided here, but the wolfHSM TC3xx port must be obtained separately from wolfSSL. To obtain the wolfHSM TC3xx port, please contact wolfSSL at [facts@wolfssl.com](mailto:facts@wolfssl.com).
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### Building wolfBoot with wolfHSM
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Steps to build wolfBoot on TC3xx with wolfHSM are largely similar to the non-HSM case, with a few key differences.
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1. Obtain the wolfHSM release for the AURIX TC3xx from wolfSSL
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2. Extract the contents of the `infineon/tc3xx` directory from the wolfHSM TC3xx release you obtained from wolfSSL into the [wolfBoot/IDE/AURIX/wolfHSM-infineon-tc3xx](./wolfHSM-infineon-tc3xx/) directory. The contents of this directory should now be:
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```
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IDE/AURIX/wolfHSM-infineon-tc3xx/
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├── README.md
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├── T32
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├── placeholder.txt
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├── port
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├── tchsm-client
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├── tchsm-server
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├── wolfHSM
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└── wolfssl
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```
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3. Build the wolfHSM server application and load it onto the HSM core, following the instructions provided in the release you obtained from wolfSSL. You do not need to build or load the demo client application, as wolfBoot will act as the client.
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4. Follow all of the steps in [Building and Running the wolfBoot Demo](#building-and-running-the-wolfboot-demo) for the non-HSM enabled case, but with the following key differences:
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1. The [wolfBoot-tc3xx-wolfHSM](./wolfBoot-tc3xx-wolfHSM/) AURIX Studio project should be used instead of `wolfBoot-tc3xx`
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2. Use the `wolfBoot-wolfHSM-loadAll-XXX.cmm` lauterbach scripts instead of `wolfBoot-loadAll-XXX.cmm` to load the wolfBoot and test-app images in the TRACE32 GUI
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5. If using the default build options in [wolfBoot-tc3xx-wolfHSM](./wolfBoot-tc3xx-wolfHSM/), wolfBoot will expect the public key for image verification to be stored at a specific keyId for the wolfBoot client ID. You can use [whnvmtool](https://github.com/wolfSSL/wolfHSM/tree/main/tools/whnvmtool) to generate a loadable NVM image that contains the required keys. [wolfBoot-wolfHSM-keys.nvminit](../../tools/scripts/tc3xx/wolfBoot-wolfHSM-keys.nvminit) provides an example `whnvmtool` config file that will include the generated key in the NVM image, which can then be loaded to the device via a flash programming tool. See the `whnvmtool` documentation and the documentation included in your wolfHSM AURIX release for more details. Note: if you want to use the standard wolfBoot keystore functionality in conjunction with wolfHSM for testing purposes (doesn't require pre-loading keys on the HSM) you can configure wolfBoot to send the keys to the HSM on-the-fly as ephemeral keys. To do this, ensure `WOLFBOOT_USE_WOLFHSM_PUBKEY_ID` is **NOT** defined, and remove the `--nolocalkeys` argument when invoking `keygen` in the `./gen-tc3xx-keys.sh` script.
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## Troubleshooting
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@ -21,7 +21,7 @@
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<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
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<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
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<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
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<provider class="com.infineon.aurix.buildsystem.managed.gcc.AURIXGCC11BuiltinSpecsDetector" console="false" env-hash="20899676975013635" id="com.infineon.aurix.buildsystem.managed.CrossGCC11BuiltinSpecsDetector" keep-relative-paths="false" name="AURIXCrossGCC11compilerSpecsDetector" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
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<provider class="com.infineon.aurix.buildsystem.managed.gcc.AURIXGCC11BuiltinSpecsDetector" console="false" env-hash="478447636549809998" id="com.infineon.aurix.buildsystem.managed.CrossGCC11BuiltinSpecsDetector" keep-relative-paths="false" name="AURIXCrossGCC11compilerSpecsDetector" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
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<language-scope id="org.eclipse.cdt.core.gcc"/>
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<language-scope id="org.eclipse.cdt.core.g++"/>
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</provider>
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@ -32,7 +32,7 @@
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<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
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<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
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<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
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<provider class="com.infineon.aurix.buildsystem.managed.gcc.AURIXGCC11BuiltinSpecsDetector" console="false" env-hash="20899676975013635" id="com.infineon.aurix.buildsystem.managed.CrossGCC11BuiltinSpecsDetector" keep-relative-paths="false" name="AURIXCrossGCC11compilerSpecsDetector" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<provider class="com.infineon.aurix.buildsystem.managed.gcc.AURIXGCC11BuiltinSpecsDetector" console="false" env-hash="478447636549809998" id="com.infineon.aurix.buildsystem.managed.CrossGCC11BuiltinSpecsDetector" keep-relative-paths="false" name="AURIXCrossGCC11compilerSpecsDetector" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
|
|
|
|||
|
|
@ -27,7 +27,7 @@
|
|||
IFX_ALIGN(4) IfxCpu_syncEvent g_cpuSyncEvent = 0;
|
||||
|
||||
|
||||
#define LED &MODULE_P00, 6 /* LED: Port, Pin definition */
|
||||
#define LED &MODULE_P00, 5 /* LED: Port, Pin definition */
|
||||
#define BLINK_TIME_BASE 500 /* Wait time constant in milliseconds */
|
||||
#define BLINK_TIME_UPDATE 100 /* Wait time constant in milliseconds */
|
||||
|
||||
|
|
|
|||
|
|
@ -63,28 +63,36 @@ LCF_HEAP1_OFFSET = (LCF_USTACK1_OFFSET - LCF_HEAP_SIZE);
|
|||
LCF_HEAP2_OFFSET = (LCF_USTACK2_OFFSET - LCF_HEAP_SIZE);
|
||||
|
||||
|
||||
LCF_STARTPTR_CPU0 = 0x80300400;
|
||||
LCF_STARTPTR_CPU1 = 0x80300420;
|
||||
LCF_STARTPTR_CPU2 = 0x80300440;
|
||||
LCF_WOLFBOOT_BOOT_PART_BASEADDR = 0xA0300000;
|
||||
LCF_WOLFBOOT_HEADER_OFFSET = 0x100;
|
||||
|
||||
LCF_STARTPTR_NC_CPU0 = 0xA0300400;
|
||||
LCF_STARTPTR_NC_CPU1 = 0xA0300420;
|
||||
LCF_STARTPTR_NC_CPU2 = 0xA0300440;
|
||||
LCF_CODE_BASE_ADDR = LCF_WOLFBOOT_BOOT_PART_BASEADDR + LCF_WOLFBOOT_HEADER_OFFSET;
|
||||
|
||||
/* TODO LCF_TRAPVEC_SIZE */
|
||||
LCF_TRAPVEC0_START = 0x80300500;
|
||||
LCF_TRAPVEC1_START = 0x80300600;
|
||||
LCF_TRAPVEC2_START = 0x80300700;
|
||||
LCF_START_CODE_SIZE = 0x20; /* space reserved for .start sections (per-cpu) */
|
||||
LCF_TRAPVEC_OFFSET = 0x100; /* size/alignment of trap table (also offset from base to first trap table) */
|
||||
|
||||
LCF_INTVEC0_START = 0x80300800;
|
||||
LCF_INTVEC1_START = 0x80302800;
|
||||
LCF_INTVEC2_START = 0x80304800;
|
||||
LCF_STARTPTR_NC_CPU0 = LCF_CODE_BASE_ADDR;
|
||||
LCF_STARTPTR_NC_CPU1 = LCF_STARTPTR_NC_CPU0 + LCF_START_CODE_SIZE;
|
||||
LCF_STARTPTR_NC_CPU2 = LCF_STARTPTR_NC_CPU1 + LCF_START_CODE_SIZE;
|
||||
|
||||
/* Offset of the trap table from start address (accounts for size of .start section) */
|
||||
LCF_TRAPVEC0_START = (LCF_STARTPTR_NC_CPU0 + LCF_TRAPVEC_OFFSET); /* 0x80000100 */
|
||||
LCF_TRAPVEC1_START = (LCF_TRAPVEC0_START + LCF_TRAPVEC_OFFSET); /* 0x80000200 */
|
||||
LCF_TRAPVEC2_START = (LCF_TRAPVEC1_START + LCF_TRAPVEC_OFFSET); /* 0x80000300 */
|
||||
|
||||
LCF_INTVEC_SIZE = 0x2000; /* 8k */
|
||||
LCF_INTVEC0_START = (LCF_TRAPVEC2_START + LCF_TRAPVEC_OFFSET); /* 0x80000400; */
|
||||
LCF_INTVEC1_START = (LCF_INTVEC0_START + LCF_INTVEC_SIZE); /* 0x80002400; */
|
||||
LCF_INTVEC2_START = (LCF_INTVEC1_START + LCF_INTVEC_SIZE); /* 0x80004400; */
|
||||
|
||||
__INTTAB_CPU0 = LCF_INTVEC0_START;
|
||||
__INTTAB_CPU1 = LCF_INTVEC1_START;
|
||||
__INTTAB_CPU2 = LCF_INTVEC2_START;
|
||||
|
||||
|
||||
/* Alias non-cached to cached sections for now */
|
||||
LCF_STARTPTR_CPU0 = LCF_STARTPTR_NC_CPU0;
|
||||
LCF_STARTPTR_CPU1 = LCF_STARTPTR_NC_CPU1;
|
||||
LCF_STARTPTR_CPU2 = LCF_STARTPTR_NC_CPU2;
|
||||
|
||||
RESET = LCF_STARTPTR_NC_CPU0;
|
||||
|
||||
|
|
@ -105,16 +113,19 @@ MEMORY
|
|||
psram_local (w!xp): org = 0xc0000000, len = 64K
|
||||
|
||||
/* Majority of pfls0 is reserved for wolfBoot, swap and HSM */
|
||||
pfls0 (rx!p): org = 0x80000000, len = 3M
|
||||
pfls0 (rx!p): org = 0xA0000000, len = 3M
|
||||
|
||||
/* placeholder for wolfBoot image header */
|
||||
pfls1_hdr (rx!p): org = 0x80300000, len = 1024
|
||||
pfls1_hdr (rx!p): org = 0xA0300000, len = 256
|
||||
|
||||
/* pfls1 is the remainder of the wolfBoot BOOT partition. Everything goes here */
|
||||
pfls1 (rx!p): org = 0x80300400, len = 0x17FC00 /* 1.5MiB - 1024B*/
|
||||
pfls1 (rx!p): org = 0xA0300100, len = 0x17DF00 /* 0x17E000 - 256B */
|
||||
|
||||
/* reserved for wolfBoot UPDATE partition */
|
||||
pfls1_update (rx!p): org = 0x80480000, len = 0x180000 /* 1.5MiB */
|
||||
pfls1_update (rwx!p): org = 0xA047E000, len = 0x17E000 /* ~1.5MiB */
|
||||
|
||||
/* SWAP sector for wolfBoot image update */
|
||||
pfls1_swap (rwx!p): org = 0xA05FC000, len = 16K /* last sector of PFLASH1 */
|
||||
|
||||
dfls0 (rx!p): org = 0xaf000000, len = 256K
|
||||
|
||||
|
|
|
|||
|
|
@ -1,918 +0,0 @@
|
|||
/* Lcf_Tasking_Tricore_Tc.lsl
|
||||
*
|
||||
* Copyright (C) 2014-2024 wolfSSL Inc.
|
||||
*
|
||||
* This file is part of wolfBoot.
|
||||
*
|
||||
* wolfBoot is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* wolfBoot is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with wolfBoot. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#define LCF_CSA0_SIZE 8k
|
||||
#define LCF_USTACK0_SIZE 2k
|
||||
#define LCF_ISTACK0_SIZE 1k
|
||||
|
||||
#define LCF_CSA1_SIZE 8k
|
||||
#define LCF_USTACK1_SIZE 2k
|
||||
#define LCF_ISTACK1_SIZE 1k
|
||||
|
||||
#define LCF_CSA2_SIZE 8k
|
||||
#define LCF_USTACK2_SIZE 2k
|
||||
#define LCF_ISTACK2_SIZE 1k
|
||||
|
||||
#define LCF_HEAP_SIZE 4k
|
||||
|
||||
#define LCF_CPU0 0
|
||||
#define LCF_CPU1 1
|
||||
#define LCF_CPU2 2
|
||||
|
||||
/*Un comment one of the below statements to enable CpuX DMI RAM to hold global variables*/
|
||||
#define LCF_DEFAULT_HOST LCF_CPU0
|
||||
/*#define LCF_DEFAULT_HOST LCF_CPU1*/
|
||||
/*#define LCF_DEFAULT_HOST LCF_CPU2*/
|
||||
|
||||
#define LCF_DSPR2_START 0x50000000
|
||||
#define LCF_DSPR2_SIZE 96k
|
||||
|
||||
#define LCF_DSPR1_START 0x60000000
|
||||
#define LCF_DSPR1_SIZE 240k
|
||||
|
||||
#define LCF_DSPR0_START 0x70000000
|
||||
#define LCF_DSPR0_SIZE 240k
|
||||
|
||||
#define LCF_CSA2_OFFSET (LCF_DSPR2_SIZE - 1k - LCF_CSA2_SIZE)
|
||||
#define LCF_ISTACK2_OFFSET (LCF_CSA2_OFFSET - 256 - LCF_ISTACK2_SIZE)
|
||||
#define LCF_USTACK2_OFFSET (LCF_ISTACK2_OFFSET - 256 - LCF_USTACK2_SIZE)
|
||||
|
||||
#define LCF_CSA1_OFFSET (LCF_DSPR1_SIZE - 1k - LCF_CSA1_SIZE)
|
||||
#define LCF_ISTACK1_OFFSET (LCF_CSA1_OFFSET - 256 - LCF_ISTACK1_SIZE)
|
||||
#define LCF_USTACK1_OFFSET (LCF_ISTACK1_OFFSET - 256 - LCF_USTACK1_SIZE)
|
||||
|
||||
#define LCF_CSA0_OFFSET (LCF_DSPR0_SIZE - 1k - LCF_CSA0_SIZE)
|
||||
#define LCF_ISTACK0_OFFSET (LCF_CSA0_OFFSET - 256 - LCF_ISTACK0_SIZE)
|
||||
#define LCF_USTACK0_OFFSET (LCF_ISTACK0_OFFSET - 256 - LCF_USTACK0_SIZE)
|
||||
|
||||
#define LCF_HEAP0_OFFSET (LCF_USTACK0_OFFSET - LCF_HEAP_SIZE)
|
||||
#define LCF_HEAP1_OFFSET (LCF_USTACK1_OFFSET - LCF_HEAP_SIZE)
|
||||
#define LCF_HEAP2_OFFSET (LCF_USTACK2_OFFSET - LCF_HEAP_SIZE)
|
||||
|
||||
#define LCF_INTVEC0_START 0x802FE000
|
||||
#define LCF_INTVEC1_START 0x805FC000
|
||||
#define LCF_INTVEC2_START 0x805FE000
|
||||
|
||||
#define LCF_TRAPVEC0_START 0x80000100
|
||||
#define LCF_TRAPVEC1_START 0x80300000
|
||||
#define LCF_TRAPVEC2_START 0x80300100
|
||||
|
||||
#define LCF_STARTPTR_CPU0 0x80000000
|
||||
#define LCF_STARTPTR_CPU1 0x80300200
|
||||
#define LCF_STARTPTR_CPU2 0x80300220
|
||||
|
||||
#define LCF_STARTPTR_NC_CPU0 0xA0000000
|
||||
#define LCF_STARTPTR_NC_CPU1 0xA0300200
|
||||
#define LCF_STARTPTR_NC_CPU2 0xA0300220
|
||||
|
||||
#define INTTAB0 (LCF_INTVEC0_START)
|
||||
#define INTTAB1 (LCF_INTVEC1_START)
|
||||
#define INTTAB2 (LCF_INTVEC2_START)
|
||||
#define TRAPTAB0 (LCF_TRAPVEC0_START)
|
||||
#define TRAPTAB1 (LCF_TRAPVEC1_START)
|
||||
#define TRAPTAB2 (LCF_TRAPVEC2_START)
|
||||
|
||||
#define RESET LCF_STARTPTR_NC_CPU0
|
||||
|
||||
#include "tc1v1_6_2.lsl"
|
||||
|
||||
// Specify a multi-core processor environment (mpe)
|
||||
|
||||
processor mpe
|
||||
{
|
||||
derivative = tc37;
|
||||
}
|
||||
|
||||
derivative tc37
|
||||
{
|
||||
core tc0
|
||||
{
|
||||
architecture = TC1V1.6.2;
|
||||
space_id_offset = 100; // add 100 to all space IDs in the architecture definition
|
||||
copytable_space = vtc:linear; // use the copy table in the virtual core for 'bss' and initialized data sections
|
||||
}
|
||||
|
||||
core tc1 // core 1 TC16E
|
||||
{
|
||||
architecture = TC1V1.6.2;
|
||||
space_id_offset = 200; // add 200 to all space IDs in the architecture definition
|
||||
copytable_space = vtc:linear; // use the copy table in the virtual core for 'bss' and initialized data sections
|
||||
}
|
||||
|
||||
core tc2 // core 2 TC16P
|
||||
{
|
||||
architecture = TC1V1.6.2;
|
||||
space_id_offset = 300; // add 300 to all space IDs in the architecture definition
|
||||
copytable_space = vtc:linear; // use the copy table in the virtual core for 'bss' and initialized data sections
|
||||
}
|
||||
|
||||
core vtc
|
||||
{
|
||||
architecture = TC1V1.6.2;
|
||||
import tc0; // add all address spaces of core tc0 to core vtc for linking and locating
|
||||
import tc1; // tc1
|
||||
import tc2; // tc2
|
||||
}
|
||||
|
||||
bus sri
|
||||
{
|
||||
mau = 8;
|
||||
width = 32;
|
||||
|
||||
// map shared addresses one-to-one to real cores and virtual cores
|
||||
map (dest=bus:tc0:fpi_bus, src_offset=0, dest_offset=0, size=0xc0000000);
|
||||
map (dest=bus:tc1:fpi_bus, src_offset=0, dest_offset=0, size=0xc0000000);
|
||||
map (dest=bus:tc2:fpi_bus, src_offset=0, dest_offset=0, size=0xc0000000);
|
||||
map (dest=bus:vtc:fpi_bus, src_offset=0, dest_offset=0, size=0xc0000000);
|
||||
}
|
||||
|
||||
memory dsram2 // Data Scratch Pad Ram
|
||||
{
|
||||
mau = 8;
|
||||
size = 96k;
|
||||
type = ram;
|
||||
map (dest=bus:tc2:fpi_bus, dest_offset=0xd0000000, size=96k, priority=8);
|
||||
map (dest=bus:sri, dest_offset=0x50000000, size=96k);
|
||||
}
|
||||
|
||||
memory psram2 // Program Scratch Pad Ram
|
||||
{
|
||||
mau = 8;
|
||||
size = 64k;
|
||||
type = ram;
|
||||
map (dest=bus:tc2:fpi_bus, dest_offset=0xc0000000, size=64k, priority=8);
|
||||
map (dest=bus:sri, dest_offset=0x50100000, size=64k);
|
||||
}
|
||||
|
||||
memory dsram1 // Data Scratch Pad Ram
|
||||
{
|
||||
mau = 8;
|
||||
size = 240k;
|
||||
type = ram;
|
||||
map (dest=bus:tc1:fpi_bus, dest_offset=0xd0000000, size=240k, priority=8);
|
||||
map (dest=bus:sri, dest_offset=0x60000000, size=240k);
|
||||
}
|
||||
|
||||
memory psram1 // Program Scratch Pad Ram
|
||||
{
|
||||
mau = 8;
|
||||
size = 64k;
|
||||
type = ram;
|
||||
map (dest=bus:tc1:fpi_bus, dest_offset=0xc0000000, size=64k, priority=8);
|
||||
map (dest=bus:sri, dest_offset=0x60100000, size=64k);
|
||||
}
|
||||
|
||||
memory dsram0 // Data Scratch Pad Ram
|
||||
{
|
||||
mau = 8;
|
||||
size = 240k;
|
||||
type = ram;
|
||||
map (dest=bus:tc0:fpi_bus, dest_offset=0xd0000000, size=240k, priority=8);
|
||||
map (dest=bus:sri, dest_offset=0x70000000, size=240k);
|
||||
}
|
||||
|
||||
memory psram0 // Program Scratch Pad Ram
|
||||
{
|
||||
mau = 8;
|
||||
size = 64k;
|
||||
type = ram;
|
||||
map (dest=bus:tc0:fpi_bus, dest_offset=0xc0000000, size=64k, priority=8);
|
||||
map (dest=bus:sri, dest_offset=0x70100000, size=64k);
|
||||
}
|
||||
|
||||
memory pfls0
|
||||
{
|
||||
mau = 8;
|
||||
size = 3M;
|
||||
type = rom;
|
||||
map cached (dest=bus:sri, dest_offset=0x80000000, size=3M);
|
||||
map not_cached (dest=bus:sri, dest_offset=0xa0000000, reserved, size=3M);
|
||||
}
|
||||
|
||||
memory pfls1
|
||||
{
|
||||
mau = 8;
|
||||
size = 3M;
|
||||
type = rom;
|
||||
map cached (dest=bus:sri, dest_offset=0x80300000, size=3M);
|
||||
map not_cached (dest=bus:sri, dest_offset=0xa0300000, reserved, size=3M);
|
||||
}
|
||||
|
||||
memory dfls0
|
||||
{
|
||||
mau = 8;
|
||||
size = 256K;
|
||||
type = reserved nvram;
|
||||
map (dest=bus:sri, dest_offset=0xaf000000, size=256K);
|
||||
}
|
||||
|
||||
memory ucb
|
||||
{
|
||||
mau = 8;
|
||||
size = 24k;
|
||||
type = rom;
|
||||
map (dest=bus:sri, dest_offset=0xaf400000, reserved, size=24k);
|
||||
}
|
||||
|
||||
memory cpu0_dlmu
|
||||
{
|
||||
mau = 8;
|
||||
size = 64k;
|
||||
type = ram;
|
||||
map cached (dest=bus:sri, dest_offset=0x90000000, size=64k);
|
||||
map not_cached (dest=bus:sri, dest_offset=0xb0000000, reserved, size=64k);
|
||||
}
|
||||
|
||||
memory cpu1_dlmu
|
||||
{
|
||||
mau = 8;
|
||||
size = 64k;
|
||||
type = ram;
|
||||
map cached (dest=bus:sri, dest_offset=0x90010000, size=64k);
|
||||
map not_cached (dest=bus:sri, dest_offset=0xb0010000, reserved, size=64k);
|
||||
}
|
||||
|
||||
memory cpu2_dlmu
|
||||
{
|
||||
mau = 8;
|
||||
size = 64k;
|
||||
type = ram;
|
||||
map cached (dest=bus:sri, dest_offset=0x90020000, size=64k);
|
||||
map not_cached (dest=bus:sri, dest_offset=0xb0020000, reserved, size=64k);
|
||||
}
|
||||
|
||||
#if (__VERSION__ >= 6003)
|
||||
section_setup :vtc:linear
|
||||
{
|
||||
heap "heap" (min_size = (1k), fixed, align = 8);
|
||||
}
|
||||
#endif
|
||||
|
||||
section_setup :vtc:linear
|
||||
{
|
||||
start_address
|
||||
(
|
||||
symbol = "_START"
|
||||
);
|
||||
}
|
||||
|
||||
section_setup :vtc:linear
|
||||
{
|
||||
stack "ustack_tc0" (min_size = 1k, fixed, align = 8);
|
||||
stack "istack_tc0" (min_size = 1k, fixed, align = 8);
|
||||
stack "ustack_tc1" (min_size = 1k, fixed, align = 8);
|
||||
stack "istack_tc1" (min_size = 1k, fixed, align = 8);
|
||||
stack "ustack_tc2" (min_size = 1k, fixed, align = 8);
|
||||
stack "istack_tc2" (min_size = 1k, fixed, align = 8);
|
||||
}
|
||||
|
||||
/*Section setup for the copy table*/
|
||||
section_setup :vtc:linear
|
||||
{
|
||||
copytable
|
||||
(
|
||||
align = 4,
|
||||
dest = linear,
|
||||
table
|
||||
{
|
||||
symbol = "_lc_ub_table_tc0";
|
||||
space = :tc0:linear, :tc0:abs24, :tc0:abs18, :tc0:csa;
|
||||
},
|
||||
table
|
||||
{
|
||||
symbol = "_lc_ub_table_tc1";
|
||||
space = :tc1:linear, :tc1:abs24, :tc1:abs18, :tc1:csa;
|
||||
},
|
||||
table
|
||||
{
|
||||
symbol = "_lc_ub_table_tc2";
|
||||
space = :tc2:linear, :tc2:abs24, :tc2:abs18, :tc2:csa;
|
||||
}
|
||||
);
|
||||
}
|
||||
|
||||
/*Sections located at absolute fixed address*/
|
||||
|
||||
section_layout :vtc:linear
|
||||
{
|
||||
/*Fixed memory Allocations for stack memory and CSA*/
|
||||
group (ordered)
|
||||
{
|
||||
group ustack2(align = 8, run_addr = mem:dsram2[LCF_USTACK2_OFFSET])
|
||||
{
|
||||
stack "ustack_tc2" (size = LCF_USTACK2_SIZE);
|
||||
}
|
||||
"__USTACK2":= sizeof(group:ustack2) > 0 ? "_lc_ue_ustack_tc2" : 0;
|
||||
"__USTACK2_END"="_lc_gb_ustack2";
|
||||
|
||||
group istack2(align = 8, run_addr = mem:dsram2[LCF_ISTACK2_OFFSET])
|
||||
{
|
||||
stack "istack_tc2" (size = LCF_ISTACK2_SIZE);
|
||||
}
|
||||
"__ISTACK2":= sizeof(group:istack2) > 0 ? "_lc_ue_istack_tc2" : 0;
|
||||
"__ISTACK2_END"="_lc_gb_istack2";
|
||||
|
||||
group (align = 64, attributes=rw, run_addr=mem:dsram2[LCF_CSA2_OFFSET])
|
||||
reserved "csa_tc2" (size = LCF_CSA2_SIZE);
|
||||
"__CSA2":= "_lc_ub_csa_tc2";
|
||||
"__CSA2_END":= "_lc_ue_csa_tc2";
|
||||
}
|
||||
group (ordered)
|
||||
{
|
||||
group ustack1(align = 8, run_addr = mem:dsram1[LCF_USTACK1_OFFSET])
|
||||
{
|
||||
stack "ustack_tc1" (size = LCF_USTACK1_SIZE);
|
||||
}
|
||||
"__USTACK1":= sizeof(group:ustack1) > 0 ? "_lc_ue_ustack_tc1" : 0;
|
||||
"__USTACK1_END"="_lc_gb_ustack1";
|
||||
|
||||
group istack1(align = 8, run_addr = mem:dsram1[LCF_ISTACK1_OFFSET])
|
||||
{
|
||||
stack "istack_tc1" (size = LCF_ISTACK1_SIZE);
|
||||
}
|
||||
"__ISTACK1":= sizeof(group:istack1) > 0 ? "_lc_ue_istack_tc1" : 0;
|
||||
"__ISTACK1_END"="_lc_gb_istack1";
|
||||
|
||||
group (align = 64, attributes=rw, run_addr=mem:dsram1[LCF_CSA1_OFFSET])
|
||||
reserved "csa_tc1" (size = LCF_CSA1_SIZE);
|
||||
"__CSA1":= "_lc_ub_csa_tc1";
|
||||
"__CSA1_END":= "_lc_ue_csa_tc1";
|
||||
}
|
||||
group (ordered)
|
||||
{
|
||||
group ustack0(align = 8, run_addr = mem:dsram0[LCF_USTACK0_OFFSET])
|
||||
{
|
||||
stack "ustack_tc0" (size = LCF_USTACK0_SIZE);
|
||||
}
|
||||
"__USTACK0":= sizeof(group:ustack0) > 0 ? "_lc_ue_ustack_tc0" : 0;
|
||||
"__USTACK0_END"="_lc_gb_ustack0";
|
||||
|
||||
group istack0(align = 8, run_addr = mem:dsram0[LCF_ISTACK0_OFFSET])
|
||||
{
|
||||
stack "istack_tc0" (size = LCF_ISTACK0_SIZE);
|
||||
}
|
||||
"__ISTACK0":= sizeof(group:istack0) > 0 ? "_lc_ue_istack_tc0" : 0;
|
||||
"__ISTACK0_END"="_lc_gb_istack0";
|
||||
|
||||
group (align = 64, attributes=rw, run_addr=mem:dsram0[LCF_CSA0_OFFSET])
|
||||
reserved "csa_tc0" (size = LCF_CSA0_SIZE);
|
||||
"__CSA0":= "_lc_ub_csa_tc0";
|
||||
"__CSA0_END":= "_lc_ue_csa_tc0";
|
||||
}
|
||||
|
||||
/*Fixed memory Allocations for _START*/
|
||||
group (ordered)
|
||||
{
|
||||
group reset (run_addr=RESET)
|
||||
{
|
||||
section "reset" ( size = 0x20, fill = 0x0800, attributes = r )
|
||||
{
|
||||
select ".text.start";
|
||||
}
|
||||
}
|
||||
group interface_const (run_addr=mem:pfls0[0x0020])
|
||||
{
|
||||
select "*.interface_const";
|
||||
}
|
||||
"__IF_CONST" := addressof(group:interface_const);
|
||||
"__START0" := LCF_STARTPTR_NC_CPU0;
|
||||
"__START1" := LCF_STARTPTR_NC_CPU1;
|
||||
"__START2" := LCF_STARTPTR_NC_CPU2;
|
||||
}
|
||||
|
||||
/*Fixed memory Allocations for Trap Vector Table*/
|
||||
group (ordered)
|
||||
{
|
||||
group trapvec_tc0 (align = 8, run_addr=LCF_TRAPVEC0_START)
|
||||
{
|
||||
section "trapvec_tc0" (size=0x100, attributes=rx, fill=0)
|
||||
{
|
||||
select "(.text.traptab_cpu0*)";
|
||||
}
|
||||
}
|
||||
group trapvec_tc1 (align = 8, run_addr=LCF_TRAPVEC1_START)
|
||||
{
|
||||
section "trapvec_tc1" (size=0x100, attributes=rx, fill=0)
|
||||
{
|
||||
select "(.text.traptab_cpu1*)";
|
||||
}
|
||||
}
|
||||
group trapvec_tc2 (align = 8, run_addr=LCF_TRAPVEC2_START)
|
||||
{
|
||||
section "trapvec_tc2" (size=0x100, attributes=rx, fill=0)
|
||||
{
|
||||
select "(.text.traptab_cpu2*)";
|
||||
}
|
||||
}
|
||||
"__TRAPTAB_CPU0" := TRAPTAB0;
|
||||
"__TRAPTAB_CPU1" := TRAPTAB1;
|
||||
"__TRAPTAB_CPU2" := TRAPTAB2;
|
||||
}
|
||||
|
||||
/*Fixed memory Allocations for Start up code*/
|
||||
group (ordered)
|
||||
{
|
||||
group start_tc0 (run_addr=LCF_STARTPTR_NC_CPU0)
|
||||
{
|
||||
select "(.text.start_cpu0*)";
|
||||
}
|
||||
group start_tc1 (run_addr=LCF_STARTPTR_NC_CPU1)
|
||||
{
|
||||
section "start_tc1" (size=0x20, attributes=rx, fill=0)
|
||||
{
|
||||
select "(.text.start_cpu1*)";
|
||||
}
|
||||
}
|
||||
group start_tc2 (run_addr=LCF_STARTPTR_NC_CPU2)
|
||||
{
|
||||
select "(.text.start_cpu2*)";
|
||||
}
|
||||
"__ENABLE_INDIVIDUAL_C_INIT_CPU0" := 0; /* Not used */
|
||||
"__ENABLE_INDIVIDUAL_C_INIT_CPU1" := 0;
|
||||
"__ENABLE_INDIVIDUAL_C_INIT_CPU2" := 0;
|
||||
}
|
||||
|
||||
/*Fixed memory Allocations for Interrupt Vector Table*/
|
||||
group (ordered)
|
||||
{
|
||||
group int_tab_tc0 (ordered)
|
||||
{
|
||||
# include "inttab0.lsl"
|
||||
}
|
||||
group int_tab_tc1 (ordered)
|
||||
{
|
||||
# include "inttab1.lsl"
|
||||
}
|
||||
group int_tab_tc2 (ordered)
|
||||
{
|
||||
# include "inttab2.lsl"
|
||||
}
|
||||
"_lc_u_int_tab" = (LCF_INTVEC0_START);
|
||||
"__INTTAB_CPU0" = (LCF_INTVEC0_START);
|
||||
"__INTTAB_CPU1" = (LCF_INTVEC1_START);
|
||||
"__INTTAB_CPU2" = (LCF_INTVEC2_START);
|
||||
}
|
||||
|
||||
/*Fixed memory Allocations for BMHD*/
|
||||
group (ordered)
|
||||
{
|
||||
group bmh_0_orig (run_addr=mem:ucb[0x0000])
|
||||
{
|
||||
select ".rodata.bmhd_0_orig";
|
||||
}
|
||||
group bmh_1_orig (run_addr=mem:ucb[0x0200])
|
||||
{
|
||||
select ".rodata.bmhd_1_orig";
|
||||
}
|
||||
group bmh_2_orig (run_addr=mem:ucb[0x0400])
|
||||
{
|
||||
select ".rodata.bmhd_2_orig";
|
||||
}
|
||||
group bmh_3_orig (run_addr=mem:ucb[0x0600])
|
||||
{
|
||||
select ".rodata.bmhd_3_orig";
|
||||
}
|
||||
group bmh_blank (run_addr=mem:ucb[0x0800])
|
||||
{
|
||||
}
|
||||
group bmh_0_copy (run_addr=mem:ucb[0x1000])
|
||||
{
|
||||
select ".rodata.bmhd_0_copy";
|
||||
}
|
||||
group bmh_1_copy (run_addr=mem:ucb[0x1200])
|
||||
{
|
||||
select ".rodata.bmhd_1_copy";
|
||||
}
|
||||
group bmh_2_copy (run_addr=mem:ucb[0x1400])
|
||||
{
|
||||
select ".rodata.bmhd_2_copy";
|
||||
}
|
||||
group bmh_3_copy (run_addr=mem:ucb[0x1600])
|
||||
{
|
||||
select ".rodata.bmhd_3_copy";
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*Near Abbsolute Addressable Data Sections*/
|
||||
section_layout :vtc:abs18
|
||||
{
|
||||
/*Near Absolute Data, selectable with patterns and user defined sections*/
|
||||
group
|
||||
{
|
||||
group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram2)
|
||||
{
|
||||
select "(.zdata.zdata_cpu2|.zdata.zdata_cpu2.*)";
|
||||
select "(.zbss.zbss_cpu2|.zbss.zbss_cpu2.*)";
|
||||
}
|
||||
|
||||
group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram1)
|
||||
{
|
||||
select "(.zdata.zdata_cpu1|.zdata.zdata_cpu1.*)";
|
||||
select "(.zbss.zbss_cpu1|.zbss.zbss_cpu1.*)";
|
||||
}
|
||||
|
||||
group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram0)
|
||||
{
|
||||
select "(.zdata.zdata_cpu0|.zdata.zdata_cpu0.*)";
|
||||
select "(.zbss.zbss_cpu0|.zbss.zbss_cpu0.*)";
|
||||
}
|
||||
|
||||
group (ordered, attributes=rw, run_addr = mem:cpu0_dlmu)
|
||||
{
|
||||
select "(.zdata.zlmudata|.zdata.zlmudata.*)";
|
||||
select "(.zbss.zlmubss|.zbss.zlmubss.*)";
|
||||
}
|
||||
}
|
||||
|
||||
/*Near Absolute Data, selectable by toolchain*/
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU2
|
||||
group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram2)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU1
|
||||
group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU0
|
||||
group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram0)
|
||||
# endif
|
||||
{
|
||||
group zdata_mcal(attributes=rw)
|
||||
{
|
||||
select ".zdata.dsprInit.cpu0.32bit";
|
||||
select ".zdata.dsprInit.cpu0.16bit";
|
||||
select ".zdata.dsprInit.cpu0.8bit";
|
||||
}
|
||||
|
||||
group zdata_powerOn(attributes=rw)
|
||||
{
|
||||
select ".zdata.dsprPowerOnInit.cpu0.32bit";
|
||||
select ".zdata.dsprPowerOnInit.cpu0.16bit";
|
||||
select ".zdata.dsprPowerOnInit.cpu0.8bit";
|
||||
}
|
||||
|
||||
group zbss_mcal(attributes=rw)
|
||||
{
|
||||
select ".zbss.dsprClearOnInit.cpu0.32bit";
|
||||
select ".zbss.dsprClearOnInit.cpu0.16bit";
|
||||
select ".zbss.dsprClearOnInit.cpu0.8bit";
|
||||
}
|
||||
|
||||
group zbss_noClear(attributes=rw)
|
||||
{
|
||||
select ".zbss.dsprNoInit.cpu0.32bit";
|
||||
select ".zbss.dsprNoInit.cpu0.16bit";
|
||||
select ".zbss.dsprNoInit.cpu0.8bit";
|
||||
}
|
||||
|
||||
group zbss_powerOn(attributes=rw)
|
||||
{
|
||||
select ".zbss.dsprPowerOnClear.cpu0.32bit";
|
||||
select ".zbss.dsprPowerOnClear.cpu0.16bit";
|
||||
select ".zbss.dsprPowerOnClear.cpu0.8bit";
|
||||
}
|
||||
|
||||
group zdata(attributes=rw)
|
||||
{
|
||||
select "(.zdata|.zdata.*)";
|
||||
select "(.zbss|.zbss.*)";
|
||||
}
|
||||
}
|
||||
|
||||
/*Near Absolute Const, selectable with patterns and user defined sections*/
|
||||
group
|
||||
{
|
||||
group (ordered, align = 4, contiguous, run_addr=mem:pfls0)
|
||||
{
|
||||
select ".zrodata.Ifx_Ssw_Tc0.*";
|
||||
select ".zrodata.Ifx_Ssw_Tc1.*";
|
||||
select ".zrodata.Ifx_Ssw_Tc2.*";
|
||||
select ".zrodata.Cpu0_Main.*";
|
||||
select ".zrodata.Cpu1_Main.*";
|
||||
select ".zrodata.Cpu2_Main.*";
|
||||
|
||||
/*Near Absolute Const, selectable by toolchain*/
|
||||
select ".zrodata.const.cpu0.32bit";
|
||||
select ".zrodata.const.cpu0.16bit";
|
||||
select ".zrodata.const.cpu0.8bit";
|
||||
select ".zrodata.config.cpu0.32bit";
|
||||
select ".zrodata.config.cpu0.16bit";
|
||||
select ".zrodata.config.cpu0.8bit";
|
||||
select "(.zrodata|.zrodata.*)";
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*Relative A0/A1/A8/A9 Addressable Sections*/
|
||||
section_layout :vtc:linear
|
||||
{
|
||||
/*Relative A0 Addressable Data, selectable by toolchain*/
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU2
|
||||
group a0 (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram2)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU1
|
||||
group a0 (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU0
|
||||
group a0 (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram0)
|
||||
# endif
|
||||
{
|
||||
select "(.data_a0.sdata|.data_a0.sdata.*)";
|
||||
select "(.bss_a0.sbss|.bss_a0.sbss.*)";
|
||||
}
|
||||
"_SMALL_DATA_" := sizeof(group:a0) > 0 ? addressof(group:a0) : addressof(group:a0) & 0xF0000000 + 32k;
|
||||
"__A0_MEM" = "_SMALL_DATA_";
|
||||
|
||||
/*Relative A1 Addressable Const, selectable by toolchain*/
|
||||
/*Small constant sections, No option given for CPU specific user sections to make generated code portable across Cpus*/
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU2
|
||||
group a1 (ordered, align = 4, run_addr=mem:pfls1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU1
|
||||
group a1 (ordered, align = 4, run_addr=mem:pfls1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU0
|
||||
group a1 (ordered, align = 4, run_addr=mem:pfls0)
|
||||
# endif
|
||||
{
|
||||
select "(.rodata_a1.srodata|.rodata_a1.srodata.*)";
|
||||
select "(.ldata|.ldata.*)";
|
||||
}
|
||||
"_LITERAL_DATA_" := sizeof(group:a1) > 0 ? addressof(group:a1) : addressof(group:a1) & 0xF0000000 + 32k;
|
||||
"__A1_MEM" = "_LITERAL_DATA_";
|
||||
|
||||
/*Relative A9 Addressable Data, selectable with patterns and user defined sections*/
|
||||
group a9 (ordered, align = 4, run_addr=mem:cpu0_dlmu)
|
||||
{
|
||||
select "(.data_a9.a9sdata|.data_a9.a9sdata.*)";
|
||||
select "(.bss_a9.a9sbss|.bss_a9.a9sbss.*)";
|
||||
}
|
||||
"_A9_DATA_" := sizeof(group:a9) > 0 ? addressof(group:a9) : addressof(group:a9) & 0xF0000000 + 32k;
|
||||
"__A9_MEM" = "_A9_DATA_";
|
||||
|
||||
/*Relative A8 Addressable Const, selectable with patterns and user defined sections*/
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU2
|
||||
group a8 (ordered, align = 4, run_addr=mem:pfls1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU1
|
||||
group a8 (ordered, align = 4, run_addr=mem:pfls1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU0
|
||||
group a8 (ordered, align = 4, run_addr=mem:pfls0)
|
||||
# endif
|
||||
{
|
||||
select "(.rodata_a8.a8srodata|.rodata_a8.a8srodata.*)";
|
||||
}
|
||||
"_A8_DATA_" := sizeof(group:a8) > 0 ? addressof(group:a8) : addressof(group:a8) & 0xF0000000 + 32k;
|
||||
"__A8_MEM" = "_A8_DATA_";
|
||||
}
|
||||
|
||||
/*Far Data / Far Const Sections, selectable with patterns and user defined sections*/
|
||||
section_layout :vtc:linear
|
||||
{
|
||||
/*Far Data Sections, selectable with patterns and user defined sections*/
|
||||
group
|
||||
{
|
||||
/*DSRAM sections*/
|
||||
group
|
||||
{
|
||||
group (ordered, attributes=rw, run_addr=mem:dsram2)
|
||||
{
|
||||
select ".data.Ifx_Ssw_Tc2.*";
|
||||
select ".data.Cpu2_Main.*";
|
||||
select "(.data.data_cpu2|.data.data_cpu2.*)";
|
||||
select ".bss.Ifx_Ssw_Tc2.*";
|
||||
select ".bss.Cpu2_Main.*";
|
||||
select "(.bss.bss_cpu2|.bss.bss_cpu2.*)";
|
||||
}
|
||||
group (ordered, attributes=rw, run_addr=mem:dsram1)
|
||||
{
|
||||
select ".data.Ifx_Ssw_Tc1.*";
|
||||
select ".data.Cpu1_Main.*";
|
||||
select "(.data.data_cpu1|.data.data_cpu1.*)";
|
||||
select ".bss.Ifx_Ssw_Tc1.*";
|
||||
select ".bss.Cpu1_Main.*";
|
||||
select "(.bss.bss_cpu1|.bss.bss_cpu1.*)";
|
||||
}
|
||||
group (ordered, attributes=rw, run_addr=mem:dsram0)
|
||||
{
|
||||
select ".data.Ifx_Ssw_Tc0.*";
|
||||
select ".data.Cpu0_Main.*";
|
||||
select "(.data.data_cpu0|.data.data_cpu0.*)";
|
||||
select ".bss.Ifx_Ssw_Tc0.*";
|
||||
select ".bss.Cpu0_Main.*";
|
||||
select "(.bss.bss_cpu0|.bss.bss_cpu0.*)";
|
||||
}
|
||||
}
|
||||
|
||||
/*LMU Data sections*/
|
||||
group
|
||||
{
|
||||
group (ordered, attributes=rw, run_addr = mem:cpu0_dlmu)
|
||||
{
|
||||
select "(.data.lmudata_cpu0|.data.lmudata_cpu0.*)";
|
||||
select "(.bss.lmubss_cpu0|.bss.lmubss_cpu0.*)";
|
||||
select "(.data.lmudata|.data.lmudata.*)";
|
||||
select "(.bss.lmubss|.bss.lmubss.*)";
|
||||
}
|
||||
group (ordered, attributes=rw, run_addr = mem:cpu1_dlmu)
|
||||
{
|
||||
select "(.data.lmudata_cpu1|.data.lmudata_cpu1.*)";
|
||||
select "(.bss.lmubss_cpu1|.bss.lmubss_cpu1.*)";
|
||||
}
|
||||
group (ordered, attributes=rw, run_addr = mem:cpu2_dlmu)
|
||||
{
|
||||
select "(.data.lmudata_cpu2|.data.lmudata_cpu2.*)";
|
||||
select "(.bss.lmubss_cpu2|.bss.lmubss_cpu2.*)";
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*Far Data Sections, selectable by toolchain*/
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU2
|
||||
group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram2)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU1
|
||||
group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU0
|
||||
group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram0)
|
||||
# endif
|
||||
{
|
||||
group data_mcal(attributes=rw)
|
||||
{
|
||||
select ".data.farDsprInit.cpu0.32bit";
|
||||
select ".data.farDsprInit.cpu0.16bit";
|
||||
select ".data.farDsprInit.cpu0.8bit";
|
||||
}
|
||||
|
||||
group bss_mcal(attributes=rw)
|
||||
{
|
||||
select ".bss.farDsprClearOnInit.cpu0.32bit";
|
||||
select ".bss.farDsprClearOnInit.cpu0.16bit";
|
||||
select ".bss.farDsprClearOnInit.cpu0.8bit";
|
||||
}
|
||||
|
||||
group bss_noInit(attributes=rw)
|
||||
{
|
||||
select ".bss.farDsprNoInit.cpu0.32bit";
|
||||
select ".bss.farDsprNoInit.cpu0.16bit";
|
||||
select ".bss.farDsprNoInit.cpu0.8bit";
|
||||
}
|
||||
|
||||
group data(attributes=rw)
|
||||
{
|
||||
select "(.data|.data.*)";
|
||||
select "(.bss|.bss.*)";
|
||||
}
|
||||
}
|
||||
|
||||
/*Heap allocation*/
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU2
|
||||
group (ordered, align = 4, run_addr = mem:dsram2[LCF_HEAP2_OFFSET])
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU1
|
||||
group (ordered, align = 4, run_addr = mem:dsram1[LCF_HEAP1_OFFSET])
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU0
|
||||
group (ordered, align = 4, run_addr = mem:dsram0[LCF_HEAP0_OFFSET])
|
||||
# endif
|
||||
{
|
||||
heap "heap" (size = LCF_HEAP_SIZE);
|
||||
}
|
||||
|
||||
/*Far Const Sections, selectable with patterns and user defined sections*/
|
||||
group
|
||||
{
|
||||
group (ordered, align = 4, run_addr=mem:pfls0)
|
||||
{
|
||||
select ".rodata.Ifx_Ssw_Tc0.*";
|
||||
select ".rodata.Cpu0_Main.*";
|
||||
select "(.rodata.rodata_cpu0|.rodata.rodata_cpu0.*)";
|
||||
}
|
||||
group (ordered, align = 4, run_addr=mem:pfls1)
|
||||
{
|
||||
select ".rodata.Cpu1_Main.*";
|
||||
select ".rodata.Ifx_Ssw_Tc1.*";
|
||||
select "(.rodata.rodata_cpu1|.rodata.rodata_cpu1.*)";
|
||||
}
|
||||
group (ordered, align = 4, run_addr=mem:pfls1)
|
||||
{
|
||||
select ".rodata.Ifx_Ssw_Tc2.*";
|
||||
select ".rodata.Cpu2_Main.*";
|
||||
select "(.rodata.rodata_cpu2|.rodata.rodata_cpu2.*)";
|
||||
}
|
||||
}
|
||||
|
||||
/*Far Const Sections, selectable by toolchain*/
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU2
|
||||
group (ordered, align = 4, run_addr=mem:pfls1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU1
|
||||
group (ordered, align = 4, run_addr=mem:pfls1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU0
|
||||
group (ordered, align = 4, run_addr=mem:pfls0)
|
||||
# endif
|
||||
{
|
||||
select ".rodata.farConst.cpu0.32bit";
|
||||
select ".rodata.farConst.cpu0.16bit";
|
||||
select ".rodata.farConst.cpu0.8bit";
|
||||
select "(.rodata|.rodata.*)";
|
||||
}
|
||||
}
|
||||
|
||||
/* PSRAM Code selections*/
|
||||
section_layout :vtc:linear
|
||||
{
|
||||
/*Code Sections, selectable with patterns and user defined sections*/
|
||||
group
|
||||
{
|
||||
/*Program Scratchpad Sections*/
|
||||
group
|
||||
{
|
||||
group code_psram0 (ordered, attributes=rwx, copy, run_addr=mem:psram0)
|
||||
{
|
||||
select "(.text.cpu0_psram|.text.cpu0_psram.*)";
|
||||
select "(.text.psram_text_cpu0|.text.psram_text_cpu0.*)";
|
||||
}
|
||||
group code_psram1 (ordered, attributes=rwx, copy, run_addr=mem:psram1)
|
||||
{
|
||||
select "(.text.cpu1_psram|.text.cpu1_psram.*)";
|
||||
select "(.text.psram_text_cpu1|.text.psram_text_cpu1.*)";
|
||||
}
|
||||
group code_psram2 (ordered, attributes=rwx, copy, run_addr=mem:psram2)
|
||||
{
|
||||
select "(.text.cpu2_psram|.text.cpu2_psram.*)";
|
||||
select "(.text.psram_text_cpu2|.text.psram_text_cpu2.*)";
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* FLS Code selections*/
|
||||
section_layout :vtc:linear
|
||||
{
|
||||
/*Code Sections, selectable with patterns and user defined sections*/
|
||||
group
|
||||
{
|
||||
/*Cpu specific PFLASH Sections*/
|
||||
group
|
||||
{
|
||||
group (ordered, align = 4, run_addr=mem:pfls0)
|
||||
{
|
||||
select ".text.Ifx_Ssw_Tc0.*";
|
||||
select ".text.Cpu0_Main.*";
|
||||
select ".text.CompilerTasking.Ifx_C_Init";
|
||||
select "(.text.text_cpu0|.text.text_cpu0.*)";
|
||||
}
|
||||
group (ordered, align = 4, run_addr=mem:pfls1)
|
||||
{
|
||||
select ".text.Ifx_Ssw_Tc1.*";
|
||||
select ".text.Cpu1_Main.*";
|
||||
select "(.text.text_cpu1|.text.text_cpu1.*)";
|
||||
}
|
||||
group (ordered, align = 4, run_addr=mem:pfls1)
|
||||
{
|
||||
select ".text.Ifx_Ssw_Tc2.*";
|
||||
select ".text.Cpu2_Main.*";
|
||||
select "(.text.text_cpu2|.text.text_cpu2.*)";
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*Code Sections, selectable by toolchain*/
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU2
|
||||
group (ordered, run_addr=mem:pfls1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU1
|
||||
group (ordered, run_addr=mem:pfls1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU0
|
||||
group (ordered, run_addr=mem:pfls0)
|
||||
# endif
|
||||
{
|
||||
select ".text.fast.pfls.cpu0";
|
||||
select ".text.slow.pfls.cpu0";
|
||||
select ".text.5ms.pfls.cpu0";
|
||||
select ".text.10ms.pfls.cpu0";
|
||||
select ".text.callout.pfls.cpu0";
|
||||
select "(.text|.text.*)";
|
||||
}
|
||||
}
|
||||
}
|
||||
File diff suppressed because one or more lines are too long
|
|
@ -0,0 +1,99 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>wolfBoot-tc3xx-wolfHSM</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>com.infineon.aurix.buildsystem.builders.booster</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>com.infineon.aurix.buildsystem.builders.autodiscovery</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>com.infineon.aurix.buildsystem.aurixnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
</natures>
|
||||
<linkedResources>
|
||||
<link>
|
||||
<name>Configurations</name>
|
||||
<type>2</type>
|
||||
<locationURI>SDK_CONFIGURATION_DIR</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>Libraries</name>
|
||||
<type>2</type>
|
||||
<locationURI>SDK_DIR</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>wolfBoot</name>
|
||||
<type>2</type>
|
||||
<locationURI>virtual:/virtual</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>wolfhsm-infineon-tc3xx</name>
|
||||
<type>2</type>
|
||||
<locationURI>WOLFHSM_TC3XX_DIR</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>wolfBoot/hal</name>
|
||||
<type>2</type>
|
||||
<locationURI>WOLFBOOT_ROOT/hal</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>wolfBoot/include</name>
|
||||
<type>2</type>
|
||||
<locationURI>WOLFBOOT_ROOT/include</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>wolfBoot/src</name>
|
||||
<type>2</type>
|
||||
<locationURI>WOLFBOOT_ROOT/src</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>wolfBoot/wolfssl</name>
|
||||
<type>2</type>
|
||||
<locationURI>WOLFBOOT_ROOT/lib/wolfssl</locationURI>
|
||||
</link>
|
||||
</linkedResources>
|
||||
<variableList>
|
||||
<variable>
|
||||
<name>SDK_CONFIGURATION_DIR</name>
|
||||
<value>$%7BPARENT-1-PROJECT_LOC%7D/Configurations</value>
|
||||
</variable>
|
||||
<variable>
|
||||
<name>SDK_DIR</name>
|
||||
<value>$%7BPARENT-1-PROJECT_LOC%7D/SDK</value>
|
||||
</variable>
|
||||
<variable>
|
||||
<name>WOLFBOOT_ROOT</name>
|
||||
<value>$%7BPARENT-3-PROJECT_LOC%7D</value>
|
||||
</variable>
|
||||
<variable>
|
||||
<name>WOLFHSM_TC3XX_DIR</name>
|
||||
<value>$%7BPARENT-1-PROJECT_LOC%7D/wolfHSM-infineon-tc3xx</value>
|
||||
</variable>
|
||||
</variableList>
|
||||
</projectDescription>
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
/* Cpu0_Main.c
|
||||
*
|
||||
* Copyright (C) 2014-2024 wolfSSL Inc.
|
||||
*
|
||||
* This file is part of wolfBoot.
|
||||
*
|
||||
* wolfBoot is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* wolfBoot is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with wolfBoot. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#include "IfxCpu.h"
|
||||
#include "IfxScuWdt.h"
|
||||
#include "Ifx_Types.h"
|
||||
|
||||
IFX_ALIGN(4) IfxCpu_syncEvent g_cpuSyncEvent = 0;
|
||||
|
||||
extern void loader_main(void);
|
||||
|
||||
void core0_main(void)
|
||||
{
|
||||
IfxCpu_enableInterrupts();
|
||||
|
||||
/* !!WATCHDOG0 AND SAFETY WATCHDOG ARE DISABLED HERE!!
|
||||
* Enable the watchdogs and service them periodically if it is required
|
||||
*/
|
||||
IfxScuWdt_disableCpuWatchdog(IfxScuWdt_getCpuWatchdogPassword());
|
||||
IfxScuWdt_disableSafetyWatchdog(IfxScuWdt_getSafetyWatchdogPassword());
|
||||
|
||||
/* Wait for CPU sync event */
|
||||
IfxCpu_emitEvent(&g_cpuSyncEvent);
|
||||
IfxCpu_waitEvent(&g_cpuSyncEvent, 1);
|
||||
|
||||
/* invoke wolfBoot */
|
||||
loader_main();
|
||||
|
||||
while (1) {
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,42 @@
|
|||
/* Cpu1_Main.c
|
||||
*
|
||||
* Copyright (C) 2014-2024 wolfSSL Inc.
|
||||
*
|
||||
* This file is part of wolfBoot.
|
||||
*
|
||||
* wolfBoot is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* wolfBoot is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with wolfBoot. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#include "Ifx_Types.h"
|
||||
#include "IfxCpu.h"
|
||||
#include "IfxScuWdt.h"
|
||||
|
||||
extern IfxCpu_syncEvent g_cpuSyncEvent;
|
||||
|
||||
void core1_main(void)
|
||||
{
|
||||
IfxCpu_enableInterrupts();
|
||||
|
||||
/* !!WATCHDOG1 IS DISABLED HERE!!
|
||||
* Enable the watchdog and service it periodically if it is required
|
||||
*/
|
||||
IfxScuWdt_disableCpuWatchdog(IfxScuWdt_getCpuWatchdogPassword());
|
||||
|
||||
/* Wait for CPU sync event */
|
||||
IfxCpu_emitEvent(&g_cpuSyncEvent);
|
||||
IfxCpu_waitEvent(&g_cpuSyncEvent, 1);
|
||||
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,42 @@
|
|||
/* Cpu2_Main.c
|
||||
*
|
||||
* Copyright (C) 2014-2024 wolfSSL Inc.
|
||||
*
|
||||
* This file is part of wolfBoot.
|
||||
*
|
||||
* wolfBoot is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* wolfBoot is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with wolfBoot. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#include "Ifx_Types.h"
|
||||
#include "IfxCpu.h"
|
||||
#include "IfxScuWdt.h"
|
||||
|
||||
extern IfxCpu_syncEvent g_cpuSyncEvent;
|
||||
|
||||
void core2_main(void)
|
||||
{
|
||||
IfxCpu_enableInterrupts();
|
||||
|
||||
/* !!WATCHDOG2 IS DISABLED HERE!!
|
||||
* Enable the watchdog and service it periodically if it is required
|
||||
*/
|
||||
IfxScuWdt_disableCpuWatchdog(IfxScuWdt_getCpuWatchdogPassword());
|
||||
|
||||
/* Wait for CPU sync event */
|
||||
IfxCpu_emitEvent(&g_cpuSyncEvent);
|
||||
IfxCpu_waitEvent(&g_cpuSyncEvent, 1);
|
||||
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,30 @@
|
|||
/*
|
||||
* Copyright (C) 2014-2024 wolfSSL Inc.
|
||||
*
|
||||
* This file is part of wolfBoot.
|
||||
*
|
||||
* wolfBoot is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* wolfBoot is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with wolfBoot. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
/*
|
||||
* wolfhsm_cfg.h
|
||||
*
|
||||
* wolfHSM compile-time options. Override here for your application
|
||||
*/
|
||||
|
||||
#ifndef WOLFHSM_CFG_H_
|
||||
#define WOLFHSM_CFG_H_
|
||||
|
||||
#define WOLFHSM_CFG_DMA
|
||||
|
||||
#endif /* WOLFHSM_CFG_H_ */
|
||||
File diff suppressed because one or more lines are too long
|
|
@ -21,7 +21,7 @@
|
|||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider class="com.infineon.aurix.buildsystem.managed.gcc.AURIXGCC11BuiltinSpecsDetector" console="false" env-hash="20899676975013635" id="com.infineon.aurix.buildsystem.managed.CrossGCC11BuiltinSpecsDetector" keep-relative-paths="false" name="AURIXCrossGCC11compilerSpecsDetector" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<provider class="com.infineon.aurix.buildsystem.managed.gcc.AURIXGCC11BuiltinSpecsDetector" console="false" env-hash="478447636549809998" id="com.infineon.aurix.buildsystem.managed.CrossGCC11BuiltinSpecsDetector" keep-relative-paths="false" name="AURIXCrossGCC11compilerSpecsDetector" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
|
|
@ -32,7 +32,7 @@
|
|||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider class="com.infineon.aurix.buildsystem.managed.gcc.AURIXGCC11BuiltinSpecsDetector" console="false" env-hash="20899676975013635" id="com.infineon.aurix.buildsystem.managed.CrossGCC11BuiltinSpecsDetector" keep-relative-paths="false" name="AURIXCrossGCC11compilerSpecsDetector" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<provider class="com.infineon.aurix.buildsystem.managed.gcc.AURIXGCC11BuiltinSpecsDetector" console="false" env-hash="478447636549809998" id="com.infineon.aurix.buildsystem.managed.CrossGCC11BuiltinSpecsDetector" keep-relative-paths="false" name="AURIXCrossGCC11compilerSpecsDetector" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@ ENTRY(_START)
|
|||
__TRICORE_DERIVATE_MEMORY_MAP__ = 0x380;
|
||||
|
||||
LCF_CSA0_SIZE = 8k;
|
||||
LCF_USTACK0_SIZE = 2k;
|
||||
LCF_USTACK0_SIZE = 20k;
|
||||
LCF_ISTACK0_SIZE = 1k;
|
||||
|
||||
LCF_CSA1_SIZE = 8k;
|
||||
|
|
@ -35,7 +35,7 @@ LCF_CSA2_SIZE = 8k;
|
|||
LCF_USTACK2_SIZE = 2k;
|
||||
LCF_ISTACK2_SIZE = 1k;
|
||||
|
||||
LCF_HEAP_SIZE = 4k;
|
||||
LCF_HEAP_SIZE = 40k;
|
||||
|
||||
LCF_DSPR2_START = 0x50000000;
|
||||
LCF_DSPR2_SIZE = 96k;
|
||||
|
|
@ -62,28 +62,42 @@ LCF_HEAP0_OFFSET = (LCF_USTACK0_OFFSET - LCF_HEAP_SIZE);
|
|||
LCF_HEAP1_OFFSET = (LCF_USTACK1_OFFSET - LCF_HEAP_SIZE);
|
||||
LCF_HEAP2_OFFSET = (LCF_USTACK2_OFFSET - LCF_HEAP_SIZE);
|
||||
|
||||
LCF_INTVEC0_START = 0x80000400;
|
||||
LCF_INTVEC1_START = 0x80002400;
|
||||
LCF_INTVEC2_START = 0x80004400;
|
||||
|
||||
LCF_CODE_BASE_ADDR = 0xA00A0000;
|
||||
|
||||
LCF_START_CODE_SIZE = 0x20; /* space reserved for .start sections (per-cpu) */
|
||||
LCF_TRAPVEC_OFFSET = 0x100; /* size/alignment of trap table (also offset from base to first trap table) */
|
||||
|
||||
LCF_STARTPTR_NC_CPU0 = LCF_CODE_BASE_ADDR;
|
||||
LCF_STARTPTR_NC_CPU1 = LCF_STARTPTR_NC_CPU0 + LCF_START_CODE_SIZE;
|
||||
LCF_STARTPTR_NC_CPU2 = LCF_STARTPTR_NC_CPU1 + LCF_START_CODE_SIZE;
|
||||
|
||||
/* Offset of the trap table from start address (accounts for size of .start section) */
|
||||
LCF_TRAPVEC0_START = (LCF_STARTPTR_NC_CPU0 + LCF_TRAPVEC_OFFSET); /* 0xA0000100 */
|
||||
LCF_TRAPVEC1_START = (LCF_TRAPVEC0_START + LCF_TRAPVEC_OFFSET); /* 0xA0000200 */
|
||||
LCF_TRAPVEC2_START = (LCF_TRAPVEC1_START + LCF_TRAPVEC_OFFSET); /* 0xA0000300 */
|
||||
|
||||
LCF_INTVEC_SIZE = 0x2000; /* 8k */
|
||||
/* Intvec start address must be 8k aligned due to sw isr constraints. See comment at IfxCpu_Irq.c:110.
|
||||
* Make sure this leaves enough space for trap tables */
|
||||
LCF_INTVEC0_START = (LCF_STARTPTR_NC_CPU0 + LCF_INTVEC_SIZE); /* 0xA00A2000; */
|
||||
LCF_INTVEC1_START = (LCF_INTVEC0_START + LCF_INTVEC_SIZE); /* 0xA00A4000; */
|
||||
LCF_INTVEC2_START = (LCF_INTVEC1_START + LCF_INTVEC_SIZE); /* 0xA00A6000; */
|
||||
/* TODO: We end up reserving 32K for the startup memory section due to wanting a contiguous region of memory
|
||||
* but also satisfying the address alignment requirement by infineon SDK for SW controlled interrupts. This is
|
||||
* a lot of wasted space. See if we can be smarter about this */
|
||||
|
||||
__INTTAB_CPU0 = LCF_INTVEC0_START;
|
||||
__INTTAB_CPU1 = LCF_INTVEC1_START;
|
||||
__INTTAB_CPU2 = LCF_INTVEC2_START;
|
||||
|
||||
LCF_TRAPVEC0_START = 0x80000100;
|
||||
LCF_TRAPVEC1_START = 0x80000200;
|
||||
LCF_TRAPVEC2_START = 0x80000300;
|
||||
|
||||
LCF_STARTPTR_CPU0 = 0x80000000;
|
||||
LCF_STARTPTR_CPU1 = 0x80006400; /* after last intvec */
|
||||
LCF_STARTPTR_CPU2 = 0x80006420;
|
||||
|
||||
LCF_STARTPTR_NC_CPU0 = 0xA0000000;
|
||||
LCF_STARTPTR_NC_CPU1 = 0xA0006400; /* after last intvec */
|
||||
LCF_STARTPTR_NC_CPU2 = 0xA0006420;
|
||||
|
||||
RESET = LCF_STARTPTR_NC_CPU0;
|
||||
|
||||
/* Size (bytes) of HSM shared memory buffer */
|
||||
HSM_SHM_BUF_SIZE = 4096;
|
||||
/* Size (bytes) of a HSM shared cancel sequence number */
|
||||
HSM_SHM_CANCEL_SEQ_SIZE = 4;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
dsram2_local (w!xp): org = 0xd0000000, len = 96K
|
||||
|
|
@ -94,23 +108,31 @@ MEMORY
|
|||
dsram1 (w!xp): org = 0x60000000, len = 240K
|
||||
psram1 (w!xp): org = 0x60100000, len = 64K
|
||||
|
||||
dsram0_local (w!xp): org = 0xd0000000, len = 240K
|
||||
dsram0 (w!xp): org = 0x70000000, len = 240K
|
||||
psram0 (w!xp): org = 0x70100000, len = 64K
|
||||
/* HSM shared memory buffers */
|
||||
dsram_hsm_shm (rw!p): org = 0x70000000, len = 16K
|
||||
|
||||
dsram0_local (w!xp): org = 0xd0004000, len = 224K
|
||||
dsram0 (w!xp): org = 0x70004000, len = 224K
|
||||
psram0 (w!xp): org = 0x70100000, len = 64K
|
||||
|
||||
psram_local (w!xp): org = 0xc0000000, len = 64K
|
||||
|
||||
pfls0 (rx!p): org = 0x80000000, len = 128K /* 0x2_0000 : wolfBoot */
|
||||
pfls0_nc (rx!p): org = 0xa0000000, len = 128K /* 0x2_0000 : wolfBoot */
|
||||
pfls0_swap (rwx!p): org = 0x80020000, len = 16K /* 0x4_000 : Swap sector */
|
||||
/* Separate region for .start, IVTs, and Trap tables, since tricore-gcc will try
|
||||
* and place overlapping .text sections here despite fixed addresses (possible compiler bug) */
|
||||
pfls0_startup (rx!p): org = 0xA00A0000, len = 0x8000
|
||||
/* wolfBoot program code - all of this project's executable code goes here */
|
||||
pfls0_nc (rx!p): org = 0xA00A8000, len = 0x23000 /* 140K total (incl 32K for startup) */
|
||||
|
||||
/* reserved for wolfBoot BOOT partition */
|
||||
pfls1_boot (rwx!p): org = 0x80300000, len = 0x180000 /* 1.5MiB */
|
||||
pfls1_boot_nc (rwx!p): org = 0xa0300000, len = 0x180000 /* 1.5MiB */
|
||||
pfls1_boot (rwx!p): org = 0x80300000, len = 0x17E000 /* ~1.5MiB */
|
||||
pfls1_boot_nc (rwx!p): org = 0xA0300000, len = 0x17E000 /* ~1.5MiB */
|
||||
|
||||
/* reserved for wolfBoot UPDATE partition */
|
||||
pfls1_update (rwx!p): org = 0x80480000, len = 0x180000 /* 1.5MiB */
|
||||
pfls1_update_nc (rwx!p): org = 0xa0480000, len = 0x180000 /* 1.5MiB */
|
||||
pfls1_update (rwx!p): org = 0x8047E000, len = 0x17E000 /* ~1.5MiB */
|
||||
pfls1_update_nc (rwx!p): org = 0xA047E000, len = 0x17E000 /* ~1.5MiB */
|
||||
|
||||
/* SWAP sector for wolfBoot image update */
|
||||
pfls1_swap (rwx!p): org = 0x805FC000, len = 16K /* last sector of PFLASH1 */
|
||||
|
||||
dfls0 (rx!p): org = 0xaf000000, len = 256K
|
||||
|
||||
|
|
@ -131,7 +153,7 @@ REGION_MAP( CPU0 , ORIGIN(dsram0_local), LENGTH(dsram0_local), ORIGIN(dsram0))
|
|||
REGION_MAP( CPU1 , ORIGIN(dsram1_local), LENGTH(dsram1_local), ORIGIN(dsram1))
|
||||
REGION_MAP( CPU2 , ORIGIN(dsram2_local), LENGTH(dsram2_local), ORIGIN(dsram2))
|
||||
/* map cached and non cached addresses */
|
||||
REGION_MIRROR("pfls0", "pfls0_nc")
|
||||
/* REGION_MIRROR("pfls0", "pfls0_nc") */
|
||||
REGION_MIRROR("cpu0_dlmu", "cpu0_dlmu_nc")
|
||||
REGION_MIRROR("cpu1_dlmu", "cpu1_dlmu_nc")
|
||||
REGION_MIRROR("cpu2_dlmu", "cpu2_dlmu_nc")
|
||||
|
|
@ -139,7 +161,7 @@ REGION_MIRROR("cpu2_dlmu", "cpu2_dlmu_nc")
|
|||
/*Un comment one of the below statement groups to enable CpuX DMI RAM to hold global variables*/
|
||||
|
||||
REGION_ALIAS( default_ram , dsram0)
|
||||
REGION_ALIAS( default_rom , pfls0)
|
||||
REGION_ALIAS( default_rom , pfls0_nc) /* pfls0 */
|
||||
|
||||
/*
|
||||
REGION_ALIAS( default_ram , dsram1)
|
||||
|
|
@ -198,14 +220,23 @@ REGION_ALIAS( default_ram , dsram2)
|
|||
{
|
||||
PROVIDE(_start_text = .); /* needed by wolfBoot for self update when -DRAM_CODE */
|
||||
KEEP (*(.start));
|
||||
} > pfls0_nc
|
||||
.interface_const (0x80000020) : { __IF_CONST = .; KEEP (*(.interface_const)); } > pfls0
|
||||
} > pfls0_startup
|
||||
PROVIDE(__START0 = LCF_STARTPTR_NC_CPU0);
|
||||
PROVIDE(__ENABLE_INDIVIDUAL_C_INIT_CPU0 = 0); /* Not used */
|
||||
PROVIDE(__ENABLE_INDIVIDUAL_C_INIT_CPU1 = 0);
|
||||
PROVIDE(__ENABLE_INDIVIDUAL_C_INIT_CPU2 = 0);
|
||||
}
|
||||
|
||||
/*Fixed memory Allocations for _START1 to 2*/
|
||||
CORE_ID = GLOBAL ;
|
||||
SECTIONS
|
||||
{
|
||||
.start_tc1 (LCF_STARTPTR_NC_CPU1) : FLAGS(rxl) { KEEP (*(.start_cpu1)); } > pfls0_startup
|
||||
.start_tc2 (LCF_STARTPTR_NC_CPU2) : FLAGS(rxl) { KEEP (*(.start_cpu2)); } > pfls0_startup
|
||||
PROVIDE(__START1 = LCF_STARTPTR_NC_CPU1);
|
||||
PROVIDE(__START2 = LCF_STARTPTR_NC_CPU2);
|
||||
}
|
||||
|
||||
/*Fixed memory Allocations for Trap Vector Table*/
|
||||
CORE_ID = GLOBAL;
|
||||
SECTIONS
|
||||
|
|
@ -216,7 +247,7 @@ REGION_ALIAS( default_ram , dsram2)
|
|||
PROVIDE(__TRAPTAB_CPU0 = .);
|
||||
KEEP (*(.traptab_cpu0));
|
||||
PROVIDE(__TRAPTAB_CPU0_END = .);
|
||||
} > pfls0
|
||||
} > pfls0_startup /* pfls0 */
|
||||
|
||||
.traptab_tc1 (__TRAPTAB_CPU0_END) :
|
||||
{
|
||||
|
|
@ -224,7 +255,7 @@ REGION_ALIAS( default_ram , dsram2)
|
|||
PROVIDE(__TRAPTAB_CPU1 = .);
|
||||
KEEP (*(.traptab_cpu1));
|
||||
PROVIDE(__TRAPTAB_CPU1_END = .);
|
||||
} > pfls0
|
||||
} > pfls0_startup /* pfls0 */
|
||||
|
||||
.traptab_tc2 (__TRAPTAB_CPU1_END) :
|
||||
{
|
||||
|
|
@ -232,17 +263,7 @@ REGION_ALIAS( default_ram , dsram2)
|
|||
PROVIDE(__TRAPTAB_CPU2 = .);
|
||||
KEEP (*(.traptab_cpu2));
|
||||
PROVIDE(__TRAPTAB_CPU2_END = .);
|
||||
} > pfls0
|
||||
}
|
||||
|
||||
/*Fixed memory Allocations for _START1 to 2*/
|
||||
CORE_ID = GLOBAL ;
|
||||
SECTIONS
|
||||
{
|
||||
.start_tc1 (LCF_STARTPTR_NC_CPU1) : FLAGS(rxl) { KEEP (*(.start_cpu1)); } > pfls0_nc
|
||||
.start_tc2 (LCF_STARTPTR_NC_CPU2) : FLAGS(rxl) { KEEP (*(.start_cpu2)); } > pfls0_nc
|
||||
PROVIDE(__START1 = LCF_STARTPTR_NC_CPU1);
|
||||
PROVIDE(__START2 = LCF_STARTPTR_NC_CPU2);
|
||||
} > pfls0_startup /* pfls0 */
|
||||
}
|
||||
|
||||
/*Fixed memory Allocations for Interrupt Vector Table*/
|
||||
|
|
@ -1056,7 +1077,7 @@ REGION_ALIAS( default_ram , dsram2)
|
|||
*(.zdata_cpu2)
|
||||
*(.zdata_cpu2.*)
|
||||
. = ALIGN(2);
|
||||
} > dsram2 AT> pfls0
|
||||
} > dsram2 AT> pfls0_nc /* pfls0 */
|
||||
|
||||
CORE_SEC(.zbss) (NOLOAD): FLAGS(awz)
|
||||
{
|
||||
|
|
@ -1076,7 +1097,7 @@ REGION_ALIAS( default_ram , dsram2)
|
|||
*(.zdata_cpu1)
|
||||
*(.zdata_cpu1.*)
|
||||
. = ALIGN(2);
|
||||
} > dsram1 AT> pfls0
|
||||
} > dsram1 AT> pfls0_nc /* pfls0 */
|
||||
|
||||
CORE_SEC(.zbss) (NOLOAD): FLAGS(awz)
|
||||
{
|
||||
|
|
@ -1096,7 +1117,7 @@ REGION_ALIAS( default_ram , dsram2)
|
|||
*(.zdata_cpu0)
|
||||
*(.zdata_cpu0.*)
|
||||
. = ALIGN(2);
|
||||
} > dsram0 AT> pfls0
|
||||
} > dsram0 AT> pfls0_nc /* pfls0 */
|
||||
|
||||
CORE_SEC(.zbss) (NOLOAD): FLAGS(awz)
|
||||
{
|
||||
|
|
@ -1117,7 +1138,7 @@ REGION_ALIAS( default_ram , dsram2)
|
|||
*(.zdata.dsprPowerOnInit.cpu0.16bit)
|
||||
*(.zdata.dsprPowerOnInit.cpu0.8bit)
|
||||
. = ALIGN(2);
|
||||
} > default_ram AT> pfls0
|
||||
} > default_ram AT> pfls0_nc /* pfls0 */
|
||||
|
||||
CORE_SEC(.zdata) : FLAGS(awzl)
|
||||
{
|
||||
|
|
@ -1128,7 +1149,7 @@ REGION_ALIAS( default_ram , dsram2)
|
|||
*(.zdata.*)
|
||||
*(.gnu.linkonce.z.*)
|
||||
. = ALIGN(2);
|
||||
} > default_ram AT> pfls0
|
||||
} > default_ram AT> pfls0_nc /* pfls0 */
|
||||
|
||||
CORE_SEC(.zbss_powerOn) (NOLOAD) : FLAGS(awz)
|
||||
{
|
||||
|
|
@ -1157,6 +1178,47 @@ REGION_ALIAS( default_ram , dsram2)
|
|||
} > default_ram
|
||||
}
|
||||
|
||||
/* HSM Shared memory buffers */
|
||||
CORE_ID = GLOBAL;
|
||||
SECTIONS
|
||||
{
|
||||
/* HSM Shared Memory Buffer (Cancel Seqs) */
|
||||
CORE_SEC(.hsmShmCancelSeq) (NOLOAD): FLAGS(awz)
|
||||
{
|
||||
. = ALIGN(16); /* Align to a 16-byte boundary (cache line size) */
|
||||
_hsmShmCore0CancelSeq = .;
|
||||
. = . + HSM_SHM_CANCEL_SEQ_SIZE; /* Set the section size */
|
||||
_hsmShmCore1CancelSeq = .;
|
||||
. = . + HSM_SHM_CANCEL_SEQ_SIZE; /* Set the section size */
|
||||
} > dsram_hsm_shm
|
||||
|
||||
/* HSM Shared Memory Buffer (Comms) */
|
||||
CORE_SEC(.hsmShmCore0CommBuf) (NOLOAD): FLAGS(awz)
|
||||
{
|
||||
. = ALIGN(16); /* Align to a 16-byte boundary */
|
||||
_hsmShmCore0CommBufStart = .; /* Define start symbol */
|
||||
. = . + HSM_SHM_BUF_SIZE; /* Set the section size */
|
||||
_hsmShmCore0CommBufEnd = .; /* Define end symbol */
|
||||
} > dsram_hsm_shm
|
||||
|
||||
CORE_SEC(.hsmShmCore1CommBuf) (NOLOAD): FLAGS(awz)
|
||||
{
|
||||
. = ALIGN(16); /* Align to a 16-byte boundary */
|
||||
_hsmShmCore1CommBufStart = .; /* Define start symbol */
|
||||
. = . + HSM_SHM_BUF_SIZE; /* Set the section size */
|
||||
_hsmShmCore1CommBufEnd = .; /* Define end symbol */
|
||||
} > dsram_hsm_shm
|
||||
|
||||
/* HSM Shared Memory Buffer (Print) */
|
||||
CORE_SEC(.hsmShmPrintBuf) (NOLOAD): FLAGS(awz)
|
||||
{
|
||||
. = ALIGN(16); /* Align to a 16-byte boundary */
|
||||
_hsmShmPrintBufStart = .; /* Define start symbol */
|
||||
. = . + HSM_SHM_BUF_SIZE; /* Set the section size */
|
||||
_hsmShmPrintBufEnd = .; /* Define end symbol */
|
||||
} > dsram_hsm_shm
|
||||
}
|
||||
|
||||
CORE_ID = GLOBAL;
|
||||
SECTIONS
|
||||
{
|
||||
|
|
@ -1166,7 +1228,7 @@ REGION_ALIAS( default_ram , dsram2)
|
|||
*(.zlmudata)
|
||||
*(.zlmudata.*)
|
||||
. = ALIGN(2);
|
||||
} > cpu0_dlmu AT> pfls0
|
||||
} > cpu0_dlmu AT> pfls0_nc /* pfls0 */
|
||||
|
||||
CORE_SEC(.zbss) (NOLOAD) : FLAGS(awz)
|
||||
{
|
||||
|
|
@ -1184,7 +1246,7 @@ REGION_ALIAS( default_ram , dsram2)
|
|||
*Ifx_Ssw_Tc?.* (.zrodata)
|
||||
*Cpu?_Main.* (.zrodata)
|
||||
*(.zrodata_cpu?)
|
||||
} > pfls0
|
||||
} > pfls0_nc /* pfls0 */
|
||||
}
|
||||
|
||||
/*Near Absolute Const, selectable by toolchain*/
|
||||
|
|
@ -1201,7 +1263,7 @@ REGION_ALIAS( default_ram , dsram2)
|
|||
*(.zrodata.config.cpu0.8bit)
|
||||
*(.zrodata)
|
||||
*(.zrodata.*)
|
||||
} > pfls0
|
||||
} > pfls0_nc /* pfls0 */
|
||||
}
|
||||
|
||||
/*Relative A0/A1/A8/A9 Addressable Sections*/
|
||||
|
|
@ -1216,7 +1278,7 @@ SECTIONS
|
|||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
. = ALIGN(2);
|
||||
} > default_ram AT> pfls0
|
||||
} > default_ram AT> pfls0_nc /* pfls0 */
|
||||
CORE_SEC(.sbss) (NOLOAD): FLAGS(aws)
|
||||
{
|
||||
*(.sbss)
|
||||
|
|
@ -1268,7 +1330,7 @@ SECTIONS
|
|||
*(.data_cpu2)
|
||||
*(.data_cpu2.*)
|
||||
. = ALIGN(2);
|
||||
} > dsram2 AT> pfls0
|
||||
} > dsram2 AT> pfls0_nc /* pfls0 */
|
||||
|
||||
CORE_SEC(.bss) (NOLOAD): FLAGS(aw)
|
||||
{
|
||||
|
|
@ -1284,7 +1346,7 @@ SECTIONS
|
|||
*(.lmudata_cpu2)
|
||||
*(.lmudata_cpu2.*)
|
||||
. = ALIGN(2);
|
||||
} > cpu2_dlmu AT> pfls0
|
||||
} > cpu2_dlmu AT> pfls0_nc /* pfls0 */
|
||||
|
||||
CORE_SEC(.lmubss) : FLAGS(aw)
|
||||
{
|
||||
|
|
@ -1303,7 +1365,7 @@ SECTIONS
|
|||
*(.data_cpu1)
|
||||
*(.data_cpu1.*)
|
||||
. = ALIGN(2);
|
||||
} > dsram1 AT> pfls0
|
||||
} > dsram1 AT> pfls0_nc /* pfls0 */
|
||||
|
||||
CORE_SEC(.bss) (NOLOAD): FLAGS(aw)
|
||||
{
|
||||
|
|
@ -1319,7 +1381,7 @@ SECTIONS
|
|||
*(.lmudata_cpu1)
|
||||
*(.lmudata_cpu1.*)
|
||||
. = ALIGN(2);
|
||||
} > cpu1_dlmu AT> pfls0
|
||||
} > cpu1_dlmu AT> pfls0_nc /* pfls0 */
|
||||
|
||||
CORE_SEC(.lmubss) : FLAGS(aw)
|
||||
{
|
||||
|
|
@ -1338,7 +1400,7 @@ SECTIONS
|
|||
*(.data_cpu0)
|
||||
*(.data_cpu0.*)
|
||||
. = ALIGN(2);
|
||||
} > dsram0 AT> pfls0
|
||||
} > dsram0 AT> pfls0_nc /* pfls0 */
|
||||
|
||||
CORE_SEC(.bss) (NOLOAD): FLAGS(aw)
|
||||
{
|
||||
|
|
@ -1354,7 +1416,7 @@ SECTIONS
|
|||
*(.lmudata_cpu0)
|
||||
*(.lmudata_cpu0.*)
|
||||
. = ALIGN(2);
|
||||
} > cpu0_dlmu AT> pfls0
|
||||
} > cpu0_dlmu AT> pfls0_nc /* pfls0 */
|
||||
|
||||
CORE_SEC(.lmubss) : FLAGS(aw)
|
||||
{
|
||||
|
|
@ -1372,7 +1434,7 @@ SECTIONS
|
|||
*(.a9sdata)
|
||||
*(.a9sdata.*)
|
||||
. = ALIGN(2);
|
||||
} > cpu0_dlmu AT> pfls0
|
||||
} > cpu0_dlmu AT> pfls0_nc /* pfls0 */
|
||||
|
||||
CORE_SEC(.sbss4) :
|
||||
{
|
||||
|
|
@ -1404,7 +1466,7 @@ SECTIONS
|
|||
*(.data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
. = ALIGN(2);
|
||||
} > default_ram AT> pfls0
|
||||
} > default_ram AT> pfls0_nc /* pfls0 */
|
||||
|
||||
CORE_SEC(.bss) (NOLOAD) : FLAGS(aw)
|
||||
{
|
||||
|
|
@ -1429,7 +1491,7 @@ SECTIONS
|
|||
*(.lmudata)
|
||||
*(.lmudata.*)
|
||||
. = ALIGN(2);
|
||||
} > cpu0_dlmu AT> pfls0
|
||||
} > cpu0_dlmu AT> pfls0_nc /* pfls0 */
|
||||
|
||||
CORE_SEC(.lmubss) : FLAGS(aw)
|
||||
{
|
||||
|
|
@ -1447,7 +1509,7 @@ SECTIONS
|
|||
*Cpu0_Main.* (.rodata)
|
||||
*(.rodata_cpu0)
|
||||
*(.rodata_cpu0.*)
|
||||
} > pfls0
|
||||
} > pfls0_nc /* pfls0 */
|
||||
}
|
||||
|
||||
CORE_ID = CPU1;
|
||||
|
|
@ -1459,7 +1521,7 @@ SECTIONS
|
|||
*Cpu1_Main.* (.rodata)
|
||||
*(.rodata_cpu1)
|
||||
*(.rodata_cpu1.*)
|
||||
} > pfls0
|
||||
} > pfls0_nc /* pfls0 */
|
||||
}
|
||||
|
||||
CORE_ID = CPU2;
|
||||
|
|
@ -1471,7 +1533,7 @@ SECTIONS
|
|||
*Cpu2_Main.* (.rodata)
|
||||
*(.rodata_cpu2)
|
||||
*(.rodata_cpu2.*)
|
||||
} > pfls0
|
||||
} > pfls0_nc /* pfls0 */
|
||||
}
|
||||
|
||||
/*Far Const Sections, selectable by toolchain*/
|
||||
|
|
@ -1485,54 +1547,54 @@ SECTIONS
|
|||
*(.rodata.farConst.cpu0.8bit)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.gnu.linkonce.r.*)
|
||||
/*
|
||||
* Create the clear and copy tables that tell the startup code
|
||||
* which memory areas to clear and to copy, respectively.
|
||||
*/
|
||||
. = ALIGN(4) ;
|
||||
PROVIDE(__clear_table = .);
|
||||
LONG(0 + ADDR(.CPU2.zbss)); LONG(SIZEOF(.CPU2.zbss));
|
||||
LONG(0 + ADDR(.CPU2.bss)); LONG(SIZEOF(.CPU2.bss));
|
||||
LONG(0 + ADDR(.CPU2.lmubss)); LONG(SIZEOF(.CPU2.lmubss));
|
||||
LONG(0 + ADDR(.CPU1.zbss)); LONG(SIZEOF(.CPU1.zbss));
|
||||
LONG(0 + ADDR(.CPU1.bss)); LONG(SIZEOF(.CPU1.bss));
|
||||
LONG(0 + ADDR(.CPU1.lmubss)); LONG(SIZEOF(.CPU1.lmubss));
|
||||
LONG(0 + ADDR(.CPU0.zbss)); LONG(SIZEOF(.CPU0.zbss));
|
||||
LONG(0 + ADDR(.CPU0.bss)); LONG(SIZEOF(.CPU0.bss));
|
||||
LONG(0 + ADDR(.CPU0.lmubss)); LONG(SIZEOF(.CPU0.lmubss));
|
||||
LONG(0 + ADDR(.zbss)); LONG(SIZEOF(.zbss));
|
||||
LONG(0 + ADDR(.sbss)); LONG(SIZEOF(.sbss));
|
||||
LONG(0 + ADDR(.bss)); LONG(SIZEOF(.bss));
|
||||
LONG(0 + ADDR(.lmubss)); LONG(SIZEOF(.lmubss));
|
||||
LONG(0 + ADDR(.sbss4)); LONG(SIZEOF(.sbss4));
|
||||
LONG(-1); LONG(-1);
|
||||
PROVIDE(__clear_table_powerOn = .);
|
||||
LONG(0 + ADDR(.zbss_powerOn)); LONG(SIZEOF(.zbss_powerOn));
|
||||
LONG(-1); LONG(-1);
|
||||
PROVIDE(__copy_table = .);
|
||||
LONG(LOADADDR(.CPU2.zdata)); LONG(0 + ADDR(.CPU2.zdata)); LONG(SIZEOF(.CPU2.zdata));
|
||||
LONG(LOADADDR(.CPU2.data)); LONG(0 + ADDR(.CPU2.data)); LONG(SIZEOF(.CPU2.data));
|
||||
LONG(LOADADDR(.CPU2.lmudata)); LONG(0 + ADDR(.CPU2.lmudata)); LONG(SIZEOF(.CPU2.lmudata));
|
||||
LONG(LOADADDR(.CPU1.zdata)); LONG(0 + ADDR(.CPU1.zdata)); LONG(SIZEOF(.CPU1.zdata));
|
||||
LONG(LOADADDR(.CPU1.data)); LONG(0 + ADDR(.CPU1.data)); LONG(SIZEOF(.CPU1.data));
|
||||
LONG(LOADADDR(.CPU1.lmudata)); LONG(0 + ADDR(.CPU1.lmudata)); LONG(SIZEOF(.CPU1.lmudata));
|
||||
LONG(LOADADDR(.CPU0.zdata)); LONG(0 + ADDR(.CPU0.zdata)); LONG(SIZEOF(.CPU0.zdata));
|
||||
LONG(LOADADDR(.CPU0.data)); LONG(0 + ADDR(.CPU0.data)); LONG(SIZEOF(.CPU0.data));
|
||||
LONG(LOADADDR(.CPU0.lmudata)); LONG(0 + ADDR(.CPU0.lmudata)); LONG(SIZEOF(.CPU0.lmudata));
|
||||
LONG(LOADADDR(.zdata)); LONG(0 + ADDR(.zdata)); LONG(SIZEOF(.zdata));
|
||||
LONG(LOADADDR(.sdata)); LONG(0 + ADDR(.sdata)); LONG(SIZEOF(.sdata));
|
||||
LONG(LOADADDR(.data)); LONG(0 + ADDR(.data)); LONG(SIZEOF(.data));
|
||||
LONG(LOADADDR(.lmudata)); LONG(0 + ADDR(.lmudata)); LONG(SIZEOF(.lmudata));
|
||||
LONG(LOADADDR(.sdata4)); LONG(0 + ADDR(.sdata4)); LONG(SIZEOF(.sdata4));
|
||||
LONG(LOADADDR(.CPU0.psram_text)); LONG(0 + ADDR(.CPU0.psram_text)); LONG(SIZEOF(.CPU0.psram_text));
|
||||
LONG(LOADADDR(.CPU1.psram_text)); LONG(0 + ADDR(.CPU1.psram_text)); LONG(SIZEOF(.CPU1.psram_text));
|
||||
LONG(LOADADDR(.CPU2.psram_text)); LONG(0 + ADDR(.CPU2.psram_text)); LONG(SIZEOF(.CPU2.psram_text));
|
||||
LONG(-1); LONG(-1); LONG(-1);
|
||||
PROVIDE(__copy_table_powerOn = .) ;
|
||||
LONG(LOADADDR(.zdata_powerOn)); LONG(0 + ADDR(.zdata_powerOn)); LONG(SIZEOF(.zdata_powerOn));
|
||||
LONG(-1); LONG(-1); LONG(-1);
|
||||
. = ALIGN(8);
|
||||
*(.gnu.linkonce.r.*)
|
||||
/*
|
||||
* Create the clear and copy tables that tell the startup code
|
||||
* which memory areas to clear and to copy, respectively.
|
||||
*/
|
||||
. = ALIGN(4) ;
|
||||
PROVIDE(__clear_table = .);
|
||||
LONG(0 + ADDR(.CPU2.zbss)); LONG(SIZEOF(.CPU2.zbss));
|
||||
LONG(0 + ADDR(.CPU2.bss)); LONG(SIZEOF(.CPU2.bss));
|
||||
LONG(0 + ADDR(.CPU2.lmubss)); LONG(SIZEOF(.CPU2.lmubss));
|
||||
LONG(0 + ADDR(.CPU1.zbss)); LONG(SIZEOF(.CPU1.zbss));
|
||||
LONG(0 + ADDR(.CPU1.bss)); LONG(SIZEOF(.CPU1.bss));
|
||||
LONG(0 + ADDR(.CPU1.lmubss)); LONG(SIZEOF(.CPU1.lmubss));
|
||||
LONG(0 + ADDR(.CPU0.zbss)); LONG(SIZEOF(.CPU0.zbss));
|
||||
LONG(0 + ADDR(.CPU0.bss)); LONG(SIZEOF(.CPU0.bss));
|
||||
LONG(0 + ADDR(.CPU0.lmubss)); LONG(SIZEOF(.CPU0.lmubss));
|
||||
LONG(0 + ADDR(.zbss)); LONG(SIZEOF(.zbss));
|
||||
LONG(0 + ADDR(.sbss)); LONG(SIZEOF(.sbss));
|
||||
LONG(0 + ADDR(.bss)); LONG(SIZEOF(.bss));
|
||||
LONG(0 + ADDR(.lmubss)); LONG(SIZEOF(.lmubss));
|
||||
LONG(0 + ADDR(.sbss4)); LONG(SIZEOF(.sbss4));
|
||||
LONG(-1); LONG(-1);
|
||||
PROVIDE(__clear_table_powerOn = .);
|
||||
LONG(0 + ADDR(.zbss_powerOn)); LONG(SIZEOF(.zbss_powerOn));
|
||||
LONG(-1); LONG(-1);
|
||||
PROVIDE(__copy_table = .);
|
||||
LONG(LOADADDR(.CPU2.zdata)); LONG(0 + ADDR(.CPU2.zdata)); LONG(SIZEOF(.CPU2.zdata));
|
||||
LONG(LOADADDR(.CPU2.data)); LONG(0 + ADDR(.CPU2.data)); LONG(SIZEOF(.CPU2.data));
|
||||
LONG(LOADADDR(.CPU2.lmudata)); LONG(0 + ADDR(.CPU2.lmudata)); LONG(SIZEOF(.CPU2.lmudata));
|
||||
LONG(LOADADDR(.CPU1.zdata)); LONG(0 + ADDR(.CPU1.zdata)); LONG(SIZEOF(.CPU1.zdata));
|
||||
LONG(LOADADDR(.CPU1.data)); LONG(0 + ADDR(.CPU1.data)); LONG(SIZEOF(.CPU1.data));
|
||||
LONG(LOADADDR(.CPU1.lmudata)); LONG(0 + ADDR(.CPU1.lmudata)); LONG(SIZEOF(.CPU1.lmudata));
|
||||
LONG(LOADADDR(.CPU0.zdata)); LONG(0 + ADDR(.CPU0.zdata)); LONG(SIZEOF(.CPU0.zdata));
|
||||
LONG(LOADADDR(.CPU0.data)); LONG(0 + ADDR(.CPU0.data)); LONG(SIZEOF(.CPU0.data));
|
||||
LONG(LOADADDR(.CPU0.lmudata)); LONG(0 + ADDR(.CPU0.lmudata)); LONG(SIZEOF(.CPU0.lmudata));
|
||||
LONG(LOADADDR(.zdata)); LONG(0 + ADDR(.zdata)); LONG(SIZEOF(.zdata));
|
||||
LONG(LOADADDR(.sdata)); LONG(0 + ADDR(.sdata)); LONG(SIZEOF(.sdata));
|
||||
LONG(LOADADDR(.data)); LONG(0 + ADDR(.data)); LONG(SIZEOF(.data));
|
||||
LONG(LOADADDR(.lmudata)); LONG(0 + ADDR(.lmudata)); LONG(SIZEOF(.lmudata));
|
||||
LONG(LOADADDR(.sdata4)); LONG(0 + ADDR(.sdata4)); LONG(SIZEOF(.sdata4));
|
||||
LONG(LOADADDR(.CPU0.psram_text)); LONG(0 + ADDR(.CPU0.psram_text)); LONG(SIZEOF(.CPU0.psram_text));
|
||||
LONG(LOADADDR(.CPU1.psram_text)); LONG(0 + ADDR(.CPU1.psram_text)); LONG(SIZEOF(.CPU1.psram_text));
|
||||
LONG(LOADADDR(.CPU2.psram_text)); LONG(0 + ADDR(.CPU2.psram_text)); LONG(SIZEOF(.CPU2.psram_text));
|
||||
LONG(-1); LONG(-1); LONG(-1);
|
||||
PROVIDE(__copy_table_powerOn = .) ;
|
||||
LONG(LOADADDR(.zdata_powerOn)); LONG(0 + ADDR(.zdata_powerOn)); LONG(SIZEOF(.zdata_powerOn));
|
||||
LONG(-1); LONG(-1); LONG(-1);
|
||||
. = ALIGN(8);
|
||||
} > default_rom
|
||||
}
|
||||
|
||||
|
|
@ -1550,7 +1612,7 @@ SECTIONS
|
|||
*Cpu0_Main.*(.text.*)
|
||||
*(.text_cpu0)
|
||||
*(.text_cpu0.*)
|
||||
} > pfls0
|
||||
} > pfls0_nc /* pfls0 */
|
||||
|
||||
/*
|
||||
* Code executed before calling main extra section for C++ constructor init
|
||||
|
|
@ -1564,7 +1626,7 @@ SECTIONS
|
|||
PROVIDE(__init_end = .);
|
||||
. = ALIGN(8);
|
||||
|
||||
} > pfls0
|
||||
} > pfls0_nc /* pfls0 */
|
||||
|
||||
.fini :
|
||||
{
|
||||
|
|
@ -1573,13 +1635,13 @@ SECTIONS
|
|||
KEEP(*(.fini*))
|
||||
PROVIDE(__fini_end = .);
|
||||
. = ALIGN(8);
|
||||
} > pfls0
|
||||
} > pfls0_nc /* pfls0 */
|
||||
|
||||
/*
|
||||
* Code executed before calling main extra section for C++ constructor init
|
||||
* -------------------------End-----------------------------------------
|
||||
*/
|
||||
CORE_SEC(.psram_text) : FLAGS(awx)
|
||||
CORE_SEC(.psram_text) : FLAGS(awx)
|
||||
{
|
||||
. = ALIGN(2);
|
||||
*(.psram_text_cpu0)
|
||||
|
|
@ -1589,7 +1651,7 @@ SECTIONS
|
|||
*(.ramcode) /* wolfBoot RAM function section, for RAM_CODE=1 */
|
||||
*(.ramcode.*) /* future proof subsection matching for wolfBoot RAM function section, for RAM_CODE=1 */
|
||||
. = ALIGN(2);
|
||||
} > psram0 AT> pfls0
|
||||
} > psram0 AT> pfls0_nc /* pfls0 */
|
||||
}
|
||||
|
||||
CORE_ID = CPU1;
|
||||
|
|
@ -1604,7 +1666,7 @@ SECTIONS
|
|||
*Cpu1_Main.*(.text.*)
|
||||
*(.text_cpu1)
|
||||
*(.text_cpu1.*)
|
||||
} > pfls0
|
||||
} > pfls0_nc /* pfls0 */
|
||||
|
||||
CORE_SEC(.psram_text) : FLAGS(awx)
|
||||
{
|
||||
|
|
@ -1614,7 +1676,7 @@ SECTIONS
|
|||
*(.cpu1_psram)
|
||||
*(.cpu1_psram.*)
|
||||
. = ALIGN(2);
|
||||
} > psram1 AT> pfls0
|
||||
} > psram1 AT> pfls0_nc /* pfls0 */
|
||||
}
|
||||
|
||||
CORE_ID = CPU2;
|
||||
|
|
@ -1629,7 +1691,7 @@ SECTIONS
|
|||
*Cpu2_Main.*(.text.*)
|
||||
*(.text_cpu2)
|
||||
*(.text_cpu2.*)
|
||||
} > pfls0
|
||||
} > pfls0_nc /* pfls0 */
|
||||
|
||||
CORE_SEC(.psram_text) : FLAGS(awx)
|
||||
{
|
||||
|
|
@ -1639,7 +1701,7 @@ SECTIONS
|
|||
*(.cpu2_psram)
|
||||
*(.cpu2_psram.*)
|
||||
. = ALIGN(2);
|
||||
} > psram2 AT> pfls0
|
||||
} > psram2 AT> pfls0_nc /* pfls0 */
|
||||
}
|
||||
|
||||
/*Code Sections, selectable by toolchain*/
|
||||
|
|
|
|||
|
|
@ -1,918 +0,0 @@
|
|||
/* Lcf_Tasking_Tricore_Tc.lsl
|
||||
*
|
||||
* Copyright (C) 2014-2024 wolfSSL Inc.
|
||||
*
|
||||
* This file is part of wolfBoot.
|
||||
*
|
||||
* wolfBoot is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* wolfBoot is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with wolfBoot. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#define LCF_CSA0_SIZE 8k
|
||||
#define LCF_USTACK0_SIZE 2k
|
||||
#define LCF_ISTACK0_SIZE 1k
|
||||
|
||||
#define LCF_CSA1_SIZE 8k
|
||||
#define LCF_USTACK1_SIZE 2k
|
||||
#define LCF_ISTACK1_SIZE 1k
|
||||
|
||||
#define LCF_CSA2_SIZE 8k
|
||||
#define LCF_USTACK2_SIZE 2k
|
||||
#define LCF_ISTACK2_SIZE 1k
|
||||
|
||||
#define LCF_HEAP_SIZE 4k
|
||||
|
||||
#define LCF_CPU0 0
|
||||
#define LCF_CPU1 1
|
||||
#define LCF_CPU2 2
|
||||
|
||||
/*Un comment one of the below statements to enable CpuX DMI RAM to hold global variables*/
|
||||
#define LCF_DEFAULT_HOST LCF_CPU0
|
||||
/*#define LCF_DEFAULT_HOST LCF_CPU1*/
|
||||
/*#define LCF_DEFAULT_HOST LCF_CPU2*/
|
||||
|
||||
#define LCF_DSPR2_START 0x50000000
|
||||
#define LCF_DSPR2_SIZE 96k
|
||||
|
||||
#define LCF_DSPR1_START 0x60000000
|
||||
#define LCF_DSPR1_SIZE 240k
|
||||
|
||||
#define LCF_DSPR0_START 0x70000000
|
||||
#define LCF_DSPR0_SIZE 240k
|
||||
|
||||
#define LCF_CSA2_OFFSET (LCF_DSPR2_SIZE - 1k - LCF_CSA2_SIZE)
|
||||
#define LCF_ISTACK2_OFFSET (LCF_CSA2_OFFSET - 256 - LCF_ISTACK2_SIZE)
|
||||
#define LCF_USTACK2_OFFSET (LCF_ISTACK2_OFFSET - 256 - LCF_USTACK2_SIZE)
|
||||
|
||||
#define LCF_CSA1_OFFSET (LCF_DSPR1_SIZE - 1k - LCF_CSA1_SIZE)
|
||||
#define LCF_ISTACK1_OFFSET (LCF_CSA1_OFFSET - 256 - LCF_ISTACK1_SIZE)
|
||||
#define LCF_USTACK1_OFFSET (LCF_ISTACK1_OFFSET - 256 - LCF_USTACK1_SIZE)
|
||||
|
||||
#define LCF_CSA0_OFFSET (LCF_DSPR0_SIZE - 1k - LCF_CSA0_SIZE)
|
||||
#define LCF_ISTACK0_OFFSET (LCF_CSA0_OFFSET - 256 - LCF_ISTACK0_SIZE)
|
||||
#define LCF_USTACK0_OFFSET (LCF_ISTACK0_OFFSET - 256 - LCF_USTACK0_SIZE)
|
||||
|
||||
#define LCF_HEAP0_OFFSET (LCF_USTACK0_OFFSET - LCF_HEAP_SIZE)
|
||||
#define LCF_HEAP1_OFFSET (LCF_USTACK1_OFFSET - LCF_HEAP_SIZE)
|
||||
#define LCF_HEAP2_OFFSET (LCF_USTACK2_OFFSET - LCF_HEAP_SIZE)
|
||||
|
||||
#define LCF_INTVEC0_START 0x802FE000
|
||||
#define LCF_INTVEC1_START 0x805FC000
|
||||
#define LCF_INTVEC2_START 0x805FE000
|
||||
|
||||
#define LCF_TRAPVEC0_START 0x80000100
|
||||
#define LCF_TRAPVEC1_START 0x80300000
|
||||
#define LCF_TRAPVEC2_START 0x80300100
|
||||
|
||||
#define LCF_STARTPTR_CPU0 0x80000000
|
||||
#define LCF_STARTPTR_CPU1 0x80300200
|
||||
#define LCF_STARTPTR_CPU2 0x80300220
|
||||
|
||||
#define LCF_STARTPTR_NC_CPU0 0xA0000000
|
||||
#define LCF_STARTPTR_NC_CPU1 0xA0300200
|
||||
#define LCF_STARTPTR_NC_CPU2 0xA0300220
|
||||
|
||||
#define INTTAB0 (LCF_INTVEC0_START)
|
||||
#define INTTAB1 (LCF_INTVEC1_START)
|
||||
#define INTTAB2 (LCF_INTVEC2_START)
|
||||
#define TRAPTAB0 (LCF_TRAPVEC0_START)
|
||||
#define TRAPTAB1 (LCF_TRAPVEC1_START)
|
||||
#define TRAPTAB2 (LCF_TRAPVEC2_START)
|
||||
|
||||
#define RESET LCF_STARTPTR_NC_CPU0
|
||||
|
||||
#include "tc1v1_6_2.lsl"
|
||||
|
||||
// Specify a multi-core processor environment (mpe)
|
||||
|
||||
processor mpe
|
||||
{
|
||||
derivative = tc37;
|
||||
}
|
||||
|
||||
derivative tc37
|
||||
{
|
||||
core tc0
|
||||
{
|
||||
architecture = TC1V1.6.2;
|
||||
space_id_offset = 100; // add 100 to all space IDs in the architecture definition
|
||||
copytable_space = vtc:linear; // use the copy table in the virtual core for 'bss' and initialized data sections
|
||||
}
|
||||
|
||||
core tc1 // core 1 TC16E
|
||||
{
|
||||
architecture = TC1V1.6.2;
|
||||
space_id_offset = 200; // add 200 to all space IDs in the architecture definition
|
||||
copytable_space = vtc:linear; // use the copy table in the virtual core for 'bss' and initialized data sections
|
||||
}
|
||||
|
||||
core tc2 // core 2 TC16P
|
||||
{
|
||||
architecture = TC1V1.6.2;
|
||||
space_id_offset = 300; // add 300 to all space IDs in the architecture definition
|
||||
copytable_space = vtc:linear; // use the copy table in the virtual core for 'bss' and initialized data sections
|
||||
}
|
||||
|
||||
core vtc
|
||||
{
|
||||
architecture = TC1V1.6.2;
|
||||
import tc0; // add all address spaces of core tc0 to core vtc for linking and locating
|
||||
import tc1; // tc1
|
||||
import tc2; // tc2
|
||||
}
|
||||
|
||||
bus sri
|
||||
{
|
||||
mau = 8;
|
||||
width = 32;
|
||||
|
||||
// map shared addresses one-to-one to real cores and virtual cores
|
||||
map (dest=bus:tc0:fpi_bus, src_offset=0, dest_offset=0, size=0xc0000000);
|
||||
map (dest=bus:tc1:fpi_bus, src_offset=0, dest_offset=0, size=0xc0000000);
|
||||
map (dest=bus:tc2:fpi_bus, src_offset=0, dest_offset=0, size=0xc0000000);
|
||||
map (dest=bus:vtc:fpi_bus, src_offset=0, dest_offset=0, size=0xc0000000);
|
||||
}
|
||||
|
||||
memory dsram2 // Data Scratch Pad Ram
|
||||
{
|
||||
mau = 8;
|
||||
size = 96k;
|
||||
type = ram;
|
||||
map (dest=bus:tc2:fpi_bus, dest_offset=0xd0000000, size=96k, priority=8);
|
||||
map (dest=bus:sri, dest_offset=0x50000000, size=96k);
|
||||
}
|
||||
|
||||
memory psram2 // Program Scratch Pad Ram
|
||||
{
|
||||
mau = 8;
|
||||
size = 64k;
|
||||
type = ram;
|
||||
map (dest=bus:tc2:fpi_bus, dest_offset=0xc0000000, size=64k, priority=8);
|
||||
map (dest=bus:sri, dest_offset=0x50100000, size=64k);
|
||||
}
|
||||
|
||||
memory dsram1 // Data Scratch Pad Ram
|
||||
{
|
||||
mau = 8;
|
||||
size = 240k;
|
||||
type = ram;
|
||||
map (dest=bus:tc1:fpi_bus, dest_offset=0xd0000000, size=240k, priority=8);
|
||||
map (dest=bus:sri, dest_offset=0x60000000, size=240k);
|
||||
}
|
||||
|
||||
memory psram1 // Program Scratch Pad Ram
|
||||
{
|
||||
mau = 8;
|
||||
size = 64k;
|
||||
type = ram;
|
||||
map (dest=bus:tc1:fpi_bus, dest_offset=0xc0000000, size=64k, priority=8);
|
||||
map (dest=bus:sri, dest_offset=0x60100000, size=64k);
|
||||
}
|
||||
|
||||
memory dsram0 // Data Scratch Pad Ram
|
||||
{
|
||||
mau = 8;
|
||||
size = 240k;
|
||||
type = ram;
|
||||
map (dest=bus:tc0:fpi_bus, dest_offset=0xd0000000, size=240k, priority=8);
|
||||
map (dest=bus:sri, dest_offset=0x70000000, size=240k);
|
||||
}
|
||||
|
||||
memory psram0 // Program Scratch Pad Ram
|
||||
{
|
||||
mau = 8;
|
||||
size = 64k;
|
||||
type = ram;
|
||||
map (dest=bus:tc0:fpi_bus, dest_offset=0xc0000000, size=64k, priority=8);
|
||||
map (dest=bus:sri, dest_offset=0x70100000, size=64k);
|
||||
}
|
||||
|
||||
memory pfls0
|
||||
{
|
||||
mau = 8;
|
||||
size = 3M;
|
||||
type = rom;
|
||||
map cached (dest=bus:sri, dest_offset=0x80000000, size=3M);
|
||||
map not_cached (dest=bus:sri, dest_offset=0xa0000000, reserved, size=3M);
|
||||
}
|
||||
|
||||
memory pfls1
|
||||
{
|
||||
mau = 8;
|
||||
size = 3M;
|
||||
type = rom;
|
||||
map cached (dest=bus:sri, dest_offset=0x80300000, size=3M);
|
||||
map not_cached (dest=bus:sri, dest_offset=0xa0300000, reserved, size=3M);
|
||||
}
|
||||
|
||||
memory dfls0
|
||||
{
|
||||
mau = 8;
|
||||
size = 256K;
|
||||
type = reserved nvram;
|
||||
map (dest=bus:sri, dest_offset=0xaf000000, size=256K);
|
||||
}
|
||||
|
||||
memory ucb
|
||||
{
|
||||
mau = 8;
|
||||
size = 24k;
|
||||
type = rom;
|
||||
map (dest=bus:sri, dest_offset=0xaf400000, reserved, size=24k);
|
||||
}
|
||||
|
||||
memory cpu0_dlmu
|
||||
{
|
||||
mau = 8;
|
||||
size = 64k;
|
||||
type = ram;
|
||||
map cached (dest=bus:sri, dest_offset=0x90000000, size=64k);
|
||||
map not_cached (dest=bus:sri, dest_offset=0xb0000000, reserved, size=64k);
|
||||
}
|
||||
|
||||
memory cpu1_dlmu
|
||||
{
|
||||
mau = 8;
|
||||
size = 64k;
|
||||
type = ram;
|
||||
map cached (dest=bus:sri, dest_offset=0x90010000, size=64k);
|
||||
map not_cached (dest=bus:sri, dest_offset=0xb0010000, reserved, size=64k);
|
||||
}
|
||||
|
||||
memory cpu2_dlmu
|
||||
{
|
||||
mau = 8;
|
||||
size = 64k;
|
||||
type = ram;
|
||||
map cached (dest=bus:sri, dest_offset=0x90020000, size=64k);
|
||||
map not_cached (dest=bus:sri, dest_offset=0xb0020000, reserved, size=64k);
|
||||
}
|
||||
|
||||
#if (__VERSION__ >= 6003)
|
||||
section_setup :vtc:linear
|
||||
{
|
||||
heap "heap" (min_size = (1k), fixed, align = 8);
|
||||
}
|
||||
#endif
|
||||
|
||||
section_setup :vtc:linear
|
||||
{
|
||||
start_address
|
||||
(
|
||||
symbol = "_START"
|
||||
);
|
||||
}
|
||||
|
||||
section_setup :vtc:linear
|
||||
{
|
||||
stack "ustack_tc0" (min_size = 1k, fixed, align = 8);
|
||||
stack "istack_tc0" (min_size = 1k, fixed, align = 8);
|
||||
stack "ustack_tc1" (min_size = 1k, fixed, align = 8);
|
||||
stack "istack_tc1" (min_size = 1k, fixed, align = 8);
|
||||
stack "ustack_tc2" (min_size = 1k, fixed, align = 8);
|
||||
stack "istack_tc2" (min_size = 1k, fixed, align = 8);
|
||||
}
|
||||
|
||||
/*Section setup for the copy table*/
|
||||
section_setup :vtc:linear
|
||||
{
|
||||
copytable
|
||||
(
|
||||
align = 4,
|
||||
dest = linear,
|
||||
table
|
||||
{
|
||||
symbol = "_lc_ub_table_tc0";
|
||||
space = :tc0:linear, :tc0:abs24, :tc0:abs18, :tc0:csa;
|
||||
},
|
||||
table
|
||||
{
|
||||
symbol = "_lc_ub_table_tc1";
|
||||
space = :tc1:linear, :tc1:abs24, :tc1:abs18, :tc1:csa;
|
||||
},
|
||||
table
|
||||
{
|
||||
symbol = "_lc_ub_table_tc2";
|
||||
space = :tc2:linear, :tc2:abs24, :tc2:abs18, :tc2:csa;
|
||||
}
|
||||
);
|
||||
}
|
||||
|
||||
/*Sections located at absolute fixed address*/
|
||||
|
||||
section_layout :vtc:linear
|
||||
{
|
||||
/*Fixed memory Allocations for stack memory and CSA*/
|
||||
group (ordered)
|
||||
{
|
||||
group ustack2(align = 8, run_addr = mem:dsram2[LCF_USTACK2_OFFSET])
|
||||
{
|
||||
stack "ustack_tc2" (size = LCF_USTACK2_SIZE);
|
||||
}
|
||||
"__USTACK2":= sizeof(group:ustack2) > 0 ? "_lc_ue_ustack_tc2" : 0;
|
||||
"__USTACK2_END"="_lc_gb_ustack2";
|
||||
|
||||
group istack2(align = 8, run_addr = mem:dsram2[LCF_ISTACK2_OFFSET])
|
||||
{
|
||||
stack "istack_tc2" (size = LCF_ISTACK2_SIZE);
|
||||
}
|
||||
"__ISTACK2":= sizeof(group:istack2) > 0 ? "_lc_ue_istack_tc2" : 0;
|
||||
"__ISTACK2_END"="_lc_gb_istack2";
|
||||
|
||||
group (align = 64, attributes=rw, run_addr=mem:dsram2[LCF_CSA2_OFFSET])
|
||||
reserved "csa_tc2" (size = LCF_CSA2_SIZE);
|
||||
"__CSA2":= "_lc_ub_csa_tc2";
|
||||
"__CSA2_END":= "_lc_ue_csa_tc2";
|
||||
}
|
||||
group (ordered)
|
||||
{
|
||||
group ustack1(align = 8, run_addr = mem:dsram1[LCF_USTACK1_OFFSET])
|
||||
{
|
||||
stack "ustack_tc1" (size = LCF_USTACK1_SIZE);
|
||||
}
|
||||
"__USTACK1":= sizeof(group:ustack1) > 0 ? "_lc_ue_ustack_tc1" : 0;
|
||||
"__USTACK1_END"="_lc_gb_ustack1";
|
||||
|
||||
group istack1(align = 8, run_addr = mem:dsram1[LCF_ISTACK1_OFFSET])
|
||||
{
|
||||
stack "istack_tc1" (size = LCF_ISTACK1_SIZE);
|
||||
}
|
||||
"__ISTACK1":= sizeof(group:istack1) > 0 ? "_lc_ue_istack_tc1" : 0;
|
||||
"__ISTACK1_END"="_lc_gb_istack1";
|
||||
|
||||
group (align = 64, attributes=rw, run_addr=mem:dsram1[LCF_CSA1_OFFSET])
|
||||
reserved "csa_tc1" (size = LCF_CSA1_SIZE);
|
||||
"__CSA1":= "_lc_ub_csa_tc1";
|
||||
"__CSA1_END":= "_lc_ue_csa_tc1";
|
||||
}
|
||||
group (ordered)
|
||||
{
|
||||
group ustack0(align = 8, run_addr = mem:dsram0[LCF_USTACK0_OFFSET])
|
||||
{
|
||||
stack "ustack_tc0" (size = LCF_USTACK0_SIZE);
|
||||
}
|
||||
"__USTACK0":= sizeof(group:ustack0) > 0 ? "_lc_ue_ustack_tc0" : 0;
|
||||
"__USTACK0_END"="_lc_gb_ustack0";
|
||||
|
||||
group istack0(align = 8, run_addr = mem:dsram0[LCF_ISTACK0_OFFSET])
|
||||
{
|
||||
stack "istack_tc0" (size = LCF_ISTACK0_SIZE);
|
||||
}
|
||||
"__ISTACK0":= sizeof(group:istack0) > 0 ? "_lc_ue_istack_tc0" : 0;
|
||||
"__ISTACK0_END"="_lc_gb_istack0";
|
||||
|
||||
group (align = 64, attributes=rw, run_addr=mem:dsram0[LCF_CSA0_OFFSET])
|
||||
reserved "csa_tc0" (size = LCF_CSA0_SIZE);
|
||||
"__CSA0":= "_lc_ub_csa_tc0";
|
||||
"__CSA0_END":= "_lc_ue_csa_tc0";
|
||||
}
|
||||
|
||||
/*Fixed memory Allocations for _START*/
|
||||
group (ordered)
|
||||
{
|
||||
group reset (run_addr=RESET)
|
||||
{
|
||||
section "reset" ( size = 0x20, fill = 0x0800, attributes = r )
|
||||
{
|
||||
select ".text.start";
|
||||
}
|
||||
}
|
||||
group interface_const (run_addr=mem:pfls0[0x0020])
|
||||
{
|
||||
select "*.interface_const";
|
||||
}
|
||||
"__IF_CONST" := addressof(group:interface_const);
|
||||
"__START0" := LCF_STARTPTR_NC_CPU0;
|
||||
"__START1" := LCF_STARTPTR_NC_CPU1;
|
||||
"__START2" := LCF_STARTPTR_NC_CPU2;
|
||||
}
|
||||
|
||||
/*Fixed memory Allocations for Trap Vector Table*/
|
||||
group (ordered)
|
||||
{
|
||||
group trapvec_tc0 (align = 8, run_addr=LCF_TRAPVEC0_START)
|
||||
{
|
||||
section "trapvec_tc0" (size=0x100, attributes=rx, fill=0)
|
||||
{
|
||||
select "(.text.traptab_cpu0*)";
|
||||
}
|
||||
}
|
||||
group trapvec_tc1 (align = 8, run_addr=LCF_TRAPVEC1_START)
|
||||
{
|
||||
section "trapvec_tc1" (size=0x100, attributes=rx, fill=0)
|
||||
{
|
||||
select "(.text.traptab_cpu1*)";
|
||||
}
|
||||
}
|
||||
group trapvec_tc2 (align = 8, run_addr=LCF_TRAPVEC2_START)
|
||||
{
|
||||
section "trapvec_tc2" (size=0x100, attributes=rx, fill=0)
|
||||
{
|
||||
select "(.text.traptab_cpu2*)";
|
||||
}
|
||||
}
|
||||
"__TRAPTAB_CPU0" := TRAPTAB0;
|
||||
"__TRAPTAB_CPU1" := TRAPTAB1;
|
||||
"__TRAPTAB_CPU2" := TRAPTAB2;
|
||||
}
|
||||
|
||||
/*Fixed memory Allocations for Start up code*/
|
||||
group (ordered)
|
||||
{
|
||||
group start_tc0 (run_addr=LCF_STARTPTR_NC_CPU0)
|
||||
{
|
||||
select "(.text.start_cpu0*)";
|
||||
}
|
||||
group start_tc1 (run_addr=LCF_STARTPTR_NC_CPU1)
|
||||
{
|
||||
section "start_tc1" (size=0x20, attributes=rx, fill=0)
|
||||
{
|
||||
select "(.text.start_cpu1*)";
|
||||
}
|
||||
}
|
||||
group start_tc2 (run_addr=LCF_STARTPTR_NC_CPU2)
|
||||
{
|
||||
select "(.text.start_cpu2*)";
|
||||
}
|
||||
"__ENABLE_INDIVIDUAL_C_INIT_CPU0" := 0; /* Not used */
|
||||
"__ENABLE_INDIVIDUAL_C_INIT_CPU1" := 0;
|
||||
"__ENABLE_INDIVIDUAL_C_INIT_CPU2" := 0;
|
||||
}
|
||||
|
||||
/*Fixed memory Allocations for Interrupt Vector Table*/
|
||||
group (ordered)
|
||||
{
|
||||
group int_tab_tc0 (ordered)
|
||||
{
|
||||
# include "inttab0.lsl"
|
||||
}
|
||||
group int_tab_tc1 (ordered)
|
||||
{
|
||||
# include "inttab1.lsl"
|
||||
}
|
||||
group int_tab_tc2 (ordered)
|
||||
{
|
||||
# include "inttab2.lsl"
|
||||
}
|
||||
"_lc_u_int_tab" = (LCF_INTVEC0_START);
|
||||
"__INTTAB_CPU0" = (LCF_INTVEC0_START);
|
||||
"__INTTAB_CPU1" = (LCF_INTVEC1_START);
|
||||
"__INTTAB_CPU2" = (LCF_INTVEC2_START);
|
||||
}
|
||||
|
||||
/*Fixed memory Allocations for BMHD*/
|
||||
group (ordered)
|
||||
{
|
||||
group bmh_0_orig (run_addr=mem:ucb[0x0000])
|
||||
{
|
||||
select ".rodata.bmhd_0_orig";
|
||||
}
|
||||
group bmh_1_orig (run_addr=mem:ucb[0x0200])
|
||||
{
|
||||
select ".rodata.bmhd_1_orig";
|
||||
}
|
||||
group bmh_2_orig (run_addr=mem:ucb[0x0400])
|
||||
{
|
||||
select ".rodata.bmhd_2_orig";
|
||||
}
|
||||
group bmh_3_orig (run_addr=mem:ucb[0x0600])
|
||||
{
|
||||
select ".rodata.bmhd_3_orig";
|
||||
}
|
||||
group bmh_blank (run_addr=mem:ucb[0x0800])
|
||||
{
|
||||
}
|
||||
group bmh_0_copy (run_addr=mem:ucb[0x1000])
|
||||
{
|
||||
select ".rodata.bmhd_0_copy";
|
||||
}
|
||||
group bmh_1_copy (run_addr=mem:ucb[0x1200])
|
||||
{
|
||||
select ".rodata.bmhd_1_copy";
|
||||
}
|
||||
group bmh_2_copy (run_addr=mem:ucb[0x1400])
|
||||
{
|
||||
select ".rodata.bmhd_2_copy";
|
||||
}
|
||||
group bmh_3_copy (run_addr=mem:ucb[0x1600])
|
||||
{
|
||||
select ".rodata.bmhd_3_copy";
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*Near Abbsolute Addressable Data Sections*/
|
||||
section_layout :vtc:abs18
|
||||
{
|
||||
/*Near Absolute Data, selectable with patterns and user defined sections*/
|
||||
group
|
||||
{
|
||||
group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram2)
|
||||
{
|
||||
select "(.zdata.zdata_cpu2|.zdata.zdata_cpu2.*)";
|
||||
select "(.zbss.zbss_cpu2|.zbss.zbss_cpu2.*)";
|
||||
}
|
||||
|
||||
group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram1)
|
||||
{
|
||||
select "(.zdata.zdata_cpu1|.zdata.zdata_cpu1.*)";
|
||||
select "(.zbss.zbss_cpu1|.zbss.zbss_cpu1.*)";
|
||||
}
|
||||
|
||||
group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram0)
|
||||
{
|
||||
select "(.zdata.zdata_cpu0|.zdata.zdata_cpu0.*)";
|
||||
select "(.zbss.zbss_cpu0|.zbss.zbss_cpu0.*)";
|
||||
}
|
||||
|
||||
group (ordered, attributes=rw, run_addr = mem:cpu0_dlmu)
|
||||
{
|
||||
select "(.zdata.zlmudata|.zdata.zlmudata.*)";
|
||||
select "(.zbss.zlmubss|.zbss.zlmubss.*)";
|
||||
}
|
||||
}
|
||||
|
||||
/*Near Absolute Data, selectable by toolchain*/
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU2
|
||||
group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram2)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU1
|
||||
group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU0
|
||||
group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram0)
|
||||
# endif
|
||||
{
|
||||
group zdata_mcal(attributes=rw)
|
||||
{
|
||||
select ".zdata.dsprInit.cpu0.32bit";
|
||||
select ".zdata.dsprInit.cpu0.16bit";
|
||||
select ".zdata.dsprInit.cpu0.8bit";
|
||||
}
|
||||
|
||||
group zdata_powerOn(attributes=rw)
|
||||
{
|
||||
select ".zdata.dsprPowerOnInit.cpu0.32bit";
|
||||
select ".zdata.dsprPowerOnInit.cpu0.16bit";
|
||||
select ".zdata.dsprPowerOnInit.cpu0.8bit";
|
||||
}
|
||||
|
||||
group zbss_mcal(attributes=rw)
|
||||
{
|
||||
select ".zbss.dsprClearOnInit.cpu0.32bit";
|
||||
select ".zbss.dsprClearOnInit.cpu0.16bit";
|
||||
select ".zbss.dsprClearOnInit.cpu0.8bit";
|
||||
}
|
||||
|
||||
group zbss_noClear(attributes=rw)
|
||||
{
|
||||
select ".zbss.dsprNoInit.cpu0.32bit";
|
||||
select ".zbss.dsprNoInit.cpu0.16bit";
|
||||
select ".zbss.dsprNoInit.cpu0.8bit";
|
||||
}
|
||||
|
||||
group zbss_powerOn(attributes=rw)
|
||||
{
|
||||
select ".zbss.dsprPowerOnClear.cpu0.32bit";
|
||||
select ".zbss.dsprPowerOnClear.cpu0.16bit";
|
||||
select ".zbss.dsprPowerOnClear.cpu0.8bit";
|
||||
}
|
||||
|
||||
group zdata(attributes=rw)
|
||||
{
|
||||
select "(.zdata|.zdata.*)";
|
||||
select "(.zbss|.zbss.*)";
|
||||
}
|
||||
}
|
||||
|
||||
/*Near Absolute Const, selectable with patterns and user defined sections*/
|
||||
group
|
||||
{
|
||||
group (ordered, align = 4, contiguous, run_addr=mem:pfls0)
|
||||
{
|
||||
select ".zrodata.Ifx_Ssw_Tc0.*";
|
||||
select ".zrodata.Ifx_Ssw_Tc1.*";
|
||||
select ".zrodata.Ifx_Ssw_Tc2.*";
|
||||
select ".zrodata.Cpu0_Main.*";
|
||||
select ".zrodata.Cpu1_Main.*";
|
||||
select ".zrodata.Cpu2_Main.*";
|
||||
|
||||
/*Near Absolute Const, selectable by toolchain*/
|
||||
select ".zrodata.const.cpu0.32bit";
|
||||
select ".zrodata.const.cpu0.16bit";
|
||||
select ".zrodata.const.cpu0.8bit";
|
||||
select ".zrodata.config.cpu0.32bit";
|
||||
select ".zrodata.config.cpu0.16bit";
|
||||
select ".zrodata.config.cpu0.8bit";
|
||||
select "(.zrodata|.zrodata.*)";
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*Relative A0/A1/A8/A9 Addressable Sections*/
|
||||
section_layout :vtc:linear
|
||||
{
|
||||
/*Relative A0 Addressable Data, selectable by toolchain*/
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU2
|
||||
group a0 (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram2)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU1
|
||||
group a0 (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU0
|
||||
group a0 (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram0)
|
||||
# endif
|
||||
{
|
||||
select "(.data_a0.sdata|.data_a0.sdata.*)";
|
||||
select "(.bss_a0.sbss|.bss_a0.sbss.*)";
|
||||
}
|
||||
"_SMALL_DATA_" := sizeof(group:a0) > 0 ? addressof(group:a0) : addressof(group:a0) & 0xF0000000 + 32k;
|
||||
"__A0_MEM" = "_SMALL_DATA_";
|
||||
|
||||
/*Relative A1 Addressable Const, selectable by toolchain*/
|
||||
/*Small constant sections, No option given for CPU specific user sections to make generated code portable across Cpus*/
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU2
|
||||
group a1 (ordered, align = 4, run_addr=mem:pfls1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU1
|
||||
group a1 (ordered, align = 4, run_addr=mem:pfls1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU0
|
||||
group a1 (ordered, align = 4, run_addr=mem:pfls0)
|
||||
# endif
|
||||
{
|
||||
select "(.rodata_a1.srodata|.rodata_a1.srodata.*)";
|
||||
select "(.ldata|.ldata.*)";
|
||||
}
|
||||
"_LITERAL_DATA_" := sizeof(group:a1) > 0 ? addressof(group:a1) : addressof(group:a1) & 0xF0000000 + 32k;
|
||||
"__A1_MEM" = "_LITERAL_DATA_";
|
||||
|
||||
/*Relative A9 Addressable Data, selectable with patterns and user defined sections*/
|
||||
group a9 (ordered, align = 4, run_addr=mem:cpu0_dlmu)
|
||||
{
|
||||
select "(.data_a9.a9sdata|.data_a9.a9sdata.*)";
|
||||
select "(.bss_a9.a9sbss|.bss_a9.a9sbss.*)";
|
||||
}
|
||||
"_A9_DATA_" := sizeof(group:a9) > 0 ? addressof(group:a9) : addressof(group:a9) & 0xF0000000 + 32k;
|
||||
"__A9_MEM" = "_A9_DATA_";
|
||||
|
||||
/*Relative A8 Addressable Const, selectable with patterns and user defined sections*/
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU2
|
||||
group a8 (ordered, align = 4, run_addr=mem:pfls1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU1
|
||||
group a8 (ordered, align = 4, run_addr=mem:pfls1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU0
|
||||
group a8 (ordered, align = 4, run_addr=mem:pfls0)
|
||||
# endif
|
||||
{
|
||||
select "(.rodata_a8.a8srodata|.rodata_a8.a8srodata.*)";
|
||||
}
|
||||
"_A8_DATA_" := sizeof(group:a8) > 0 ? addressof(group:a8) : addressof(group:a8) & 0xF0000000 + 32k;
|
||||
"__A8_MEM" = "_A8_DATA_";
|
||||
}
|
||||
|
||||
/*Far Data / Far Const Sections, selectable with patterns and user defined sections*/
|
||||
section_layout :vtc:linear
|
||||
{
|
||||
/*Far Data Sections, selectable with patterns and user defined sections*/
|
||||
group
|
||||
{
|
||||
/*DSRAM sections*/
|
||||
group
|
||||
{
|
||||
group (ordered, attributes=rw, run_addr=mem:dsram2)
|
||||
{
|
||||
select ".data.Ifx_Ssw_Tc2.*";
|
||||
select ".data.Cpu2_Main.*";
|
||||
select "(.data.data_cpu2|.data.data_cpu2.*)";
|
||||
select ".bss.Ifx_Ssw_Tc2.*";
|
||||
select ".bss.Cpu2_Main.*";
|
||||
select "(.bss.bss_cpu2|.bss.bss_cpu2.*)";
|
||||
}
|
||||
group (ordered, attributes=rw, run_addr=mem:dsram1)
|
||||
{
|
||||
select ".data.Ifx_Ssw_Tc1.*";
|
||||
select ".data.Cpu1_Main.*";
|
||||
select "(.data.data_cpu1|.data.data_cpu1.*)";
|
||||
select ".bss.Ifx_Ssw_Tc1.*";
|
||||
select ".bss.Cpu1_Main.*";
|
||||
select "(.bss.bss_cpu1|.bss.bss_cpu1.*)";
|
||||
}
|
||||
group (ordered, attributes=rw, run_addr=mem:dsram0)
|
||||
{
|
||||
select ".data.Ifx_Ssw_Tc0.*";
|
||||
select ".data.Cpu0_Main.*";
|
||||
select "(.data.data_cpu0|.data.data_cpu0.*)";
|
||||
select ".bss.Ifx_Ssw_Tc0.*";
|
||||
select ".bss.Cpu0_Main.*";
|
||||
select "(.bss.bss_cpu0|.bss.bss_cpu0.*)";
|
||||
}
|
||||
}
|
||||
|
||||
/*LMU Data sections*/
|
||||
group
|
||||
{
|
||||
group (ordered, attributes=rw, run_addr = mem:cpu0_dlmu)
|
||||
{
|
||||
select "(.data.lmudata_cpu0|.data.lmudata_cpu0.*)";
|
||||
select "(.bss.lmubss_cpu0|.bss.lmubss_cpu0.*)";
|
||||
select "(.data.lmudata|.data.lmudata.*)";
|
||||
select "(.bss.lmubss|.bss.lmubss.*)";
|
||||
}
|
||||
group (ordered, attributes=rw, run_addr = mem:cpu1_dlmu)
|
||||
{
|
||||
select "(.data.lmudata_cpu1|.data.lmudata_cpu1.*)";
|
||||
select "(.bss.lmubss_cpu1|.bss.lmubss_cpu1.*)";
|
||||
}
|
||||
group (ordered, attributes=rw, run_addr = mem:cpu2_dlmu)
|
||||
{
|
||||
select "(.data.lmudata_cpu2|.data.lmudata_cpu2.*)";
|
||||
select "(.bss.lmubss_cpu2|.bss.lmubss_cpu2.*)";
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*Far Data Sections, selectable by toolchain*/
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU2
|
||||
group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram2)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU1
|
||||
group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU0
|
||||
group (ordered, contiguous, align = 4, attributes=rw, run_addr = mem:dsram0)
|
||||
# endif
|
||||
{
|
||||
group data_mcal(attributes=rw)
|
||||
{
|
||||
select ".data.farDsprInit.cpu0.32bit";
|
||||
select ".data.farDsprInit.cpu0.16bit";
|
||||
select ".data.farDsprInit.cpu0.8bit";
|
||||
}
|
||||
|
||||
group bss_mcal(attributes=rw)
|
||||
{
|
||||
select ".bss.farDsprClearOnInit.cpu0.32bit";
|
||||
select ".bss.farDsprClearOnInit.cpu0.16bit";
|
||||
select ".bss.farDsprClearOnInit.cpu0.8bit";
|
||||
}
|
||||
|
||||
group bss_noInit(attributes=rw)
|
||||
{
|
||||
select ".bss.farDsprNoInit.cpu0.32bit";
|
||||
select ".bss.farDsprNoInit.cpu0.16bit";
|
||||
select ".bss.farDsprNoInit.cpu0.8bit";
|
||||
}
|
||||
|
||||
group data(attributes=rw)
|
||||
{
|
||||
select "(.data|.data.*)";
|
||||
select "(.bss|.bss.*)";
|
||||
}
|
||||
}
|
||||
|
||||
/*Heap allocation*/
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU2
|
||||
group (ordered, align = 4, run_addr = mem:dsram2[LCF_HEAP2_OFFSET])
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU1
|
||||
group (ordered, align = 4, run_addr = mem:dsram1[LCF_HEAP1_OFFSET])
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU0
|
||||
group (ordered, align = 4, run_addr = mem:dsram0[LCF_HEAP0_OFFSET])
|
||||
# endif
|
||||
{
|
||||
heap "heap" (size = LCF_HEAP_SIZE);
|
||||
}
|
||||
|
||||
/*Far Const Sections, selectable with patterns and user defined sections*/
|
||||
group
|
||||
{
|
||||
group (ordered, align = 4, run_addr=mem:pfls0)
|
||||
{
|
||||
select ".rodata.Ifx_Ssw_Tc0.*";
|
||||
select ".rodata.Cpu0_Main.*";
|
||||
select "(.rodata.rodata_cpu0|.rodata.rodata_cpu0.*)";
|
||||
}
|
||||
group (ordered, align = 4, run_addr=mem:pfls1)
|
||||
{
|
||||
select ".rodata.Cpu1_Main.*";
|
||||
select ".rodata.Ifx_Ssw_Tc1.*";
|
||||
select "(.rodata.rodata_cpu1|.rodata.rodata_cpu1.*)";
|
||||
}
|
||||
group (ordered, align = 4, run_addr=mem:pfls1)
|
||||
{
|
||||
select ".rodata.Ifx_Ssw_Tc2.*";
|
||||
select ".rodata.Cpu2_Main.*";
|
||||
select "(.rodata.rodata_cpu2|.rodata.rodata_cpu2.*)";
|
||||
}
|
||||
}
|
||||
|
||||
/*Far Const Sections, selectable by toolchain*/
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU2
|
||||
group (ordered, align = 4, run_addr=mem:pfls1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU1
|
||||
group (ordered, align = 4, run_addr=mem:pfls1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU0
|
||||
group (ordered, align = 4, run_addr=mem:pfls0)
|
||||
# endif
|
||||
{
|
||||
select ".rodata.farConst.cpu0.32bit";
|
||||
select ".rodata.farConst.cpu0.16bit";
|
||||
select ".rodata.farConst.cpu0.8bit";
|
||||
select "(.rodata|.rodata.*)";
|
||||
}
|
||||
}
|
||||
|
||||
/* PSRAM Code selections*/
|
||||
section_layout :vtc:linear
|
||||
{
|
||||
/*Code Sections, selectable with patterns and user defined sections*/
|
||||
group
|
||||
{
|
||||
/*Program Scratchpad Sections*/
|
||||
group
|
||||
{
|
||||
group code_psram0 (ordered, attributes=rwx, copy, run_addr=mem:psram0)
|
||||
{
|
||||
select "(.text.cpu0_psram|.text.cpu0_psram.*)";
|
||||
select "(.text.psram_text_cpu0|.text.psram_text_cpu0.*)";
|
||||
}
|
||||
group code_psram1 (ordered, attributes=rwx, copy, run_addr=mem:psram1)
|
||||
{
|
||||
select "(.text.cpu1_psram|.text.cpu1_psram.*)";
|
||||
select "(.text.psram_text_cpu1|.text.psram_text_cpu1.*)";
|
||||
}
|
||||
group code_psram2 (ordered, attributes=rwx, copy, run_addr=mem:psram2)
|
||||
{
|
||||
select "(.text.cpu2_psram|.text.cpu2_psram.*)";
|
||||
select "(.text.psram_text_cpu2|.text.psram_text_cpu2.*)";
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* FLS Code selections*/
|
||||
section_layout :vtc:linear
|
||||
{
|
||||
/*Code Sections, selectable with patterns and user defined sections*/
|
||||
group
|
||||
{
|
||||
/*Cpu specific PFLASH Sections*/
|
||||
group
|
||||
{
|
||||
group (ordered, align = 4, run_addr=mem:pfls0)
|
||||
{
|
||||
select ".text.Ifx_Ssw_Tc0.*";
|
||||
select ".text.Cpu0_Main.*";
|
||||
select ".text.CompilerTasking.Ifx_C_Init";
|
||||
select "(.text.text_cpu0|.text.text_cpu0.*)";
|
||||
}
|
||||
group (ordered, align = 4, run_addr=mem:pfls1)
|
||||
{
|
||||
select ".text.Ifx_Ssw_Tc1.*";
|
||||
select ".text.Cpu1_Main.*";
|
||||
select "(.text.text_cpu1|.text.text_cpu1.*)";
|
||||
}
|
||||
group (ordered, align = 4, run_addr=mem:pfls1)
|
||||
{
|
||||
select ".text.Ifx_Ssw_Tc2.*";
|
||||
select ".text.Cpu2_Main.*";
|
||||
select "(.text.text_cpu2|.text.text_cpu2.*)";
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*Code Sections, selectable by toolchain*/
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU2
|
||||
group (ordered, run_addr=mem:pfls1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU1
|
||||
group (ordered, run_addr=mem:pfls1)
|
||||
# endif
|
||||
# if LCF_DEFAULT_HOST == LCF_CPU0
|
||||
group (ordered, run_addr=mem:pfls0)
|
||||
# endif
|
||||
{
|
||||
select ".text.fast.pfls.cpu0";
|
||||
select ".text.slow.pfls.cpu0";
|
||||
select ".text.5ms.pfls.cpu0";
|
||||
select ".text.10ms.pfls.cpu0";
|
||||
select ".text.callout.pfls.cpu0";
|
||||
select "(.text|.text.*)";
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1 @@
|
|||
Extract your private release of wolfHSM for the Infineon AURIX TC3xx here
|
||||
2
Makefile
2
Makefile
|
|
@ -51,6 +51,7 @@ endif
|
|||
WOLFCRYPT_OBJS:=
|
||||
SECURE_OBJS:=
|
||||
PUBLIC_KEY_OBJS:=
|
||||
WOLFHSM_CLIENT_OBJS:=
|
||||
ifneq ("$(NO_LOADER)","1")
|
||||
OBJS+=./src/loader.o
|
||||
endif
|
||||
|
|
@ -63,6 +64,7 @@ include options.mk
|
|||
|
||||
OBJS+=$(WOLFCRYPT_OBJS)
|
||||
OBJS+=$(PUBLIC_KEY_OBJS)
|
||||
OBJS+=$(WOLFHSM_CLIENT_OBJS)
|
||||
|
||||
CFLAGS+= \
|
||||
-I"." -I"include/" -I"lib/wolfssl" \
|
||||
|
|
|
|||
6
arch.mk
6
arch.mk
|
|
@ -1,5 +1,8 @@
|
|||
## CPU Architecture selection via $ARCH
|
||||
|
||||
# Global reference to lib directory that works with relative paths
|
||||
LIBDIR := $(dir $(lastword $(MAKEFILE_LIST)))lib
|
||||
|
||||
# check for math library
|
||||
ifeq ($(SPMATH),1)
|
||||
# SP Math
|
||||
|
|
@ -1039,6 +1042,9 @@ ifeq ($(TARGET),sim)
|
|||
MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o
|
||||
CFLAGS+=-DWOLFSSL_SP_DIV_WORD_HALF
|
||||
endif
|
||||
ifeq ($(WOLFHSM_CLIENT),1)
|
||||
WOLFHSM_CLIENT_OBJS += $(LIBDIR)/wolfHSM/port/posix/posix_transport_tcp.o
|
||||
endif
|
||||
endif
|
||||
|
||||
CFLAGS+=-DARCH_FLASH_OFFSET=$(ARCH_FLASH_OFFSET)
|
||||
|
|
|
|||
|
|
@ -0,0 +1,30 @@
|
|||
ARCH=sim
|
||||
TARGET=sim
|
||||
SIGN?=ECC256
|
||||
HASH?=SHA256
|
||||
WOLFBOOT_SMALL_STACK?=0
|
||||
SPI_FLASH=0
|
||||
DEBUG=0
|
||||
|
||||
# sizes should be multiple of system page size
|
||||
WOLFBOOT_PARTITION_SIZE=0x100000
|
||||
WOLFBOOT_SECTOR_SIZE=0x1000
|
||||
WOLFBOOT_PARTITION_BOOT_ADDRESS=0x80000
|
||||
# if on external flash, it should be multiple of system page size
|
||||
WOLFBOOT_PARTITION_UPDATE_ADDRESS=0x180000
|
||||
WOLFBOOT_PARTITION_SWAP_ADDRESS=0x280000
|
||||
|
||||
# required for keytools
|
||||
WOLFBOOT_FIXED_PARTITIONS=1
|
||||
|
||||
# For debugging XMALLOC/XFREE
|
||||
#CFLAGS_EXTRA+=-DWOLFBOOT_DEBUG_MALLOC
|
||||
|
||||
WOLFHSM_CLIENT=1
|
||||
|
||||
# Uncomment the following to use wolfHSM ephemeral keys from the keystore
|
||||
# for image auth
|
||||
#WOLFHSM_CLIENT_LOCAL_KEYS=1
|
||||
|
||||
# Uncomment for verbose wolfHSM printf statements
|
||||
#CFLAGS_EXTRA+=-DDEBUG_CRYPTOCB -DDEBUG_CRYPTOCB_VERBOSE
|
||||
|
|
@ -3130,6 +3130,6 @@ repository that can be directly flashed into the BIOS flash of the board.
|
|||
|
||||
wolfBoot supports the AURIX TC3xx family of devices, and provides a demo application targeting the TC375 AURIX LiteKit-V2.
|
||||
|
||||
For detailed instructions on using wolfBoot with the AURIX TC3xx, please refer to [IDE/AURIX/README.md](../IDE/AURIX/README.md)
|
||||
For detailed instructions on using wolfBoot with the AURIX TC3xx, please refer to [IDE/AURIX/README.md](../IDE/AURIX/README.md).
|
||||
|
||||
wolfBoot can also integrate with [wolfHSM](https://www.wolfssl.com/products/wolfhsm/) on AURIX TC3xx devices, offloading cryptographic operations and key storage to the AURIX HSM core. For more information on using wolfBoot with wolfHSM on AURIX devices, please contact us at facts@wolfssl.com.
|
||||
|
|
|
|||
|
|
@ -159,8 +159,25 @@ Please note that by default wolfBoot does not include any public key algorithm i
|
|||
selected via the option `SIGN=`, so usually this feature is reserved to specific use cases where other policies or components
|
||||
in the chain-of-trust require to store different key types for different purposes.
|
||||
|
||||
### Exporting the public key to a file
|
||||
|
||||
## Using KeyStore with external Key Vaults
|
||||
The `keygen` tool can also export the public key that corresponds to the private key generated with the `-g` option to a der file when
|
||||
used with the `--exportpubkey` option. The `--exportpubkey` option only has an effect if used in conjunction with the `-g` option,
|
||||
otherwise it is ignored. To generate a new ECC 256 keypair, with der files exported for both public and private keys, use:
|
||||
|
||||
```sh
|
||||
keygen --ecc256 --exportpubkey -g mykey.der
|
||||
```
|
||||
|
||||
The exported public key will have the same name as the input to the `-g` option, but with `_pub` appended to the string before
|
||||
the first `.` character. Therefore, running the above command will result in the creation of the following two files:
|
||||
|
||||
```sh
|
||||
mykey.der # <-- the generated private key
|
||||
mykey_pub.der # <-- the generated public key
|
||||
```
|
||||
|
||||
## Using KeyStore with external Key Vaults, where keys are accessible
|
||||
|
||||
It is possible to use an external NVM, a Key Vault or any generic support to
|
||||
access the KeyStore. In this case, wolfBoot should not link the generated keystore.c directly,
|
||||
|
|
@ -198,3 +215,9 @@ public key associated to the slot `id`.
|
|||
`uint32_t keystore_get_mask(int id)`
|
||||
|
||||
Returns the permissions mask, as a 32-bit word, for the public key stored in the slot `id`.
|
||||
|
||||
### Using KeyStore with HSMs (inaccessible keys)
|
||||
|
||||
wolfBoot supports certain platforms that contain connected HSMs (Hardware Security Modules) that can provide cryptographic services using keys that are not stored in the device NVM or readable by wolfBoot, for example, wolfHSM. In these scenarios, wolfBoot key tools should be used to generate the keys, which can then be manually loaded into the HSM (see [--exportpubkey](#exporting-the-public-key-to-a-file)). At runtime, wolfBoot will still use the keystore to obtain information about the public keys, specifically the size of the key and the key type, but does not need access to the actual key material.
|
||||
|
||||
To support this mode of operation, the `keygen` tool supports the `--nolocalkeys` option, which instructs the tool to generate a keystore entry with a zeroed key material. It still generates the `.der` files for private and public keys, so the wolfBoot key tools can sign images, but the `keystore.c` file that is linked into wolfBoot will contain all zeros in the `pubkey` field. Because the key material isn't present in the keystore, the keypair used to sign the image and stored on the HSM for verification can be updated in the field without needing to rebuild wolfBoot against a new `keystore.c`, as long as the signature algorithm and key size does not change. Most targets that use this option will automatically add it to the key generation options or explicitly mention this step in the build documentation.
|
||||
|
|
|
|||
|
|
@ -0,0 +1,145 @@
|
|||
|
||||
# wolfHSM Client Integration with wolfBoot
|
||||
|
||||
wolfBoot provides tight integration with wolfHSM when used on a select group of supported platforms. When used in this mode, wolfBoot acts as a wolfHSM client, with all cryptographic operations and key storage offloaded to the wolfHSM server as remote procedure calls (RPCs).
|
||||
|
||||
For an introduction to wolfHSM, please refer to the [wolfHSM Manual](https://wolfSSL.com/https://www.wolfssl.com/documentation/manuals/wolfhsm/) and [wolfHSM GitHub Repository](https://github.com/wolfssl/wolfHSM.git).
|
||||
|
||||
## Key Features
|
||||
|
||||
1. Secure key storage: Keys used for authentication and encryption are stored securely on the wolfHSM server
|
||||
2. Remote cryptographic operations: All cryptographic operations are performed on the wolfHSM server
|
||||
3. Flexible key management: Keys can be updated or rotated on the wolfHSM server without requiring an update to wolfBoot
|
||||
|
||||
## Supported Platforms
|
||||
|
||||
wolfBoot supports using wolfHSM on the following platforms:
|
||||
|
||||
- wolfBoot simulator (using wolfHSM POSIX TCP transport)
|
||||
- AURIX TC3xx (shared memory transport)
|
||||
|
||||
Details on configuring wolfBoot to use wolfHSM on each of these platforms can be found in the wolfBoot (and wolfHSM) documentation specific to that target, with the exception of the simulator, which is documented here. The remainder of this document focuses on the generic wolfHSM-related configuration options.
|
||||
|
||||
## Algorithm Support
|
||||
|
||||
wolfBoot supports using wolfHSM for the following algorithms:
|
||||
|
||||
- RSA with 2048, 3072, and 4096-bit keys for image signature verification
|
||||
- ECDSA P-256, P-384, and P-521 for image signature verification
|
||||
- SHA256 for image integrity verification
|
||||
|
||||
Encrypted images with wolfHSM is not yet supported in wolfBoot. Note that every HAL target may not support all of these algorithms. Consult the platform-specific wolfBoot documentation for details.
|
||||
|
||||
## Configuration Options
|
||||
|
||||
This section describes the configuration options available for wolfHSM client integration. Note that these options should be configured automatically by the build system for each supported platform when wolfHSM support is enabled. Consult the platform-specific documentation for details on enabling wolfHSM support.
|
||||
|
||||
### `WOLFBOOT_ENABLE_WOLFHSM_CLIENT`
|
||||
|
||||
This option enables wolfHSM client support in wolfBoot. Without defining this option, support for wolfHSM is not compiled in and the remainder of the options have no effect.
|
||||
|
||||
### `WOLFBOOT_USE_WOLFHSM_PUBKEY_ID`
|
||||
|
||||
This option enables use of the reserved wolfHSM public key ID for firmware authentication, and is typically the desired behavior for using wolfHSM. When this option is defined, wolfBoot will use the reserved wolfHSM keyId defined by the HAL (`hsmClientKeyIdPubKey`). This option is meant to be used in conjunction with the `--nolocalkeys` keygen option, as the key material in the keystore will not be used.
|
||||
|
||||
If this option is not defined, cryptographic operations are still performed on the wolfHSM server, but wolfBoot assumes the key material is present in the keystore and NOT stored on the HSM. This means that wolfBoot will first load keys from the keystore, send the key material to the wolfHSM server at the time of use (cached as ephemeral keys), and finally evict the key from the HSM after usage. This behavior is typically only useful for debugging or testing scenarios, where the keys may not be pre-loaded onto the HSM. The keystore for use in this mode should not be generated with the `--nolocalkeys` option.
|
||||
|
||||
## HAL Implementations
|
||||
|
||||
In addition to the standard wolfBoot HAL functions, wolfHSM-enabled platforms must also implement or instantiate the following wolfHSM-specific items in the platform HAL:
|
||||
|
||||
### HAL Global Variables
|
||||
|
||||
- `hsmClientCtx`: A global context for the wolfHSM client. This is initialized by the HAL and passed to wolfBoot, but should not be modified by wolfBoot.
|
||||
- `hsmClientDevIdHash`: The HSM device ID for hash operations. This is used to identify the HSM device to wolfBoot.
|
||||
- `hsmClientDevIdPubKey`: The HSM device ID for public key operations. This is used to identify the HSM device to wolfBoot.
|
||||
- `hsmClientKeyIdPubKey`: The HSM key ID for public key operations. This is used to identify the key to use for public key operations.
|
||||
|
||||
### HAL Functions
|
||||
|
||||
- `hal_hsm_init_connect()`: Initializes the connection to the wolfHSM server. This is called by wolfBoot during initialization. This should initialize the HSM client context (`hsmClientCtx`) with a valid configuration and initialize the wolfHSM client API.
|
||||
- `hal_hsm_disconnect()`: Disconnects from the wolfHSM server. This is called by wolfBoot during shutdown. This should clean up the HSM client context (`hsmClientCtx`) and invoke the wolfHSM client API's cleanup function, freeing any additional allocated resources.
|
||||
|
||||
## wolfBoot Simulator and wolfHSM
|
||||
|
||||
The wolfBoot simulator supports wolfHSM with the POSIX TCP transport. It expects to communicate with the [wolfHSM example POSIX TCP server](https://github.com/wolfSSL/wolfHSM-examples/tree/main/posix/tcp/wh_server_tcp) at `127.0.0.1:1234`. See the [wolfHSM-examples README](https://github.com/wolfSSL/wolfHSM-examples/blob/main/README.md) for more information on the example POSIX TCP server.
|
||||
|
||||
### Building the simulator with wolfHSM support
|
||||
|
||||
The wolfBoot simulator supports using wolfHSM with all algorithms mentioned in [Algorithm Support](#algorithm-support). To build the simulator configured to use wolfHSM,, ensure you build with the `WOLFHSM_CLIENT=1` makefile option. This will automatically define `WOLFBOOT_USE_WOLFHSM_PUBKEY_ID`, and requires the public key corresponding to the private key that signed the image to be pre-loaded into the HSM at the keyId specified by `hsmClientKeyIdPubKey` in the simulator HAL (see the next section for details on loading keys into the HSM example server).
|
||||
|
||||
```sh
|
||||
# Grab the HSM simulator configuration
|
||||
cp config/examples/sim-wolfHSM.config .config
|
||||
|
||||
# Build wolfBoot with the simulator HAL configured to use wolfHSM, automatically generating keys
|
||||
make
|
||||
|
||||
# Build and sign the test applications used in the simulated update
|
||||
make test-sim-internal-flash-with-update
|
||||
|
||||
# The generated wolfBoot public key can be found at `wolfboot_signing_private_key_pub.der`, and
|
||||
# should be loaded into the HSM at the keyId specified by `hsmClientKeyIdPubKey` as described
|
||||
# in the next section
|
||||
```
|
||||
|
||||
### Running the simulator against a wolfHSM server
|
||||
|
||||
First, build the wolfHSM POSIX TCP server, following the instructions in the [wolfHSM-examples README](https://github.com/wolfSSL/wolfHSM-examples/blob/main/README.md).
|
||||
|
||||
Next, in a new terminal window, run the wolfHSM POSIX TCP server, loading the public key generated by the wolfBoot build process (`wolfboot_signing_private_key_pub.der`)
|
||||
|
||||
```sh
|
||||
# Build the example server
|
||||
cd wolfHSM-examples/posix/tcp/wh_server_tcp
|
||||
make WOLFHSM_DIR=/path/to/wolfHSM/install
|
||||
|
||||
# Run the server, loading the wolfBoot public key and using keyId 0xFF (or modify keyId to match value of `hsmClientKeyIdPubKey` in `hal/sim.c`)
|
||||
./Build/wh_server_tcp.elf --key /path/to/wolfboot_signing_private_key_pub.der --id 0xFF
|
||||
|
||||
# The server will now be waiting for connections
|
||||
```
|
||||
|
||||
Run the wolfBoot simulator against the server with the appropriate arguments to report the firmware version and stage an update
|
||||
|
||||
```sh
|
||||
# in the wolfBoot terminal window
|
||||
./wolfboot.elf update_trigger get_version
|
||||
|
||||
# The following output should indicate that the update was staged successfully
|
||||
Simulator assigned ./internal_flash.dd to base 0x7f7fcbd80000
|
||||
Boot partition: 0x7f7fcbe00000 (size 745400, version 0x1)
|
||||
Update partition: 0x7f7fcbf00000 (size 745400, version 0x2)
|
||||
Boot partition: 0x7f7fcbe00000 (size 745400, version 0x1)
|
||||
Booting version: 0x1
|
||||
Simulator assigned ./internal_flash.dd to base 0x7f6665679000
|
||||
hal_flash_erase addr 0x7f66658f7000 len 4091
|
||||
1
|
||||
```
|
||||
|
||||
Restart the wolfHSM server with the same arguments, then rerun the wolfBoot simulator to boot the new firmware and verify the update.
|
||||
|
||||
```sh
|
||||
# In the wolfHSM server terminal window
|
||||
./Build/wh_server_tcp.elf --key /path/to/wolfboot_signing_private_key_pub.der --id 0xFF
|
||||
|
||||
# In the wolfBoot terminal window, run the following to update the image and confirm the update
|
||||
./wolfboot.elf success get_version
|
||||
|
||||
# The output should ultimately print the following, indicating the update was successful
|
||||
|
||||
#... lots of output ...
|
||||
#
|
||||
Boot partition: 0x7f3a2f96b000 (size 745400, version 0x2)
|
||||
Update partition: 0x7f3a2fa6b000 (size 745400, version 0x1)
|
||||
Copy sector 254 (part 0->2)
|
||||
hal_flash_erase addr 0x7f3a2fb6b000 len 4096
|
||||
hal_flash_erase addr 0x7f3a2fa69000 len 4096
|
||||
hal_flash_erase addr 0x7f3a2fa6a000 len 4096
|
||||
hal_flash_erase addr 0x7f3a2fa69000 len 4096
|
||||
hal_flash_erase addr 0x7f3a2fb6a000 len 4096
|
||||
Boot partition: 0x7f3a2f96b000 (size 745400, version 0x2)
|
||||
Booting version: 0x2
|
||||
Simulator assigned ./internal_flash.dd to base 0x7fe902d2e000
|
||||
2
|
||||
```
|
||||
|
|
@ -23,6 +23,7 @@
|
|||
#include <string.h>
|
||||
|
||||
/* wolfBoot headers */
|
||||
#include "hal.h"
|
||||
#include "image.h" /* for RAMFUNCTION */
|
||||
#include "loader.h" /* for wolfBoot_panic */
|
||||
|
||||
|
|
@ -33,6 +34,20 @@
|
|||
#include "IfxScuRcu.h" /* for IfxScuRcu_performReset */
|
||||
#include "Ifx_Ssw_Infra.h" /* for Ifx_Ssw_jumpToFunction */
|
||||
|
||||
#ifdef WOLFBOOT_ENABLE_WOLFHSM_CLIENT
|
||||
/* wolfHSM headers */
|
||||
#include "wolfhsm/wh_error.h"
|
||||
#include "wolfhsm/wh_client.h"
|
||||
#include "wolfhsm/wh_transport_mem.h"
|
||||
|
||||
/* wolfHSM AURIX port headers */
|
||||
#include "tchsm_hh_host.h"
|
||||
#include "tchsm_hsmhost.h"
|
||||
#include "tchsm_config.h"
|
||||
#include "tchsm_common.h"
|
||||
#include "hsm_ipc.h"
|
||||
#endif /* WOLFBOOT_ENABLE_WOLFHSM_CLIENT */
|
||||
|
||||
#define FLASH_MODULE (0)
|
||||
#define UNUSED_PARAMETER (0)
|
||||
#define WOLFBOOT_AURIX_RESET_REASON (0x5742) /* "WB" */
|
||||
|
|
@ -66,6 +81,11 @@ static uint32_t sectorBuffer[WOLFBOOT_SECTOR_SIZE / sizeof(uint32_t)];
|
|||
#define LED_OFF(led)
|
||||
#endif /* WOLFBOOT_AURIX_GPIO_TIMING */
|
||||
|
||||
#ifdef WOLFBOOT_ENABLE_WOLFHSM_CLIENT
|
||||
int hal_hsm_init_connect(void);
|
||||
int hal_hsm_disconnect(void);
|
||||
#endif
|
||||
|
||||
/* Returns the SDK flash type enum based on the address */
|
||||
static IfxFlash_FlashType getFlashTypeFromAddr(uint32_t addr)
|
||||
{
|
||||
|
|
@ -522,3 +542,122 @@ void arch_reboot(void)
|
|||
IfxScuRcu_performReset(IfxScuRcu_ResetType_system,
|
||||
WOLFBOOT_AURIX_RESET_REASON);
|
||||
}
|
||||
|
||||
|
||||
#ifdef WOLFBOOT_ENABLE_WOLFHSM_CLIENT
|
||||
static int _cancelCb(uint16_t cancelSeq);
|
||||
static int _connectCb(void* context, whCommConnected connect);
|
||||
|
||||
/* Client configuration/contexts */
|
||||
static whTransportMemClientContext tmcCtx[1] = {0};
|
||||
static whTransportClientCb tmcCb[1] = {WH_TRANSPORT_MEM_CLIENT_CB};
|
||||
|
||||
/* Globally exported HAL symbols */
|
||||
whClientContext hsmClientCtx = {0};
|
||||
const int hsmClientDevIdHash = WH_DEV_ID_DMA;
|
||||
const int hsmClientDevIdPubKey = WH_DEV_ID;
|
||||
const int hsmClientKeyIdPubKey = 0xFF;
|
||||
#ifdef EXT_ENCRYPT
|
||||
#error "AURIX TC3xx does not support firmware encryption with wolfHSM (yet)"
|
||||
const int hsmClientDevIdCrypt = WH_DEV_ID;
|
||||
const int hsmClientKeyIdCrypt = 0xFF;
|
||||
#endif
|
||||
|
||||
|
||||
static int _cancelCb(uint16_t cancelSeq)
|
||||
{
|
||||
HSM_SHM_CORE0_CANCEL_SEQ = cancelSeq;
|
||||
(void)tchsmHhHost2Hsm_Notify(TCHSM_HOST2HSM_NOTIFY_CANCEL);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int _connectCb(void* context, whCommConnected connect)
|
||||
{
|
||||
int ret;
|
||||
|
||||
switch (connect) {
|
||||
case WH_COMM_CONNECTED:
|
||||
ret = tchsmHhHost2Hsm_Notify(TCHSM_HOST2HSM_NOTIFY_CONNECT);
|
||||
break;
|
||||
case WH_COMM_DISCONNECTED:
|
||||
ret = tchsmHhHost2Hsm_Notify(TCHSM_HOST2HSM_NOTIFY_DISCONNECT);
|
||||
break;
|
||||
default:
|
||||
ret = WH_ERROR_BADARGS;
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int hal_hsm_init_connect(void)
|
||||
{
|
||||
int rc = 0;
|
||||
|
||||
/* init shared memory buffers */
|
||||
uint32_t* req = (uint32_t*)hsmShmCore0CommBuf;
|
||||
uint32_t* resp = (uint32_t*)hsmShmCore0CommBuf + HSM_SHM_CORE0_COMM_BUF_WORDS / 2;
|
||||
whTransportMemConfig tmcCfg[1] = {{
|
||||
.req = req,
|
||||
.req_size = HSM_SHM_CORE0_COMM_BUF_SIZE / 2,
|
||||
.resp = resp,
|
||||
.resp_size = HSM_SHM_CORE0_COMM_BUF_SIZE / 2,
|
||||
}};
|
||||
|
||||
|
||||
/* Client configuration/contexts */
|
||||
whCommClientConfig cc_conf[1] = {{
|
||||
.transport_cb = tmcCb,
|
||||
.transport_context = (void*)tmcCtx,
|
||||
.transport_config = (void*)tmcCfg,
|
||||
.client_id = 1,
|
||||
.connect_cb = _connectCb,
|
||||
}};
|
||||
|
||||
whClientConfig c_conf[1] = {{
|
||||
.comm = cc_conf,
|
||||
.cancelCb = _cancelCb,
|
||||
}};
|
||||
|
||||
rc = hsm_ipc_init();
|
||||
if (rc != WH_ERROR_OK) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
/* init shared memory buffers */
|
||||
for (size_t i=0; i<HSM_SHM_CORE0_COMM_BUF_WORDS; i++) {
|
||||
hsmShmCore0CommBuf[i] = 0;
|
||||
}
|
||||
|
||||
rc = wh_Client_Init(&hsmClientCtx, c_conf);
|
||||
if (rc != WH_ERROR_OK) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = wh_Client_CommInit(&hsmClientCtx, NULL, NULL);
|
||||
if (rc != WH_ERROR_OK) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
int hal_hsm_disconnect(void)
|
||||
{
|
||||
int rc;
|
||||
|
||||
rc = wh_Client_CommClose(&hsmClientCtx);
|
||||
if (rc != 0) {
|
||||
wolfBoot_panic();
|
||||
}
|
||||
|
||||
rc = wh_Client_Cleanup(&hsmClientCtx);
|
||||
if (rc != 0) {
|
||||
wolfBoot_panic();
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
#endif /* WOLFBOOT_ENABLE_WOLFHSM_CLIENT */
|
||||
|
|
|
|||
85
hal/sim.c
85
hal/sim.c
|
|
@ -42,6 +42,12 @@
|
|||
#include "target.h"
|
||||
#include "printf.h"
|
||||
|
||||
#ifdef WOLFBOOT_ENABLE_WOLFHSM_CLIENT
|
||||
#include "wolfhsm/wh_error.h"
|
||||
#include "wolfhsm/wh_client.h"
|
||||
#include "port/posix/posix_transport_tcp.h"
|
||||
#endif /* WOLFBOOT_ENABLE_WOLFHSM_CLIENT */
|
||||
|
||||
/* Global pointer to the internal and external flash base */
|
||||
uint8_t *sim_ram_base;
|
||||
static uint8_t *flash_base;
|
||||
|
|
@ -57,6 +63,42 @@ uint32_t erasefail_address = 0xFFFFFFFF;
|
|||
char **main_argv;
|
||||
int main_argc;
|
||||
|
||||
#ifdef WOLFBOOT_ENABLE_WOLFHSM_CLIENT
|
||||
|
||||
/* Client configuration/contexts */
|
||||
static whTransportClientCb pttccb[1] = {PTT_CLIENT_CB};
|
||||
static posixTransportTcpClientContext tcc[1] = {};
|
||||
static posixTransportTcpConfig mytcpconfig[1] = {{
|
||||
.server_ip_string = "127.0.0.1",
|
||||
.server_port = 23456,
|
||||
}};
|
||||
|
||||
static whCommClientConfig cc_conf[1] = {{
|
||||
.transport_cb = pttccb,
|
||||
.transport_context = (void*)tcc,
|
||||
.transport_config = (void*)mytcpconfig,
|
||||
.client_id = 12,
|
||||
}};
|
||||
static whClientConfig c_conf[1] = {{
|
||||
.comm = cc_conf,
|
||||
}};
|
||||
|
||||
/* Globally exported HAL symbols */
|
||||
whClientContext hsmClientCtx = {0};
|
||||
const int hsmClientDevIdHash = WH_DEV_ID;
|
||||
const int hsmClientDevIdPubKey = WH_DEV_ID;
|
||||
const int hsmClientKeyIdPubKey = 0xFF;
|
||||
#ifdef EXT_ENCRYPT
|
||||
#error "Simulator does not support firmware encryption with wolfHSM(yet)"
|
||||
const int hsmClientDevIdCrypt = WH_DEV_ID;
|
||||
const int hsmClientKeyIdCrypt = 0xFF;
|
||||
#endif
|
||||
|
||||
int hal_hsm_init_connect(void);
|
||||
int hal_hsm_disconnect(void);
|
||||
|
||||
#endif /* WOLFBOOT_ENABLE_WOLFHSM_CLIENT */
|
||||
|
||||
static int mmap_file(const char *path, uint8_t *address, uint8_t** ret_address)
|
||||
{
|
||||
struct stat st = { 0 };
|
||||
|
|
@ -314,3 +356,46 @@ int wolfBoot_dualboot_candidate(void)
|
|||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef WOLFBOOT_ENABLE_WOLFHSM_CLIENT
|
||||
|
||||
|
||||
int hal_hsm_init_connect(void)
|
||||
{
|
||||
int rc = 0;
|
||||
|
||||
rc = wh_Client_Init(&hsmClientCtx, c_conf);
|
||||
if (rc != WH_ERROR_OK) {
|
||||
fprintf(stderr, "Failed to initialize HSM client\n");
|
||||
exit(-1);
|
||||
}
|
||||
|
||||
rc = wh_Client_CommInit(&hsmClientCtx, NULL, NULL);
|
||||
if (rc != WH_ERROR_OK) {
|
||||
fprintf(stderr, "Failed to initialize HSM client communication\n");
|
||||
exit(-1);
|
||||
}
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
|
||||
int hal_hsm_disconnect(void)
|
||||
{
|
||||
int rc = 0;
|
||||
|
||||
rc = wh_Client_CommClose(&hsmClientCtx);
|
||||
if (rc != WH_ERROR_OK) {
|
||||
fprintf(stderr, "Failed to close HSM client connection\n");
|
||||
exit(-1);
|
||||
}
|
||||
|
||||
rc = wh_Client_Cleanup(&hsmClientCtx);
|
||||
if (rc != WH_ERROR_OK) {
|
||||
fprintf(stderr, "Failed to cleanup HSM client\n");
|
||||
exit(-1);
|
||||
}
|
||||
return rc;
|
||||
}
|
||||
|
||||
#endif /* WOLFBOOT_ENABLE_WOLFHSM_CLIENT */
|
||||
|
|
|
|||
|
|
@ -142,6 +142,31 @@ int hal_flash_otp_read(uint32_t flashAddress, void* data, uint32_t length);
|
|||
int hal_flash_test(void);
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef WOLFBOOT_ENABLE_WOLFHSM_CLIENT
|
||||
/* TODO: most of this should be moved to its own HSM shim header */
|
||||
#include "wolfhsm/wh_error.h" /* wolfHSM error codes */
|
||||
#include "wolfhsm/wh_client.h" /* For client API access */
|
||||
#include "wolfhsm/wh_client_crypto.h" /* For client crypto helper API */
|
||||
|
||||
extern whClientContext hsmClientCtx; /* global wolfHSM client context */
|
||||
|
||||
extern const int hsmClientDevIdHash; /* devId for image digest */
|
||||
extern const int hsmClientDevIdPubKey; /* devId for signature verification */
|
||||
#ifdef EXT_ENCRYPTED
|
||||
extern const int hsmClientDevIdCrypt; /* devId for image (enc)decryption */
|
||||
#endif
|
||||
|
||||
extern const int hsmClientKeyIdPubKey; /* KeyId for public key operations */
|
||||
#ifdef EXT_ENCRYPTED
|
||||
extern const int hsmClientKeyIdCrypt; /* KeyId for image (enc/dec)ryption */
|
||||
#endif
|
||||
|
||||
/* Implementation of functions provided by HAL */
|
||||
int hal_hsm_init_connect(void);
|
||||
int hal_hsm_disconnect(void);
|
||||
#endif /* WOLFBOOT_ENABLE_WOLFHSM_CLIENT */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -22,7 +22,6 @@
|
|||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
|
||||
*/
|
||||
|
||||
#ifndef _WOLFBOOT_USER_SETTINGS_H_
|
||||
#define _WOLFBOOT_USER_SETTINGS_H_
|
||||
|
||||
|
|
@ -118,8 +117,10 @@ extern int tolower(int c);
|
|||
# if !defined(WOLFBOOT_TPM)
|
||||
# define NO_ECC_SIGN
|
||||
# define NO_ECC_DHE
|
||||
# define NO_ECC_EXPORT
|
||||
# define NO_ECC_KEY_EXPORT
|
||||
# if !defined(WOLFBOOT_ENABLE_WOLFHSM_CLIENT)
|
||||
# define NO_ECC_EXPORT
|
||||
# define NO_ECC_KEY_EXPORT
|
||||
# endif
|
||||
# else
|
||||
# define HAVE_ECC_KEY_EXPORT
|
||||
# endif
|
||||
|
|
@ -334,7 +335,8 @@ extern int tolower(int c);
|
|||
# define NO_PWDBASED
|
||||
#endif
|
||||
|
||||
#if defined(WOLFBOOT_TPM_SEAL) && defined(WOLFBOOT_ATA_DISK_LOCK)
|
||||
#if (defined(WOLFBOOT_TPM_SEAL) && defined(WOLFBOOT_ATA_DISK_LOCK)) || \
|
||||
defined(WOLFBOOT_ENABLE_WOLFHSM_CLIENT)
|
||||
# define WOLFSSL_BASE64_ENCODE
|
||||
#else
|
||||
# define NO_CODING
|
||||
|
|
@ -407,9 +409,11 @@ extern int tolower(int c);
|
|||
# define WC_NO_RNG
|
||||
# define WC_NO_HASHDRBG
|
||||
# define NO_DEV_RANDOM
|
||||
# define NO_ECC_KEY_EXPORT
|
||||
# if defined(NO_RSA)
|
||||
# if !defined(WOLFBOOT_ENABLE_WOLFHSM_CLIENT)
|
||||
# define NO_ECC_KEY_EXPORT
|
||||
# if defined(NO_RSA)
|
||||
# define NO_ASN
|
||||
# endif
|
||||
# endif
|
||||
#endif
|
||||
|
||||
|
|
@ -516,4 +520,10 @@ extern int tolower(int c);
|
|||
#define XTOLOWER(x) (x)
|
||||
#endif
|
||||
|
||||
#ifdef WOLFBOOT_ENABLE_WOLFHSM_CLIENT
|
||||
#define WOLF_CRYPTO_CB
|
||||
#define HAVE_ANONYMOUS_INLINE_AGGREGATES 1
|
||||
#define WOLFSSL_KEY_GEN
|
||||
#endif /* WOLFBOOT_ENABLE_WOLFHSM_CLIENT */
|
||||
|
||||
#endif /* !_WOLFBOOT_USER_SETTINGS_H_ */
|
||||
|
|
|
|||
|
|
@ -0,0 +1 @@
|
|||
Subproject commit 90f8c8b997d2e75bafc75c027ffb4bd45862c393
|
||||
33
options.mk
33
options.mk
|
|
@ -922,3 +922,36 @@ ifneq ($(WOLFBOOT_PART_ID),)
|
|||
CFLAGS+=-DHDR_IMG_TYPE_APP=$(WOLFBOOT_PART_ID)
|
||||
SIGN_OPTIONS+=--id $(WOLFBOOT_PART_ID)
|
||||
endif
|
||||
|
||||
# wolfHSM options
|
||||
ifeq ($(WOLFHSM_CLIENT),1)
|
||||
LIBDIR := $(dir $(lastword $(MAKEFILE_LIST)))lib
|
||||
WOLFCRYPT_OBJS += \
|
||||
$(LIBDIR)/wolfssl/wolfcrypt/src/cryptocb.o \
|
||||
$(LIBDIR)/wolfssl/wolfcrypt/src/coding.o
|
||||
|
||||
WOLFHSM_CLIENT_OBJS += \
|
||||
$(LIBDIR)/wolfHSM/src/wh_client.o \
|
||||
$(LIBDIR)/wolfHSM/src/wh_client_nvm.o \
|
||||
$(LIBDIR)/wolfHSM/src/wh_client_cryptocb.o \
|
||||
$(LIBDIR)/wolfHSM/src/wh_client_crypto.o \
|
||||
$(LIBDIR)/wolfHSM/src/wh_crypto.o \
|
||||
$(LIBDIR)/wolfHSM/src/wh_utils.o \
|
||||
$(LIBDIR)/wolfHSM/src/wh_comm.o \
|
||||
$(LIBDIR)/wolfHSM/src/wh_message_comm.o \
|
||||
$(LIBDIR)/wolfHSM/src/wh_message_nvm.o \
|
||||
$(LIBDIR)/wolfHSM/src/wh_message_customcb.o
|
||||
#includes
|
||||
CFLAGS += -I"$(LIBDIR)/wolfHSM"
|
||||
# defines
|
||||
CFLAGS += -DWOLFBOOT_ENABLE_WOLFHSM_CLIENT
|
||||
# Make sure we export generated public keys so they can be used to load into
|
||||
# HSM out-of-band
|
||||
KEYGEN_OPTIONS += --exportpubkey --der
|
||||
|
||||
# Default to using public keys on the HSM
|
||||
ifneq ($(WOLFHSM_CLIENT_LOCAL_KEYS),1)
|
||||
KEYGEN_OPTIONS += --nolocalkeys
|
||||
CFLAGS += -DWOLFBOOT_USE_WOLFHSM_PUBKEY_ID
|
||||
endif
|
||||
endif
|
||||
|
|
|
|||
108
src/image.c
108
src/image.c
|
|
@ -189,23 +189,30 @@ static void wolfBoot_verify_signature_ecc(uint8_t key_slot,
|
|||
struct wolfBoot_image *img, uint8_t *sig)
|
||||
{
|
||||
int ret, verify_res = 0;
|
||||
uint8_t *pubkey = keystore_get_buffer(key_slot);
|
||||
int pubkey_sz = keystore_get_size(key_slot);
|
||||
int point_sz = pubkey_sz/2;
|
||||
ecc_key ecc;
|
||||
mp_int r, s;
|
||||
mp_int r, s;
|
||||
#if !defined WOLFBOOT_ENABLE_WOLFHSM_CLIENT || \
|
||||
(defined WOLFBOOT_ENABLE_WOLFHSM_CLIENT && \
|
||||
!defined(WOLFBOOT_USE_WOLFHSM_PUBKEY_ID))
|
||||
uint8_t* pubkey = keystore_get_buffer(key_slot);
|
||||
int pubkey_sz = keystore_get_size(key_slot);
|
||||
int point_sz = pubkey_sz / 2;
|
||||
|
||||
if (pubkey == NULL || pubkey_sz <= 0) {
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(WOLFBOOT_RENESAS_SCEPROTECT) || \
|
||||
defined(WOLFBOOT_RENESAS_TSIP) || \
|
||||
defined(WOLFBOOT_RENESAS_RSIP)
|
||||
ret = wc_ecc_init_ex(&ecc, NULL, RENESAS_DEVID);
|
||||
#elif defined(WOLFBOOT_ENABLE_WOLFHSM_CLIENT)
|
||||
ret = wc_ecc_init_ex(&ecc, NULL, hsmClientDevIdPubKey);
|
||||
#else
|
||||
ret = wc_ecc_init(&ecc);
|
||||
#endif
|
||||
|
||||
if (ret == 0) {
|
||||
#if defined(WOLFBOOT_RENESAS_SCEPROTECT) || \
|
||||
defined(WOLFBOOT_RENESAS_TSIP) || \
|
||||
|
|
@ -221,6 +228,49 @@ static void wolfBoot_verify_signature_ecc(uint8_t key_slot,
|
|||
VERIFY_FN(img, &verify_res, wc_ecc_verify_hash,
|
||||
sig, ECC_IMAGE_SIGNATURE_SIZE,
|
||||
img->sha_hash, WOLFBOOT_SHA_DIGEST_SIZE, &verify_res, &ecc)
|
||||
|
||||
#elif defined(WOLFBOOT_ENABLE_WOLFHSM_CLIENT)
|
||||
|
||||
uint8_t tmpSigBuf[ECC_MAX_SIG_SIZE] = {0};
|
||||
size_t tmpSigSz = sizeof(tmpSigBuf);
|
||||
|
||||
#if defined(WOLFBOOT_USE_WOLFHSM_PUBKEY_ID)
|
||||
/* hardcoded, since not using keystore */
|
||||
const int point_sz = ECC_IMAGE_SIGNATURE_SIZE / 2;
|
||||
|
||||
/* Use the public key ID to verify the signature */
|
||||
ret = wh_Client_EccSetKeyId(&ecc, hsmClientKeyIdPubKey);
|
||||
if (ret != 0) {
|
||||
return;
|
||||
}
|
||||
#else
|
||||
/* First, import public key from the keystore to the local wolfCrypt
|
||||
* struct, then import into wolfHSM key cache for subsequent
|
||||
* verification */
|
||||
ret = wc_ecc_import_unsigned(&ecc, pubkey, pubkey + point_sz, NULL,
|
||||
ECC_KEY_TYPE);
|
||||
if (ret != 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
#endif /* !WOLFBOOT_USE_WOLFHSM_PUBKEY_ID */
|
||||
/* wc_ecc_verify_hash_ex() doesn't trigger a crypto callback, so we need
|
||||
to use wc_ecc_verify_hash instead. Unfortunately, that requires
|
||||
converting the signature to intermediate DER format first */
|
||||
mp_init(&r);
|
||||
mp_init(&s);
|
||||
mp_read_unsigned_bin(&r, sig, point_sz);
|
||||
mp_read_unsigned_bin(&s, sig + point_sz, point_sz);
|
||||
uint32_t rSz = mp_unsigned_bin_size(&r);
|
||||
uint32_t sSz = mp_unsigned_bin_size(&s);
|
||||
ret = wc_ecc_rs_raw_to_sig(sig, rSz, &sig[point_sz], sSz,
|
||||
(byte*)&tmpSigBuf, (word32*)&tmpSigSz);
|
||||
/* Verify the (temporary) DER representation of the signature */
|
||||
if (ret == 0) {
|
||||
VERIFY_FN(img, &verify_res, wc_ecc_verify_hash, tmpSigBuf, tmpSigSz,
|
||||
img->sha_hash, WOLFBOOT_SHA_DIGEST_SIZE, &verify_res,
|
||||
&ecc);
|
||||
}
|
||||
#else
|
||||
/* Import public key */
|
||||
ret = wc_ecc_import_unsigned(&ecc, pubkey, pubkey + point_sz, NULL,
|
||||
|
|
@ -312,14 +362,19 @@ static void wolfBoot_verify_signature_rsa(uint8_t key_slot,
|
|||
int ret;
|
||||
uint8_t output[RSA_IMAGE_SIGNATURE_SIZE];
|
||||
uint8_t* digest_out = NULL;
|
||||
uint8_t *pubkey = keystore_get_buffer(key_slot);
|
||||
int pubkey_sz = keystore_get_size(key_slot);
|
||||
word32 inOutIdx = 0;
|
||||
struct RsaKey rsa;
|
||||
|
||||
#if !defined(WOLFBOOT_ENABLE_WOLFHSM_CLIENT) || \
|
||||
(defined(WOLFBOOT_ENABLE_WOLFHSM_CLIENT) && \
|
||||
!defined(WOLFBOOT_USE_WOLFHSM_PUBKEY_ID))
|
||||
uint8_t *pubkey = keystore_get_buffer(key_slot);
|
||||
int pubkey_sz = keystore_get_size(key_slot);
|
||||
|
||||
if (pubkey == NULL || pubkey_sz < 0) {
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(WOLFBOOT_RENESAS_SCEPROTECT) || \
|
||||
defined(WOLFBOOT_RENESAS_TSIP) || \
|
||||
|
|
@ -335,6 +390,40 @@ static void wolfBoot_verify_signature_rsa(uint8_t key_slot,
|
|||
wolfBoot_image_confirm_signature_ok(img);
|
||||
}
|
||||
(void)digest_out;
|
||||
#elif defined(WOLFBOOT_ENABLE_WOLFHSM_CLIENT)
|
||||
ret = wc_InitRsaKey_ex(&rsa, NULL, hsmClientDevIdPubKey);
|
||||
if (ret != 0) {
|
||||
return;
|
||||
}
|
||||
#if defined(WOLFBOOT_USE_WOLFHSM_PUBKEY_ID)
|
||||
/* public key is stored on server at hsmClientKeyIdPubKey*/
|
||||
ret = wh_Client_RsaSetKeyId(&rsa, hsmClientKeyIdPubKey);
|
||||
if (ret != 0) {
|
||||
return;
|
||||
}
|
||||
#else
|
||||
whKeyId hsmKeyId = WH_KEYID_ERASED;
|
||||
/* Cache the public key on the server */
|
||||
ret = wh_Client_KeyCache(&hsmClientCtx, 0, NULL, 0, pubkey, pubkey_sz,
|
||||
&hsmKeyId);
|
||||
if (ret != WH_ERROR_OK) {
|
||||
return;
|
||||
}
|
||||
/* Associate this RSA struct with the keyId of the cached key */
|
||||
ret = wh_Client_RsaSetKeyId(&rsa, hsmKeyId);
|
||||
if (ret != WH_ERROR_OK) {
|
||||
return;
|
||||
}
|
||||
#endif /* !WOLFBOOT_USE_WOLFHSM_PUBKEY_ID */
|
||||
XMEMCPY(output, sig, RSA_IMAGE_SIGNATURE_SIZE);
|
||||
RSA_VERIFY_FN(ret, wc_RsaSSL_VerifyInline, output, RSA_IMAGE_SIGNATURE_SIZE,
|
||||
&digest_out, &rsa);
|
||||
#if !defined(WOLFBOOT_USE_WOLFHSM_PUBKEY_ID)
|
||||
/* evict the key after use, since we aren't using the RSA import API */
|
||||
if (WH_ERROR_OK != wh_Client_KeyEvict(&hsmClientCtx, hsmKeyId)) {
|
||||
return;
|
||||
}
|
||||
#endif /* !WOLFBOOT_USE_WOLFHSM_PUBKEY_ID */
|
||||
#else
|
||||
/* wolfCrypt software RSA verify */
|
||||
ret = wc_InitRsaKey(&rsa, NULL);
|
||||
|
|
@ -727,7 +816,11 @@ static int image_sha256(struct wolfBoot_image *img, uint8_t *hash)
|
|||
stored_sha_len = get_header(img, HDR_SHA256, &stored_sha);
|
||||
if (stored_sha_len != WOLFBOOT_SHA_DIGEST_SIZE)
|
||||
return -1;
|
||||
#ifdef WOLFBOOT_ENABLE_WOLFHSM_CLIENT
|
||||
(void)wc_InitSha256_ex(&sha256_ctx, NULL, hsmClientDevIdHash);
|
||||
#else
|
||||
wc_InitSha256(&sha256_ctx);
|
||||
#endif
|
||||
end_sha = stored_sha - (2 * sizeof(uint16_t)); /* Subtract 2 Type + 2 Len */
|
||||
while (p < end_sha) {
|
||||
blksz = WOLFBOOT_SHA_BLOCK_SIZE;
|
||||
|
|
@ -1214,6 +1307,9 @@ int wolfBoot_verify_authenticity(struct wolfBoot_image *img)
|
|||
* RENESAS_TSIP_INSTALLEDKEY_ADDR
|
||||
*/
|
||||
key_slot = 0;
|
||||
#elif defined(WOLFBOOT_ENABLE_WOLFHSM_CLIENT) && defined(WOLFBOOT_USE_WOLFHSM_PUBKEY_ID)
|
||||
/* Don't care about the key slot, we are using a fixed wolfHSM keyId */
|
||||
key_slot = 0;
|
||||
#else
|
||||
key_slot = keyslot_id_by_sha(pubkey_hint);
|
||||
if (key_slot < 0) {
|
||||
|
|
|
|||
|
|
@ -104,6 +104,11 @@ int main(void)
|
|||
hal_init();
|
||||
#ifdef TEST_FLASH
|
||||
hal_flash_test();
|
||||
#endif
|
||||
#ifdef WOLFBOOT_ENABLE_WOLFHSM_CLIENT
|
||||
if (0 != hal_hsm_init_connect()) {
|
||||
wolfBoot_panic();
|
||||
}
|
||||
#endif
|
||||
spi_flash_probe();
|
||||
#ifdef UART_FLASH
|
||||
|
|
|
|||
|
|
@ -221,6 +221,9 @@ void RAMFUNCTION wolfBoot_start(void)
|
|||
sata_disable(sata_bar);
|
||||
wolfBoot_printf("Firmware Valid.\r\n");
|
||||
wolfBoot_printf("Booting at %08lx\r\n", os_image.fw_base);
|
||||
#ifdef WOLFBOOT_ENABLE_WOLFHSM_CLIENT
|
||||
(void)hal_hsm_disconnect();
|
||||
#endif
|
||||
hal_prepare_boot();
|
||||
do_boot((uint32_t*)os_image.fw_base);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -952,6 +952,9 @@ void RAMFUNCTION wolfBoot_start(void)
|
|||
WP11_Library_Init();
|
||||
#endif
|
||||
|
||||
#ifdef WOLFBOOT_ENABLE_WOLFHSM_CLIENT
|
||||
(void)hal_hsm_disconnect();
|
||||
#endif
|
||||
hal_prepare_boot();
|
||||
do_boot((void *)boot.fw_base);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -97,6 +97,9 @@ void RAMFUNCTION wolfBoot_start(void)
|
|||
}
|
||||
#ifdef SECURE_PKCS11
|
||||
WP11_Library_Init();
|
||||
#endif
|
||||
#ifdef WOLFBOOT_ENABLE_WOLFHSM_CLIENT
|
||||
(void)hal_hsm_disconnect();
|
||||
#endif
|
||||
hal_prepare_boot();
|
||||
do_boot((void *)(WOLFBOOT_PARTITION_BOOT_ADDRESS + IMAGE_HEADER_SIZE));
|
||||
|
|
|
|||
|
|
@ -326,6 +326,11 @@ backup_on_failure:
|
|||
#endif /* MMU */
|
||||
|
||||
wolfBoot_printf("Booting at %p\n", load_address);
|
||||
|
||||
#ifdef WOLFBOOT_ENABLE_WOLFHSM_CLIENT
|
||||
(void)hal_hsm_disconnect();
|
||||
#endif
|
||||
|
||||
hal_prepare_boot();
|
||||
|
||||
#ifdef MMU
|
||||
|
|
|
|||
|
|
@ -7,7 +7,11 @@ TARGET?=none
|
|||
ARCH?=ARM
|
||||
MCUXPRESSO_CMSIS?=$(MCUXPRESSO)/CMSIS
|
||||
CFLAGS+=-I. -I..
|
||||
CFLAGS+=-I./wcs
|
||||
ifeq ($(TZEN),1)
|
||||
# wcs directory contains a user_settings.h, which will conflict with
|
||||
# the one in the include directory if the test app needs it (e.g. wolfHSM)
|
||||
CFLAGS+=-I./wcs
|
||||
endif
|
||||
DEBUG?=1
|
||||
DELTA_DATA_SIZE?=2000
|
||||
USE_GCC?=1
|
||||
|
|
@ -425,6 +429,12 @@ endif
|
|||
|
||||
CFLAGS+=-I../lib/wolfssl
|
||||
|
||||
ifeq ($(WOLFHSM_CLIENT),1)
|
||||
CFLAGS += -DWOLFSSL_USER_SETTINGS -DSTRING_USER -I../lib/wolfssl
|
||||
APP_OBJS += $(WOLFHSM_CLIENT_OBJS)
|
||||
APP_OBJS += $(sort $(patsubst ./lib/wolfssl/%, ../lib/wolfssl/%, $(WOLFCRYPT_OBJS)))
|
||||
endif
|
||||
|
||||
|
||||
standalone:CFLAGS+=-D"TEST_APP_STANDALONE"
|
||||
standalone:LDFLAGS:=-T standalone.ld -Wl,-gc-sections -Wl,-Map=image.map
|
||||
|
|
|
|||
|
|
@ -82,6 +82,8 @@ ifeq ($(ARCH),)
|
|||
FLASH_OTP_KEYSTORE?=0
|
||||
BIG_ENDIAN?=0
|
||||
FLASH_MULTI_SECTOR_ERASE=0
|
||||
WOLFHSM_CLIENT=0
|
||||
WOLFHSM_CLIENT_LOCAL_KEYS=0
|
||||
endif
|
||||
|
||||
CONFIG_VARS:= ARCH TARGET SIGN HASH MCUXSDK MCUXPRESSO MCUXPRESSO_CPU MCUXPRESSO_DRIVERS \
|
||||
|
|
@ -107,5 +109,6 @@ CONFIG_VARS:= ARCH TARGET SIGN HASH MCUXSDK MCUXPRESSO MCUXPRESSO_CPU MCUXPRESSO
|
|||
KEYVAULT_OBJ_SIZE \
|
||||
KEYVAULT_MAX_ITEMS \
|
||||
NO_ARM_ASM \
|
||||
SIGN_SECONDARY
|
||||
|
||||
SIGN_SECONDARY \
|
||||
WOLFHSM_CLIENT \
|
||||
WOLFHSM_CLIENT_LOCAL_KEYS
|
||||
|
|
|
|||
|
|
@ -119,7 +119,9 @@ static int saveAsDer = 1; /* For Renesas PKA default to save as DER/ASN.1 */
|
|||
#else
|
||||
static int saveAsDer = 0;
|
||||
#endif
|
||||
static int exportPubKey = 0;
|
||||
static WC_RNG rng;
|
||||
static int noLocalKeys = 0;
|
||||
|
||||
#ifndef KEYSLOT_MAX_PUBKEY_SIZE
|
||||
#if defined(KEYSTORE_PUBKEY_SIZE_ML_DSA)
|
||||
|
|
@ -279,7 +281,7 @@ static void usage(const char *pname) /* implies exit */
|
|||
printf("Usage: %s [--ed25519 | --ed448 | --ecc256 | --ecc384 "
|
||||
"| --ecc521 | --rsa2048 | --rsa3072 | --rsa4096 ] "
|
||||
"[-g privkey] [-i pubkey] [-keystoreDir dir] "
|
||||
"[--id {list}] [--der]\n", pname);
|
||||
"[--id {list}] [--der] [--exportpubkey] [--nolocalkeys]\n", pname);
|
||||
exit(125);
|
||||
}
|
||||
|
||||
|
|
@ -356,6 +358,66 @@ static int generated_keypairs_type[MAX_KEYPAIRS];
|
|||
static uint32_t generated_keypairs_id_mask[MAX_KEYPAIRS];
|
||||
static int n_generated = 0;
|
||||
|
||||
static char *append_pub_to_fname(const char *filename) {
|
||||
const char pubSuffix[] = "_pub";
|
||||
const size_t pubSuffixLength = strlen(pubSuffix);
|
||||
|
||||
const char *dotPosition = strchr(filename, '.');
|
||||
|
||||
size_t prefixLength;
|
||||
if (dotPosition != NULL) {
|
||||
prefixLength = dotPosition - filename;
|
||||
} else {
|
||||
prefixLength = strlen(filename);
|
||||
}
|
||||
|
||||
size_t newFilenameLength = prefixLength + pubSuffixLength + (dotPosition ? strlen(dotPosition) : 0) + 1;
|
||||
|
||||
char *newFilename = (char *)malloc(newFilenameLength);
|
||||
if (newFilename == NULL) {
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/* Copy the prefix (part before the period) */
|
||||
memcpy(newFilename, filename, prefixLength);
|
||||
|
||||
/* Append the suffix */
|
||||
memcpy(newFilename + prefixLength, pubSuffix, pubSuffixLength);
|
||||
|
||||
/* Append the rest of the original filename if a period was found */
|
||||
if (dotPosition != NULL) {
|
||||
strcpy(newFilename + prefixLength + pubSuffixLength, dotPosition);
|
||||
} else {
|
||||
newFilename[prefixLength + pubSuffixLength] = '\0'; /* Null-terminate the string if no period */
|
||||
}
|
||||
|
||||
return newFilename;
|
||||
}
|
||||
|
||||
static int export_pubkey_file(const char *prvKeyFile, uint8_t *pubDer, size_t pubLen)
|
||||
{
|
||||
FILE *fpub;
|
||||
char *fname;
|
||||
|
||||
fname = append_pub_to_fname(prvKeyFile);
|
||||
if (fname == NULL) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
fpub = fopen(fname, "wb");
|
||||
if (fpub == NULL) {
|
||||
fprintf(stderr, "Unable to open file '%s' for writing: %s",
|
||||
fname, strerror(errno));
|
||||
free(fname);
|
||||
return -1;
|
||||
}
|
||||
fwrite(pubDer, pubLen, 1, fpub);
|
||||
fclose(fpub);
|
||||
free(fname);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static uint32_t get_pubkey_size(uint32_t keyType)
|
||||
{
|
||||
uint32_t size = 0;
|
||||
|
|
@ -408,13 +470,25 @@ void keystore_add(uint32_t ktype, uint8_t *key, uint32_t sz, const char *keyfile
|
|||
size_t slot_size;
|
||||
|
||||
fprintf(fpub, Slot_hdr, keyfile, id_slot, KType[ktype], id_mask, sz);
|
||||
fwritekey(key, sz, fpub);
|
||||
if (noLocalKeys) {
|
||||
/* If noLocalKeys is set by caller, we should write a zero key to the
|
||||
* keystore array, as the key material should not be local to the device
|
||||
*/
|
||||
uint8_t *zero_key = calloc(sz, sizeof(uint8_t));
|
||||
fwritekey(zero_key, sz, fpub);
|
||||
free(zero_key);
|
||||
} else {
|
||||
fwritekey(key, sz, fpub);
|
||||
}
|
||||
fprintf(fpub, Pubkey_footer);
|
||||
fprintf(fpub, Slot_footer);
|
||||
printf("Associated key file: %s\n", keyfile);
|
||||
printf("Partition ids mask: %08x\n", id_mask);
|
||||
printf("Key type : %s\n", KName[ktype]);
|
||||
printf("Public key slot: %u\n", id_slot);
|
||||
if (noLocalKeys) {
|
||||
printf("WARNING: --nolocalkeys flag used, keystore.c public key is zeroed\n");
|
||||
}
|
||||
|
||||
memset(&sl, 0, sizeof(sl));
|
||||
sl.slot_id = id_slot;
|
||||
|
|
@ -481,6 +555,13 @@ static void keygen_rsa(const char *keyfile, int kbits, uint32_t id_mask)
|
|||
fwrite(priv_der, privlen, 1, fpriv);
|
||||
fclose(fpriv);
|
||||
|
||||
if (exportPubKey) {
|
||||
if (export_pubkey_file(keyfile, pub_der, publen) != 0) {
|
||||
fprintf(stderr, "Unable to export public key to file\n");
|
||||
exit(5);
|
||||
}
|
||||
}
|
||||
|
||||
if (kbits == 2048)
|
||||
keystore_add(KEYGEN_RSA2048, pub_der, publen, keyfile, id_mask);
|
||||
else if (kbits == 3072)
|
||||
|
|
@ -534,8 +615,6 @@ static void keygen_ecc(const char *priv_fname, uint16_t ecc_key_size,
|
|||
exit(3);
|
||||
}
|
||||
|
||||
wc_ecc_free(&k);
|
||||
|
||||
fpriv = fopen(priv_fname, "wb");
|
||||
if (fpriv == NULL) {
|
||||
fprintf(stderr, "Unable to open file '%s' for writing: %s", priv_fname,
|
||||
|
|
@ -555,6 +634,37 @@ static void keygen_ecc(const char *priv_fname, uint16_t ecc_key_size,
|
|||
}
|
||||
fclose(fpriv);
|
||||
|
||||
if (exportPubKey) {
|
||||
int pubOutLen;
|
||||
/* Reuse priv_der buffer for public key */
|
||||
memset(priv_der, 0, sizeof(priv_der));
|
||||
|
||||
if (saveAsDer) {
|
||||
/* If you want public key also exported as a DER file and not as RAW
|
||||
* point. Note that this is the expected format if loading the public
|
||||
* key into wolfHSM */
|
||||
pubOutLen = ret =
|
||||
wc_EccPublicKeyToDer(&k, priv_der, (word32)sizeof(priv_der), 1);
|
||||
}
|
||||
else {
|
||||
memcpy(priv_der, Qx, qxsize);
|
||||
memcpy(priv_der + qxsize, Qy, qysize);
|
||||
pubOutLen = qxsize + qysize;
|
||||
}
|
||||
if (ret < 0) {
|
||||
fprintf(stderr, "Unable to export public key to DER, ret=%d\n",
|
||||
ret);
|
||||
exit(4);
|
||||
}
|
||||
if (export_pubkey_file(priv_fname, priv_der, pubOutLen) != 0) {
|
||||
fprintf(stderr, "Unable to export public key to file\n");
|
||||
exit(4);
|
||||
}
|
||||
ret = 0;
|
||||
}
|
||||
|
||||
wc_ecc_free(&k);
|
||||
|
||||
memcpy(k_buffer, Qx, ecc_key_size);
|
||||
memcpy(k_buffer + ecc_key_size, Qy, ecc_key_size);
|
||||
|
||||
|
|
@ -595,6 +705,14 @@ static void keygen_ed25519(const char *privkey, uint32_t id_mask)
|
|||
fwrite(priv, 32, 1, fpriv);
|
||||
fwrite(pub, 32, 1, fpriv);
|
||||
fclose(fpriv);
|
||||
|
||||
if (exportPubKey) {
|
||||
if (export_pubkey_file(privkey, pub, ED25519_PUB_KEY_SIZE) != 0) {
|
||||
fprintf(stderr, "Unable to export public key to file\n");
|
||||
exit(4);
|
||||
}
|
||||
}
|
||||
|
||||
keystore_add(KEYGEN_ED25519, pub, ED25519_PUB_KEY_SIZE, privkey, id_mask);
|
||||
}
|
||||
#endif
|
||||
|
|
@ -626,6 +744,14 @@ static void keygen_ed448(const char *privkey, uint32_t id_mask)
|
|||
fwrite(priv, ED448_KEY_SIZE, 1, fpriv);
|
||||
fwrite(pub, ED448_PUB_KEY_SIZE, 1, fpriv);
|
||||
fclose(fpriv);
|
||||
|
||||
if (exportPubKey) {
|
||||
if (export_pubkey_file(privkey, pub, ED448_PUB_KEY_SIZE) != 0) {
|
||||
fprintf(stderr, "Unable to export public key to file\n");
|
||||
exit(4);
|
||||
}
|
||||
}
|
||||
|
||||
keystore_add(KEYGEN_ED448, pub, ED448_PUB_KEY_SIZE, privkey, id_mask);
|
||||
}
|
||||
#endif
|
||||
|
|
@ -706,6 +832,13 @@ static void keygen_lms(const char *priv_fname, uint32_t id_mask)
|
|||
fwrite(lms_pub, KEYSTORE_PUBKEY_SIZE_LMS, 1, fpriv);
|
||||
fclose(fpriv);
|
||||
|
||||
if (exportPubKey) {
|
||||
if (export_pubkey_file(priv_fname, lms_pub, KEYSTORE_PUBKEY_SIZE_LMS) != 0) {
|
||||
fprintf(stderr, "Unable to export public key to file\n");
|
||||
exit(1);
|
||||
}
|
||||
}
|
||||
|
||||
keystore_add(KEYGEN_LMS, lms_pub, KEYSTORE_PUBKEY_SIZE_LMS, priv_fname, id_mask);
|
||||
|
||||
wc_LmsKey_Free(&key);
|
||||
|
|
@ -796,6 +929,14 @@ static void keygen_xmss(const char *priv_fname, uint32_t id_mask)
|
|||
fwrite(xmss_pub, KEYSTORE_PUBKEY_SIZE_XMSS, 1, fpriv);
|
||||
fclose(fpriv);
|
||||
|
||||
if (exportPubKey) {
|
||||
if (export_pubkey_file(priv_fname, xmss_pub, KEYSTORE_PUBKEY_SIZE_XMSS) != 0) {
|
||||
fprintf(stderr, "Unable to export public key to file\n");
|
||||
exit(1);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
keystore_add(KEYGEN_XMSS, xmss_pub, KEYSTORE_PUBKEY_SIZE_XMSS, priv_fname, id_mask);
|
||||
|
||||
wc_XmssKey_Free(&key);
|
||||
|
|
@ -1172,6 +1313,9 @@ int main(int argc, char** argv)
|
|||
else if (strcmp(argv[i], "--der") == 0) {
|
||||
saveAsDer = 1;
|
||||
}
|
||||
else if (strcmp(argv[i], "--nolocalkeys") == 0) {
|
||||
noLocalKeys = 1;
|
||||
}
|
||||
else if (strcmp(argv[i], "-g") == 0) {
|
||||
key_gen_check(argv[i + 1]);
|
||||
i++;
|
||||
|
|
@ -1182,6 +1326,11 @@ int main(int argc, char** argv)
|
|||
n_generated++;
|
||||
continue;
|
||||
}
|
||||
else if (strcmp(argv[i], "--exportpubkey") == 0) {
|
||||
key_gen_check(argv[i + 1]);
|
||||
exportPubKey = 1;
|
||||
continue;
|
||||
}
|
||||
else if (strcmp(argv[i], "-i") == 0) {
|
||||
i++;
|
||||
n_pubkeys++;
|
||||
|
|
|
|||
|
|
@ -2,4 +2,6 @@
|
|||
|
||||
set -euxo pipefail
|
||||
|
||||
(cd ../../../ && tools/keytools/keygen --rsa4096 -g priv.der)
|
||||
# Note the --der option is required for wolfHSM compatibility
|
||||
# If you want to use the built-in keystore for testing, remove the --nolocalkeys option
|
||||
(cd ../../../ && tools/keytools/keygen --ecc256 -g priv.der --exportpubkey --nolocalkeys --der)
|
||||
|
|
|
|||
|
|
@ -2,5 +2,5 @@
|
|||
|
||||
set -euxo pipefail
|
||||
|
||||
../../keytools/sign --rsa4096 --sha256 "../../../IDE/AURIX/test-app/TriCore Debug (GCC)/test-app.bin" ../../../priv.der 1
|
||||
../../keytools/sign --rsa4096 --sha256 "../../../IDE/AURIX/test-app/TriCore Debug (GCC)/test-app.bin" ../../../priv.der 2
|
||||
../../keytools/sign --ecc256 --sha256 "../../../IDE/AURIX/test-app/TriCore Debug (GCC)/test-app.bin" ../../../priv.der 1
|
||||
../../keytools/sign --ecc256 --sha256 "../../../IDE/AURIX/test-app/TriCore Debug (GCC)/test-app.bin" ../../../priv.der 2
|
||||
|
|
|
|||
|
|
@ -2,5 +2,5 @@
|
|||
|
||||
set -euxo pipefail
|
||||
|
||||
../../keytools/sign --rsa4096 --sha256 "../../../IDE/AURIX/test-app/TriCore Release (GCC)/test-app.bin" ../../../priv.der 1
|
||||
../../keytools/sign --rsa4096 --sha256 "../../../IDE/AURIX/test-app/TriCore Release (GCC)/test-app.bin" ../../../priv.der 2
|
||||
../../keytools/sign --ecc256 --sha256 "../../../IDE/AURIX/test-app/TriCore Release (GCC)/test-app.bin" ../../../priv.der 1
|
||||
../../keytools/sign --ecc256 --sha256 "../../../IDE/AURIX/test-app/TriCore Release (GCC)/test-app.bin" ../../../priv.der 2
|
||||
|
|
|
|||
|
|
@ -6,10 +6,14 @@ TARGET_H_TEMPLATE=../../../include/target.h.in
|
|||
TARGET_H_FILE=../../../include/target.h
|
||||
|
||||
WOLFBOOT_SECTOR_SIZE=0x4000
|
||||
WOLFBOOT_PARTITION_SIZE=0x180000
|
||||
# Partition size determinded by the following:
|
||||
# 3M PFLASH bank, minus one sector (swap), divided in half
|
||||
WOLFBOOT_PARTITION_SIZE=0x17E000
|
||||
WOLFBOOT_PARTITION_BOOT_ADDRESS=0xA0300000
|
||||
WOLFBOOT_PARTITION_UPDATE_ADDRESS=0xA0480000
|
||||
WOLFBOOT_PARTITION_SWAP_ADDRESS=0xA0020000
|
||||
WOLFBOOT_PARTITION_UPDATE_ADDRESS=0xA047E000
|
||||
# Last sector in PFLASH1 allocated to swap
|
||||
WOLFBOOT_PARTITION_SWAP_ADDRESS=0xA05FC000
|
||||
|
||||
WOLFBOOT_DTS_BOOT_ADDRESS=
|
||||
WOLFBOOT_DTS_UPDATE_ADDRESS=
|
||||
WOLFBOOT_LOAD_ADDRESS=
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@ flash.erase all
|
|||
|
||||
flash.reprogram all /erase
|
||||
data.load.binary "&testApp" 0xA0300000
|
||||
data.load.binary "&updateApp" 0xA0480000
|
||||
data.load.binary "&updateApp" 0xA047E000
|
||||
data.load.elf "&wolfBoot"
|
||||
flash.reprogram off
|
||||
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@ flash.erase all
|
|||
|
||||
flash.reprogram all /erase
|
||||
data.load.binary "&testApp" 0xA0300000
|
||||
data.load.binary "&updateApp" 0xA0480000
|
||||
data.load.binary "&updateApp" 0xA047E000
|
||||
data.load.elf "&wolfBoot"
|
||||
flash.reprogram off
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,5 @@
|
|||
# NVM config file for wolfHSM whnvmtool to create NVM image based on generated keys
|
||||
#
|
||||
# Key format is:
|
||||
# key <clientId> <keyId> <access> <flags> <label> <file>
|
||||
key 0x1 0xFF 0xFF 0x00 "wolfBoot ECC Pubkey" ../../../priv_pub.der
|
||||
|
|
@ -0,0 +1,34 @@
|
|||
system.down
|
||||
system.up
|
||||
|
||||
|
||||
LOCAL &wolfBoot &testApp &updateApp
|
||||
&wolfBoot="..\..\..\IDE\AURIX\wolfBoot-tc3xx-wolfHSM\TriCore Debug (GCC)\wolfBoot-tc3xx-wolfHSM.elf"
|
||||
&testApp="..\..\..\IDE\AURIX\test-app\TriCore Debug (GCC)\test-app_v1_signed.bin"
|
||||
&updateApp="..\..\..\IDE\AURIX\test-app\TriCore Debug (GCC)\test-app_v2_signed.bin"
|
||||
|
||||
DO ~~/demo/tricore/flash/tc37x.cmm PREPAREONLY
|
||||
|
||||
flash.CHANGEtype 0xA0000000--0xA009FFFF NOP
|
||||
flash.CHANGEtype 0xAFC00000--0xAFC10000 NOP
|
||||
|
||||
FLASH.Erase 0xA00A0000--0xA05FFFFF
|
||||
flash.reprogram all /erase
|
||||
|
||||
data.load.binary "&testApp" 0xA0300000
|
||||
data.load.binary "&updateApp" 0xA047E000
|
||||
data.load.elf "&wolfBoot"
|
||||
flash.reprogram off
|
||||
|
||||
break.set core0_main
|
||||
|
||||
system.down
|
||||
system.up
|
||||
;go
|
||||
|
||||
; Bring up the important views
|
||||
SYStem
|
||||
Frame /Locals /Caller
|
||||
List
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,34 @@
|
|||
system.down
|
||||
system.up
|
||||
|
||||
|
||||
LOCAL &wolfBoot &testApp &updateApp
|
||||
&wolfBoot="..\..\..\IDE\AURIX\wolfBoot-tc3xx-wolfHSM\TriCore Release (GCC)\wolfBoot-tc3xx-wolfHSM.elf"
|
||||
&testApp="..\..\..\IDE\AURIX\test-app\TriCore Release (GCC)\test-app_v1_signed.bin"
|
||||
&updateApp="..\..\..\IDE\AURIX\test-app\TriCore Release (GCC)\test-app_v2_signed.bin"
|
||||
|
||||
DO ~~/demo/tricore/flash/tc37x.cmm PREPAREONLY
|
||||
|
||||
flash.CHANGEtype 0xA0000000--0xA009FFFF NOP
|
||||
flash.CHANGEtype 0xAFC00000--0xAFC10000 NOP
|
||||
|
||||
FLASH.Erase 0xA00A0000--0xA05FFFFF
|
||||
flash.reprogram all /erase
|
||||
|
||||
data.load.binary "&testApp" 0xA0300000
|
||||
data.load.binary "&updateApp" 0xA047E000
|
||||
data.load.elf "&wolfBoot"
|
||||
flash.reprogram off
|
||||
|
||||
break.set core0_main
|
||||
|
||||
system.down
|
||||
system.up
|
||||
;go
|
||||
|
||||
; Bring up the important views
|
||||
SYStem
|
||||
Frame /Locals /Caller
|
||||
List
|
||||
|
||||
|
||||
Loading…
Reference in New Issue