mirror of https://github.com/wolfSSL/wolfBoot.git
uart: add a non-blocking uart_rx() to the PL011 consoles
David Garske
parent
aef57a113d
commit
8d34051e6e
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@ -5577,6 +5577,10 @@ xilinx-vmk180-20242 login:
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Inflating a 24 MB kernel takes about 7 s on the A72, spent entirely between the `Decompressing` and `Decompressed` lines with no intermediate output. Do not mistake that gap for a hang.
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**Console input**
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`DEBUG_UART=1` provides the console output path, and `uart_rx()` the matching non-blocking receive: it returns 1 when a character was read and 0 when the receive FIFO is empty. This is the only input path, as wolfBoot links `-nostdlib` and there is no C library `getchar()` behind it. Declare it as `extern int uart_rx(uint8_t *c);` rather than including `uart_drv.h`, which also declares `uart_tx()` and `uart_init()` with signatures this HAL does not use. When wolfBoot runs at EL2 the port is left exactly as the PLM configured it, so `uart_rx()` sets `UARTCR.RXE` itself on first use and touches nothing else. Blocking on input from a hook such as `wolfBoot_hook_postinit()` is safe: wolfBoot imposes no timeout of its own at that point.
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**Diagnosing a boot that stops with no message**
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wolfBoot runs at EL2 on Versal, where any abort is fatal. With `DEBUG_UART=1` (the default in both Versal example configs) the handlers print the syndrome:
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@ -5589,7 +5593,7 @@ FAR_EL2: 0x00000000F9200000
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*** SYSTEM HALTED ***
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```
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`ESR_EL2[31:26]` is the exception class, `[5:0]` the fault status, and `FAR_EL2` the faulting address. A stop with no such banner is not an exception - check the PLM's `PMC EAM` output on the same UART. Error IDs `0xA`/`0xB` are `DDRMB_CR`/`DDRMB_NCR`, DDR controller correctable and uncorrectable errors, which the PLM logs without acting on.
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`ESR_EL2[31:26]` is the exception class, `[5:0]` the fault status, and `FAR_EL2` the faulting address. An instruction abort (exception class `0x21`) reporting `ELR_EL2` and `FAR_EL2` as zero is a call through a null or unresolved function pointer rather than a bad data access. A stop with no such banner is not an exception - check the PLM's `PMC EAM` output on the same UART. Error IDs `0xA`/`0xB` are `DDRMB_CR`/`DDRMB_NCR`, DDR controller correctable and uncorrectable errors, which the PLM logs without acting on.
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**Boot Performance**
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22
hal/raspi3.c
22
hal/raspi3.c
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@ -47,6 +47,7 @@
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/* PL011 UART registers */
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#define UART0_BASE GPIO_BASE + 0x1000
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#define UART0_DR ((volatile unsigned int*)(UART0_BASE+0x00))
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#define UART0_RSR ((volatile unsigned int*)(UART0_BASE+0x04))
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#define UART0_FR ((volatile unsigned int*)(UART0_BASE+0x18))
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#define UART0_IBRD ((volatile unsigned int*)(UART0_BASE+0x24))
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#define UART0_FBRD ((volatile unsigned int*)(UART0_BASE+0x28))
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@ -142,6 +143,27 @@ void uart_tx(char c)
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*UART0_DR = c;
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}
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/* Non-blocking receive. Returns 1 when a character was read, 0 otherwise. */
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int uart_rx(uint8_t *c)
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{
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unsigned int dr;
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/* receive fifo empty */
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if (*UART0_FR & 0x10)
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return 0;
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dr = *UART0_DR;
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if (dr & 0xF00) {
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/* overrun, break, parity or framing error: drop the character and
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* clear the sticky receive status */
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*UART0_RSR = 0;
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return 0;
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}
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*c = (uint8_t)(dr & 0xFF);
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return 1;
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}
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char uart_read(void)
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{
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char c;
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27
hal/versal.c
27
hal/versal.c
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@ -232,6 +232,33 @@ void uart_write(const char *buf, uint32_t len)
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;
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}
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/* Non-blocking receive. Returns 1 when a character was read, 0 otherwise. */
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int uart_rx(uint8_t *c)
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{
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uint32_t dr;
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if ((UART_CR & UART_CR_RXE) == 0) {
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/* At EL2 the port is left exactly as PLM configured it, and PLM only
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* needs to transmit its own log. Enabling receive on its own does not
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* disturb the baud rate or frame format already in place. */
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UART_CR |= UART_CR_RXE;
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}
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if (UART_FR & UART_FR_RXFE)
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return 0;
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dr = UART_DR;
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if (dr & UART_DR_ERR_MASK) {
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/* Overrun, break, parity or framing error: drop the character and
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* clear the sticky receive status. */
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UART_RSR = 0;
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return 0;
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}
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*c = (uint8_t)(dr & UART_DR_DATA_MASK);
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return 1;
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}
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#else
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#define uart_init() do {} while(0)
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#endif /* DEBUG_UART */
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@ -190,6 +190,14 @@
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#define UART_IMSC UART_REG(UART_IMSC_OFFSET)
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#define UART_ICR UART_REG(UART_ICR_OFFSET)
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/* Data Register (UARTDR) bits - receive side */
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#define UART_DR_OE (1UL << 11) /* Overrun error */
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#define UART_DR_BE (1UL << 10) /* Break error */
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#define UART_DR_PE (1UL << 9) /* Parity error */
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#define UART_DR_FE (1UL << 8) /* Framing error */
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#define UART_DR_ERR_MASK (0xFUL << 8)
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#define UART_DR_DATA_MASK 0xFFUL
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/* Flag Register (UARTFR) bits - Status */
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#define UART_FR_RI (1UL << 8) /* Ring indicator */
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#define UART_FR_TXFE (1UL << 7) /* TX FIFO empty */
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@ -140,6 +140,8 @@ TESTS+=unit-imx95-ele
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TESTS+=unit-imx95-disk
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TESTS+=unit-versal-ext-write
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TESTS+=unit-versal-wdt
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TESTS+=unit-versal-uart-rx
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TESTS+=unit-raspi3-uart-rx
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TESTS+=unit-t10xx-qe-firmware
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TESTS+=unit-t10xx-flash-status
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TESTS+=unit-p1021-erase-advance
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@ -1599,6 +1601,28 @@ versal_wdt_extract.h: ../../hal/versal.c
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unit-versal-wdt: unit-versal-wdt.c versal_wdt_extract.h versal_host.h
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gcc -o $@ unit-versal-wdt.c -DTARGET_versal $(CFLAGS) $(LDFLAGS)
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# unit-versal-uart-rx runs the real uart_rx() from hal/versal.c against
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# an emulated PL011 register block. UART_REG() resolves to an absolute
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# MMIO address, so the function is extracted verbatim and the test
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# redefines the accessor over a local array.
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versal_uart_rx_extract.h: ../../hal/versal.c
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sed -n '/^int uart_rx(/,/^}/p' $< > $@
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test -s $@
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unit-versal-uart-rx: unit-versal-uart-rx.c versal_uart_rx_extract.h versal_host.h
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gcc -o $@ unit-versal-uart-rx.c -DARCH_AARCH64 -DARCH_64BIT $(CFLAGS) $(LDFLAGS)
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# unit-raspi3-uart-rx runs the real uart_rx() from hal/raspi3.c, the
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# other PL011 console in the tree, against an emulated register block.
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# Its accessors are absolute MMIO pointers, so the function is extracted
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# verbatim and the test redefines them over a local array.
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raspi3_uart_rx_extract.h: ../../hal/raspi3.c
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sed -n '/^int uart_rx(/,/^}/p' $< > $@
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test -s $@
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unit-raspi3-uart-rx: unit-raspi3-uart-rx.c raspi3_uart_rx_extract.h
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gcc -o $@ unit-raspi3-uart-rx.c $(CFLAGS) $(LDFLAGS)
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# unit-t10xx-qe-firmware runs the real qe_check_firmware() from
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# hal/nxp_t10xx.c (the per-microcode code_offset was never
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# bounded against the declared image, so a self-consistent blob could
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@ -2246,7 +2270,8 @@ GENERATED_SRC:=aurix_erased_extract.h \
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t2080_fman_extract.h \
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ti_hercules_write_extract.h versal_ext_write_extract.h versal_host.c \
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versal_wdt_extract.h \
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versal_host.h versal_qspidev_extract.h zynq_erase_extract.h \
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versal_host.h versal_qspidev_extract.h versal_uart_rx_extract.h \
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raspi3_uart_rx_extract.h zynq_erase_extract.h \
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bbram_crc_extract.h efuse_guards_extract.h \
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zynq_write_extract.h \
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fat32-test.img fat32-test.img.tmp fat32-payload.bin fat32-nested.bin \
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@ -0,0 +1,135 @@
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/* unit-raspi3-uart-rx.c
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*
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* Exercises the real uart_rx() from hal/raspi3.c against an emulated
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* PL011 register block. The register accessors are absolute MMIO
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* pointers, so the Makefile extracts the function verbatim and they are
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* redefined over a local array below before it is included.
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*
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* Copyright (C) 2026 wolfSSL Inc.
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*
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* This file is part of wolfBoot.
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*
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* wolfBoot is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* wolfBoot is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
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*/
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#include <check.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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/* Emulated register block, indexed by register offset. */
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static unsigned int uart_regs[0x20];
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#define UART0_DR ((volatile unsigned int*)&uart_regs[0x00 / 4])
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#define UART0_RSR ((volatile unsigned int*)&uart_regs[0x04 / 4])
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#define UART0_FR ((volatile unsigned int*)&uart_regs[0x18 / 4])
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#define RXFE 0x10
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#include "raspi3_uart_rx_extract.h"
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static void setup(void)
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{
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memset(uart_regs, 0, sizeof(uart_regs));
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}
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static void teardown(void)
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{
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}
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START_TEST(test_empty_fifo_returns_zero)
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{
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uint8_t c = 0xA5;
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*UART0_FR = RXFE;
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*UART0_DR = 'x';
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ck_assert_int_eq(uart_rx(&c), 0);
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ck_assert_uint_eq(c, 0xA5);
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}
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END_TEST
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START_TEST(test_character_received)
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{
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uint8_t c = 0;
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*UART0_FR = 0;
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*UART0_DR = 'a';
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ck_assert_int_eq(uart_rx(&c), 1);
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ck_assert_uint_eq(c, 'a');
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}
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END_TEST
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/* Bits above the data field must not reach the caller. The receive
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* error field at [11:8] is covered by test_receive_error_dropped. */
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START_TEST(test_status_bits_masked_off)
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{
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uint8_t c = 0;
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*UART0_FR = 0;
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*UART0_DR = 0xF000U | 'b';
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ck_assert_int_eq(uart_rx(&c), 1);
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ck_assert_uint_eq(c, 'b');
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}
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END_TEST
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START_TEST(test_receive_error_dropped)
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{
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const unsigned int err[4] = { 0x800, 0x400, 0x200, 0x100 };
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uint8_t c;
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int i;
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for (i = 0; i < 4; i++) {
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c = 0xA5;
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*UART0_FR = 0;
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*UART0_DR = err[i] | 'c';
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*UART0_RSR = 0xF;
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ck_assert_int_eq(uart_rx(&c), 0);
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ck_assert_uint_eq(c, 0xA5);
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ck_assert_uint_eq(*UART0_RSR, 0);
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}
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}
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END_TEST
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Suite *raspi3_uart_rx_suite(void)
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{
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Suite *s = suite_create("raspi3-uart-rx");
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TCase *tc = tcase_create("raspi3-uart-rx");
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tcase_add_checked_fixture(tc, setup, teardown);
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tcase_add_test(tc, test_empty_fifo_returns_zero);
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tcase_add_test(tc, test_character_received);
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tcase_add_test(tc, test_status_bits_masked_off);
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tcase_add_test(tc, test_receive_error_dropped);
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suite_add_tcase(s, tc);
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return s;
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}
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int main(void)
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{
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int fails;
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Suite *s = raspi3_uart_rx_suite();
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SRunner *sr = srunner_create(s);
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srunner_run_all(sr, CK_NORMAL);
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fails = srunner_ntests_failed(sr);
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srunner_free(sr);
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return fails;
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}
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@ -0,0 +1,164 @@
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/* unit-versal-uart-rx.c
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*
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* Exercises the real uart_rx() from hal/versal.c against an emulated
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* PL011 register block. The receive path cannot be exercised on the
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* VMK180 on hand, whose console FT4232H does not enumerate.
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*
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* UART_REG() resolves to an absolute MMIO address, so the Makefile
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* extracts the function verbatim and it is redefined over a local
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* array below before the function is included.
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*
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* Copyright (C) 2026 wolfSSL Inc.
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*
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* This file is part of wolfBoot.
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*
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* wolfBoot is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* wolfBoot is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
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*/
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#include <check.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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/* The PL011 register offsets and bit masks, from hal/versal.h. */
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#include "versal_host.h"
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/* Emulated register block, indexed by register offset. */
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static uint32_t uart_regs[0x20];
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#undef UART_REG
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#define UART_REG(offset) (uart_regs[(offset) / 4])
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#include "versal_uart_rx_extract.h"
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static void setup(void)
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{
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memset(uart_regs, 0, sizeof(uart_regs));
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UART_CR = UART_CR_UARTEN | UART_CR_TXE | UART_CR_RXE;
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}
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static void teardown(void)
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{
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}
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/* PLM configures the port for its own log output, which needs transmit
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* only, and at EL2 uart_init() leaves it that way. */
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START_TEST(test_receive_enabled_without_disturbing_port)
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{
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uint8_t c = 0;
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UART_CR = UART_CR_UARTEN | UART_CR_TXE;
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UART_IBRD = 81;
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UART_FBRD = 24;
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UART_LCR = UART_LCR_WLEN_8 | UART_LCR_FEN;
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UART_FR = UART_FR_RXFE;
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ck_assert_int_eq(uart_rx(&c), 0);
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ck_assert(UART_CR & UART_CR_RXE);
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ck_assert(UART_CR & UART_CR_UARTEN);
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ck_assert(UART_CR & UART_CR_TXE);
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ck_assert_uint_eq(UART_IBRD, 81);
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ck_assert_uint_eq(UART_FBRD, 24);
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ck_assert_uint_eq(UART_LCR, UART_LCR_WLEN_8 | UART_LCR_FEN);
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}
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END_TEST
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START_TEST(test_empty_fifo_returns_zero)
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{
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uint8_t c = 0xA5;
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UART_FR = UART_FR_RXFE;
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UART_DR = 'x';
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ck_assert_int_eq(uart_rx(&c), 0);
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ck_assert_uint_eq(c, 0xA5);
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}
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END_TEST
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START_TEST(test_character_received)
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{
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uint8_t c = 0;
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UART_FR = 0;
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UART_DR = 'a';
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ck_assert_int_eq(uart_rx(&c), 1);
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ck_assert_uint_eq(c, 'a');
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}
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END_TEST
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/* Bits above the data field must not reach the caller. The receive
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* error field at [11:8] is covered by test_receive_error_dropped. */
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START_TEST(test_status_bits_masked_off)
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{
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uint8_t c = 0;
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UART_FR = 0;
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UART_DR = 0xF000UL | 'b';
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ck_assert_int_eq(uart_rx(&c), 1);
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ck_assert_uint_eq(c, 'b');
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}
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END_TEST
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START_TEST(test_receive_error_dropped)
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{
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const uint32_t err[4] = {
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UART_DR_OE, UART_DR_BE, UART_DR_PE, UART_DR_FE
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};
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uint8_t c;
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int i;
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||||
|
||||
for (i = 0; i < 4; i++) {
|
||||
c = 0xA5;
|
||||
UART_FR = 0;
|
||||
UART_DR = err[i] | 'c';
|
||||
UART_RSR = 0xF;
|
||||
|
||||
ck_assert_int_eq(uart_rx(&c), 0);
|
||||
ck_assert_uint_eq(c, 0xA5);
|
||||
ck_assert_uint_eq(UART_RSR, 0);
|
||||
}
|
||||
}
|
||||
END_TEST
|
||||
|
||||
Suite *versal_uart_rx_suite(void)
|
||||
{
|
||||
Suite *s = suite_create("versal-uart-rx");
|
||||
TCase *tc = tcase_create("versal-uart-rx");
|
||||
|
||||
tcase_add_checked_fixture(tc, setup, teardown);
|
||||
tcase_add_test(tc, test_receive_enabled_without_disturbing_port);
|
||||
tcase_add_test(tc, test_empty_fifo_returns_zero);
|
||||
tcase_add_test(tc, test_character_received);
|
||||
tcase_add_test(tc, test_status_bits_masked_off);
|
||||
tcase_add_test(tc, test_receive_error_dropped);
|
||||
suite_add_tcase(s, tc);
|
||||
|
||||
return s;
|
||||
}
|
||||
|
||||
int main(void)
|
||||
{
|
||||
int fails;
|
||||
Suite *s = versal_uart_rx_suite();
|
||||
SRunner *sr = srunner_create(s);
|
||||
|
||||
srunner_run_all(sr, CK_NORMAL);
|
||||
fails = srunner_ntests_failed(sr);
|
||||
srunner_free(sr);
|
||||
|
||||
return fails;
|
||||
}
|
||||
Loading…
Reference in New Issue