mirror of https://github.com/wolfSSL/wolfBoot.git
Fixed IMX-RT-1060 flash driver, working update
Daniele Lacamera
parent
c26d2c0517
commit
9186c263a2
12
arch.mk
12
arch.mk
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@ -137,19 +137,9 @@ ifeq ($(TARGET),imx_rt)
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-I$(MCUXPRESSO)/components/serial_manager/ \
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-DCPU_$(MCUXPRESSO_CPU) -I$(MCUXPRESSO_CMSIS)/Include -DDEBUG_CONSOLE_ASSERT_DISABLE=1 -I$(MCUXPRESSO_DRIVERS)/project_template/ \
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-I$(MCUXPRESSO)/boards/evkmimxrt1060/xip/ -DXIP_EXTERNAL_FLASH=1 -DDEBUG_CONSOLE_ASSERT_DISABLE=1 -DPRINTF_ADVANCED_ENABLE=1 \
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-DSCANF_ADVANCED_ENABLE=1 -DSERIAL_PORT_TYPE_UART=1
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-DSCANF_ADVANCED_ENABLE=1 -DSERIAL_PORT_TYPE_UART=1 -DNDEBUG=1
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OBJS+= $(MCUXPRESSO)/middleware/mflash/mimxrt1062/mflash_drv.o $(MCUXPRESSO_DRIVERS)/drivers/fsl_dcp.o \
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$(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o $(MCUXPRESSO_DRIVERS)/drivers/fsl_flexspi.o
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OBJS+= $(MCUXPRESSO_DRIVERS)/utilities/str/fsl_str.o \
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$(MCUXPRESSO)/components/uart/lpuart_adapter.o \
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$(MCUXPRESSO)/components/serial_manager/serial_manager.o \
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$(MCUXPRESSO)/components/lists/generic_list.o \
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$(MCUXPRESSO)/components/serial_manager/serial_port_uart.o \
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$(MCUXPRESSO_DRIVERS)/drivers/fsl_lpuart.o \
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$(MCUXPRESSO_DRIVERS)/utilities/debug_console/fsl_debug_console.o \
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$(MCUXPRESSO)/components/flash/nor/flexspi/fsl_flexspi_nor_flash.o \
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$(MCUXPRESSO_DRIVERS)/system_MIMXRT1062.o
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ifeq ($(PKA),1)
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PKA_EXTRA_OBJS+=\
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$(MCUXPRESSO_DRIVERS)/drivers/fsl_dcp.o \
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284
hal/imx_rt.c
284
hal/imx_rt.c
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@ -34,11 +34,153 @@
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#include "imx_rt_nor.h"
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#include "xip/fsl_flexspi_nor_boot.h"
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#define FLASH_PAGE_SIZE WOLFBOOT_SECTOR_SIZE
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#ifdef __WOLFBOOT
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/** Built-in ROM API for bootloaders **/
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typedef void rtwdog_config_t;
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typedef void wdog_config_t;
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/* Watchdog structures */
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typedef struct
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{
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void (*RTWDOG_GetDefaultConfig)(rtwdog_config_t *config);
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void (*RTWDOG_Init)(RTWDOG_Type *base, const rtwdog_config_t *config);
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void (*RTWDOG_Deinit)(RTWDOG_Type *base);
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void (*RTWDOG_Enable)(RTWDOG_Type *base);
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void (*RTWDOG_Disable)(RTWDOG_Type *base);
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void (*RTWDOG_EnableInterrupts)(RTWDOG_Type *base, uint32_t mask);
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void (*RTWDOG_DisableInterrupts)(RTWDOG_Type *base, uint32_t mask);
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uint32_t (*RTWDOG_GetStatusFlags)(RTWDOG_Type *base);
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void (*RTWDOG_ClearStatusFlags)(RTWDOG_Type *base, uint32_t mask);
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void (*RTWDOG_SetTimeoutValue)(RTWDOG_Type *base, uint16_t timeoutCount);
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void (*RTWDOG_SetWindowValue)(RTWDOG_Type *base, uint16_t windowValue);
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void (*RTWDOG_Unlock)(RTWDOG_Type *base);
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void (*RTWDOG_Refresh)(RTWDOG_Type *base);
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uint16_t (*RTWDOG_GetCounterValue)(RTWDOG_Type *base);
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} rtwdog_driver_interface_t;
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typedef struct
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{
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void (*WDOG_GetDefaultConfig)(wdog_config_t *config);
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void (*WDOG_Init)(WDOG_Type *base, const wdog_config_t *config);
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void (*WDOG_Deinit)(WDOG_Type *base);
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void (*WDOG_Enable)(WDOG_Type *base);
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void (*WDOG_Disable)(WDOG_Type *base);
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void (*WDOG_EnableInterrupts)(WDOG_Type *base, uint16_t mask);
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uint16_t (*WDOG_GetStatusFlags)(WDOG_Type *base);
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void (*WDOG_ClearInterruptStatus)(WDOG_Type *base, uint16_t mask);
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void (*WDOG_SetTimeoutValue)(WDOG_Type *base, uint16_t timeoutCount);
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void (*WDOG_SetInterrputTimeoutValue)(WDOG_Type *base, uint16_t timeoutCount);
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void (*WDOG_DisablePowerDownEnable)(WDOG_Type *base);
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void (*WDOG_Refresh)(WDOG_Type *base);
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} wdog_driver_interface_t;
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/* Flex SPI op */
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typedef enum _FlexSPIOperationType
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{
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kFlexSpiOperation_Command, //!< FlexSPI operation: Only command, both TX and
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//! RX buffer are ignored.
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kFlexSpiOperation_Config, //!< FlexSPI operation: Configure device mode, the
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//! TX FIFO size is fixed in LUT.
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kFlexSpiOperation_Write, //!< FlexSPI operation: Write, only TX buffer is
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//! effective
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kFlexSpiOperation_Read, //!< FlexSPI operation: Read, only Rx Buffer is
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//! effective.
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kFlexSpiOperation_End = kFlexSpiOperation_Read,
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} flexspi_operation_t;
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/* FLEX SPI Xfer */
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typedef struct _FlexSpiXfer
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{
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flexspi_operation_t operation;
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uint32_t baseAddress;
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uint32_t seqId;
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uint32_t seqNum;
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bool isParallelModeEnable;
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uint32_t *txBuffer;
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uint32_t txSize;
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uint32_t *rxBuffer;
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uint32_t rxSize;
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} flexspi_xfer_t;
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/* Serial NOR config option */
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typedef struct _serial_nor_config_option
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{
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union
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{
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struct
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{
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uint32_t max_freq : 4; //!< Maximum supported Frequency
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uint32_t misc_mode : 4; //!< miscellaneous mode
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uint32_t quad_mode_setting : 4; //!< Quad mode setting
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uint32_t cmd_pads : 4; //!< Command pads
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uint32_t query_pads : 4; //!< SFDP read pads
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uint32_t device_type : 4; //!< Device type
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uint32_t option_size : 4; //!< Option size, in terms of uint32_t, size = (option_size + 1) * 4
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uint32_t tag : 4; //!< Tag, must be 0x0E
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} B;
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uint32_t U;
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} option0;
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union
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{
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struct
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{
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uint32_t dummy_cycles : 8; //!< Dummy cycles before read
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uint32_t reserved0 : 8; //!< Reserved for future use
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uint32_t pinmux_group : 4; //!< The pinmux group selection
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uint32_t reserved1 : 8; //!< Reserved for future use
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uint32_t flash_connection : 4; //!< Flash connection option: 0 - Single Flash connected to port A
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} B;
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uint32_t U;
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} option1;
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} serial_nor_config_option_t;
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/* NOR flash API */
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typedef struct
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{
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uint32_t version;
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status_t (*init)(uint32_t instance, flexspi_nor_config_t *config);
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status_t (*program)(uint32_t instance, flexspi_nor_config_t *config, uint32_t
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dst_addr, const uint32_t *src);
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status_t (*erase_all)(uint32_t instance, flexspi_nor_config_t *config);
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status_t (*erase)(uint32_t instance, flexspi_nor_config_t *config, uint32_t start,
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uint32_t lengthInBytes);
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status_t (*read)(
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uint32_t instance, flexspi_nor_config_t *config, uint32_t *dst, uint32_t addr,
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uint32_t lengthInBytes);
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void (*clear_cache)(uint32_t instance);
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status_t (*xfer)(uint32_t instance, flexspi_xfer_t *xfer);
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status_t (*update_lut)(uint32_t instance, uint32_t seqIndex, const uint32_t
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*lutBase, uint32_t seqNumber);
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status_t (*get_config)(uint32_t instance, flexspi_nor_config_t *config,
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serial_nor_config_option_t *option);
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} flexspi_nor_driver_interface_t;
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/* Root pointer */
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typedef struct
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{
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const uint32_t version; //!< Bootloader version number
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const char *copyright; //!< Bootloader Copyright
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void (*runBootloader)(void *arg); //!< Function to start the bootloader executing
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const uint32_t *reserved0; //!< Reserved
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const flexspi_nor_driver_interface_t *flexSpiNorDriver; //!< FlexSPI NOR Flash API
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const uint32_t *reserved1; //!< Reserved
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const rtwdog_driver_interface_t *rtwdogDriver;
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const wdog_driver_interface_t *wdogDriver;
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const uint32_t *reserved2;
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} bootloader_api_entry_t;
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bootloader_api_entry_t *g_bootloaderTree;
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flexspi_nor_config_t flexspi_config;
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/** Flash configuration in the .flash_config section of flash **/
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const flexspi_nor_config_t __attribute__((section(".flash_config"))) qspiflash_config = {
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.memConfig =
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{
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@ -123,8 +265,77 @@ const clock_video_pll_config_t videoPllConfig_BOARD_BootClockRUN =
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};
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static int nor_flash_init(void);
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static void clock_init(void)
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{
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if (CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_BYPASS_MASK)
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{
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// Configure ARM_PLL
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CCM_ANALOG->PLL_ARM =
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CCM_ANALOG_PLL_ARM_BYPASS(1) | CCM_ANALOG_PLL_ARM_ENABLE(1) | CCM_ANALOG_PLL_ARM_DIV_SELECT(24);
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// Wait Until clock is locked
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while ((CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_LOCK_MASK) == 0)
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{
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}
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// Configure PLL_SYS
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CCM_ANALOG->PLL_SYS &= ~CCM_ANALOG_PLL_SYS_POWERDOWN_MASK;
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// Wait Until clock is locked
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while ((CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_LOCK_MASK) == 0)
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{
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}
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// Configure PFD_528
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CCM_ANALOG->PFD_528 = CCM_ANALOG_PFD_528_PFD0_FRAC(24) | CCM_ANALOG_PFD_528_PFD1_FRAC(24) |
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CCM_ANALOG_PFD_528_PFD2_FRAC(19) | CCM_ANALOG_PFD_528_PFD3_FRAC(24);
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// Configure USB1_PLL
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CCM_ANALOG->PLL_USB1 =
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CCM_ANALOG_PLL_USB1_DIV_SELECT(0) | CCM_ANALOG_PLL_USB1_POWER(1) | CCM_ANALOG_PLL_USB1_ENABLE(1);
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while ((CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_LOCK_MASK) == 0)
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{
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}
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CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_BYPASS_MASK;
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// Configure PFD_480
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CCM_ANALOG->PFD_480 = CCM_ANALOG_PFD_480_PFD0_FRAC(35) | CCM_ANALOG_PFD_480_PFD1_FRAC(35) |
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CCM_ANALOG_PFD_480_PFD2_FRAC(26) | CCM_ANALOG_PFD_480_PFD3_FRAC(15);
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// Configure Clock PODF
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CCM->CACRR = CCM_CACRR_ARM_PODF(1);
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CCM->CBCDR = (CCM->CBCDR & (~(CCM_CBCDR_SEMC_PODF_MASK | CCM_CBCDR_AHB_PODF_MASK | CCM_CBCDR_IPG_PODF_MASK))) |
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CCM_CBCDR_SEMC_PODF(2) | CCM_CBCDR_AHB_PODF(2) | CCM_CBCDR_IPG_PODF(2);
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// Configure FLEXSPI2 CLOCKS
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CCM->CBCMR =
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(CCM->CBCMR &
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(~(CCM_CBCMR_PRE_PERIPH_CLK_SEL_MASK | CCM_CBCMR_FLEXSPI2_CLK_SEL_MASK | CCM_CBCMR_FLEXSPI2_PODF_MASK))) |
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CCM_CBCMR_PRE_PERIPH_CLK_SEL(3) | CCM_CBCMR_FLEXSPI2_CLK_SEL(1) | CCM_CBCMR_FLEXSPI2_PODF(7);
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// Confgiure FLEXSPI CLOCKS
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CCM->CSCMR1 = ((CCM->CSCMR1 &
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~(CCM_CSCMR1_FLEXSPI_CLK_SEL_MASK | CCM_CSCMR1_FLEXSPI_PODF_MASK | CCM_CSCMR1_PERCLK_PODF_MASK |
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CCM_CSCMR1_PERCLK_CLK_SEL_MASK)) |
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CCM_CSCMR1_FLEXSPI_CLK_SEL(3) | CCM_CSCMR1_FLEXSPI_PODF(7) | CCM_CSCMR1_PERCLK_PODF(1));
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// Finally, Enable PLL_ARM, PLL_SYS and PLL_USB1
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CCM_ANALOG->PLL_ARM &= ~CCM_ANALOG_PLL_ARM_BYPASS_MASK;
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CCM_ANALOG->PLL_SYS &= ~CCM_ANALOG_PLL_SYS_BYPASS_MASK;
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CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_BYPASS_MASK;
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}
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}
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extern void ARM_MPU_Disable(void);
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void hal_init(void)
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{
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ARM_MPU_Disable();
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g_bootloaderTree = (bootloader_api_entry_t *)*(uint32_t *)0x0020001c;
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clock_init();
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nor_flash_init();
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}
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void hal_prepare_boot(void)
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@ -133,60 +344,29 @@ void hal_prepare_boot(void)
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#endif
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flexspi_mem_config_t flexcfg = {
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.deviceConfig =
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{
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.flexspiRootClk = 120000000,
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.flashSize = FLASH_SIZE,
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.CSIntervalUnit = kFLEXSPI_CsIntervalUnit1SckCycle,
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.CSInterval = 2,
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.CSHoldTime = 3,
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.CSSetupTime = 3,
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.dataValidTime = 0,
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.columnspace = 0,
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.enableWordAddress = 0,
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.AHBWriteWaitUnit = kFLEXSPI_AhbWriteWaitUnit2AhbCycle,
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.AHBWriteWaitInterval = 0,
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},
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.devicePort = kFLEXSPI_PortA1,
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.deviceType = kSerialNorCfgOption_DeviceType_ReadSFDP_SDR,
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.quadMode = kSerialNorQuadMode_NotConfig,
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.transferMode = kSerialNorTransferMode_SDR,
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.enhanceMode = kSerialNorEnhanceMode_Disabled,
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.commandPads = kFLEXSPI_1PAD,
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.queryPads = kFLEXSPI_1PAD,
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.statusOverride = 0,
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.busyOffset = 0,
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.busyBitPolarity = 0,
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};
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static nor_config_t norConfig = {
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.memControlConfig = &flexcfg,
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.driverBaseAddr = FLEXSPI,
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};
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static nor_handle_t norHandle = {NULL};
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void FLEXSPI_ClockInit();
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static serial_nor_config_option_t flexspi_cfg_option = {};
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static int nor_flash_init(void)
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{
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status_t status;
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FLEXSPI_ClockInit();
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return Nor_Flash_Init(&norConfig, &norHandle);
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flexspi_cfg_option.option0.U = 0xC0000007; /* QuadSPI-NOR, f = default */
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g_bootloaderTree->flexSpiNorDriver->get_config(0, &flexspi_config, &flexspi_cfg_option);
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g_bootloaderTree->flexSpiNorDriver->init(0, &flexspi_config);
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return 0;
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}
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#define FLASH_PAGE_SIZE 0x100
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int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
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{
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/*
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status_t status;
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status = Nor_Flash_Page_Program(&norHandle, address, data);
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if (kStatus_Success != status)
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return -1;
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*/
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uint32_t wbuf[FLASH_PAGE_SIZE / 4];
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int i;
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for (i = 0; i < len; i+= FLASH_PAGE_SIZE) {
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memcpy(wbuf, data + i, FLASH_PAGE_SIZE);
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status = g_bootloaderTree->flexSpiNorDriver->program(0, &flexspi_config, (address + i) - FLASH_BASE, wbuf);
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if (kStatus_Success != status)
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return -1;
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}
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return 0;
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}
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@ -200,16 +380,10 @@ void RAMFUNCTION hal_flash_lock(void)
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int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
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{
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/*
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uint32_t end = address + len - 1;
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uint32_t p;
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status_t status;
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for (p = address; p <= end; p += FLASH_PAGE_SIZE) {
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status = Nor_Flash_Erase_Sector(&norHandle, address);
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if (status != kStatus_Success)
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return -1;
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}
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*/
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status = g_bootloaderTree->flexSpiNorDriver->erase(0, &flexspi_config, address - FLASH_BASE, len);
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if (status != kStatus_Success)
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return -1;
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return 0;
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}
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@ -2,7 +2,7 @@
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MEMORY
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{
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FLASH(rx) : ORIGIN = 0x60000000, LENGTH = ##WOLFBOOT_PARTITION_BOOT_ADDRESS##
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RAM(rwx) : ORIGIN = 0x20000000, LENGTH = 0x00020000
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RAM(rwx) : ORIGIN = 0x20000000, LENGTH = 0x0001FFF0
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}
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/* Define output sections */
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@ -81,17 +81,21 @@ ifeq ($(TARGET),imx_rt)
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-I$(MCUXPRESSO_DRIVERS)/project_template/ -I$(MCUXPRESSO)/boards/evkmimxrt1060/xip/ \
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-I$(MCUXPRESSO_DRIVERS)/utilities/debug_console/ -I$(MCUXPRESSO)/components/serial_manager \
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-I$(MCUXPRESSO)/components/uart/ -I$(MCUXPRESSO_DRIVERS)/utilities/str/ \
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-DPRINTF_ADVANCED_ENABLE=1 -DSCANF_ADVANCED_ENABLE=1 -DSERIAL_PORT_TYPE_UART=1
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-I$(MCUXPRESSO)/components/flash/nor \
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-I$(MCUXPRESSO)/components/flash/nor/flexspi \
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-DPRINTF_ADVANCED_ENABLE=1 -DSCANF_ADVANCED_ENABLE=1 -DSERIAL_PORT_TYPE_UART=1 -DNDEBUG=1
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LDFLAGS+=-mcpu=cortex-m7 -Wall --specs=nosys.specs -fno-common -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -mthumb -mapcs -Xlinker --gc-sections -Xlinker -static -Xlinker -z -Xlinker muldefs -Xlinker -Map=output.map -static -lm -lc -lnosys
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LSCRIPT_TEMPLATE=imx_rt.ld
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APP_OBJS+=$(MCUXPRESSO_DRIVERS)/drivers/fsl_gpio.o $(MCUXPRESSO_DRIVERS)/drivers/fsl_common.o $(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o \
|
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imx_rt_board.o imx_rt_pin_mux.o imx_rt_clock_config.o $(MCUXPRESSO_DRIVERS)/system_MIMXRT1062.o \
|
||||
$(MCUXPRESSO_DRIVERS)/drivers/fsl_flexspi.o \
|
||||
$(MCUXPRESSO_DRIVERS)/utilities/str/fsl_str.o \
|
||||
$(MCUXPRESSO)/components/uart/lpuart_adapter.o \
|
||||
$(MCUXPRESSO)/components/uart/lpuart_adapter.o \
|
||||
$(MCUXPRESSO)/components/serial_manager/serial_manager.o \
|
||||
$(MCUXPRESSO)/components/lists/generic_list.o \
|
||||
$(MCUXPRESSO)/components/serial_manager/serial_port_uart.o \
|
||||
$(MCUXPRESSO_DRIVERS)/drivers/fsl_lpuart.o \
|
||||
$(MCUXPRESSO)/components/flash/nor/flexspi/fsl_flexspi_nor_flash.o \
|
||||
$(MCUXPRESSO_DRIVERS)/utilities/debug_console/fsl_debug_console.o
|
||||
endif
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue