WolfSSL
/
wolfBoot
mirror of https://github.com/wolfSSL/wolfBoot.git
1
0
Fork 0
Code Issues Releases Wiki Activity

Fixes for long jump. Targets.md fix for RAM_CODE typo.

pull/14/head
David Garske 2019-06-12 17:25:38 +02:00
parent 7a28c9efa4
commit 92ed57832f
5 changed files with 50 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Makefile
View File

@ -153,6 +153,7 @@ test-app/image.bin:
KINETIS_CMSIS=$(KINETIS_CMSIS) NVM_FLASH_WRITEONCE=$(NVM_FLASH_WRITEONCE) \
FREEDOM_E_SDK=$(FREEDOM_E_SDK)
@rm -f src/*.o hal/*.o
@$(SIZE) test-app/image.elf
include tools/test.mk

8
docs/Targets.md
View File

@ -64,8 +64,8 @@ For testing wolfBoot here are the changes required:
* TARGET=hifive1
```
make ARCH=RISCV TARGET=hifive1 RAMCODE=1 clean
make ARCH=RISCV TARGET=hifive1 RAMCODE=1
make ARCH=RISCV TARGET=hifive1 RAM_CODE=1 clean
make ARCH=RISCV TARGET=hifive1 RAM_CODE=1
```
If using the `riscv64-unknown-elf-` cross compiler you can add `CROSS_COMPILE=riscv64-unknown-elf-` to your `make` or modify `arch.mk` as follows:
@ -119,3 +119,7 @@ In another terminal:
riscv64-unknown-elf-gdb wolfboot.elf -ex "set remotetimeout 240" -ex "target extended-remote localhost:3333"
add-symbol-file test-app/image.elf 0x20020100
```
```
riscv64-unknown-elf-objdump -D test-app/image.elf
```

49
hal/hifive1.c
View File

@ -58,9 +58,11 @@
#define FESPI_TXDATA_FIFO_FULL (1 << 31)
#define FESPI_FMT_DIR_TX (1 << 3)
#define FESPI_CSMODE_AUTO 0
#define FESPI_CSMODE_HOLD 2
#define FESPI_CSMODE_OFF 3
#define FESPI_CSMODE_AUTO 0x0UL
#define FESPI_CSMODE_HOLD 0x2UL
#define FESPI_CSMODE_MASK 0x3UL
#define FESPI_FCTRL_MODE_SEL 0x1UL
#define FESPI_FFMT_CMD_EN 0x1
#define FESPI_FFMT_ADDR_LEN(x) (((x) & 0x7) << 1)
@ -84,7 +86,7 @@
#define FESPI_PROTO_D 1 /* Dual */
#define FESPI_PROTO_Q 2 /* Quad */
//#define SPI_QUAD_MODE
/* SPI Flash Commands */
#define FESPI_READ_ID 0x9F /* Read Flash Identification */
#define FESPI_READ_MID 0xAF /* Read Flash Identification, multi-io */
@ -93,7 +95,11 @@
#define FESPI_PAGE_PROGRAM 0x02 /* Page Program */
#define FESPI_FAST_READ 0x0B /* Fast Read */
#define FESPI_READ 0x03 /* Normal Read */
#ifdef SPI_QUAD_MODE
#define FESPI_ERASE_SECTOR 0x20 /* Sector Erase */
#else
#define FESPI_ERASE_SECTOR 0xD7 /* Sector Erase */
#endif
/* SPI flash status fields (from FESPI_READ_STATUS command) */
#define FESPI_RX_BSY (1 << 0)
@ -258,41 +264,42 @@ void fespi_init(uint32_t cpu_clock, uint32_t flash_freq)
FESPI_REG_SCKDIV |= FESPI_SCKDIV_VAL(cpu_clock, flash_freq);
}
static inline void fespi_swmode(void)
static RAMFUNCTION void fespi_swmode(void)
{
if (FESPI_REG_FCTRL & 1)
FESPI_REG_FCTRL &= ~1UL;
if (FESPI_REG_FCTRL & FESPI_FCTRL_MODE_SEL)
FESPI_REG_FCTRL &= ~FESPI_FCTRL_MODE_SEL;
}
static inline void fespi_hwmode(void)
static RAMFUNCTION void fespi_hwmode(void)
{
if ((FESPI_REG_FCTRL & 1) == 0)
FESPI_REG_FCTRL |= 1;
if ((FESPI_REG_FCTRL & FESPI_FCTRL_MODE_SEL) == 0)
FESPI_REG_FCTRL |= FESPI_FCTRL_MODE_SEL;
}
static inline void fespi_csmode_hold(void)
static RAMFUNCTION void fespi_csmode_hold(void)
{
uint32_t reg = FESPI_REG_CSMODE & (~ 0x03);
FESPI_REG_CSMODE = reg | FESPI_CSMODE_HOLD;
FESPI_REG_CSMODE & ~FESPI_CSMODE_MASK;
FESPI_REG_CSMODE |= FESPI_CSMODE_HOLD;
}
static inline void fespi_csmode_auto(void)
static RAMFUNCTION void fespi_csmode_auto(void)
{
FESPI_REG_CSMODE &= (~0x03);
FESPI_REG_CSMODE & ~FESPI_CSMODE_MASK;
FESPI_REG_CSMODE |= FESPI_CSMODE_AUTO;
}
static inline void fespi_wait_txwm(void)
static RAMFUNCTION void fespi_wait_txwm(void)
{
while((FESPI_REG_IP & FESPI_IP_TXWM) == 0);
}
static inline void fespi_sw_tx(uint8_t b)
static RAMFUNCTION void fespi_sw_tx(uint8_t b)
{
while((FESPI_REG_TXDATA & FESPI_TXDATA_FIFO_FULL) != 0);
FESPI_REG_TXDATA = b;
}
static inline uint8_t fespi_sw_rx(void)
static RAMFUNCTION uint8_t fespi_sw_rx(void)
{
volatile uint32_t reg;
do {
@ -301,7 +308,7 @@ static inline uint8_t fespi_sw_rx(void)
return (uint8_t)(reg & 0xFF);
}
static inline void fespi_sw_setdir(int tx)
static RAMFUNCTION void fespi_sw_setdir(int tx)
{
if (tx)
FESPI_REG_FMT |= FESPI_FMT_DIR_TX;
@ -309,14 +316,14 @@ static inline void fespi_sw_setdir(int tx)
FESPI_REG_FMT &= ~FESPI_FMT_DIR_TX;
}
static inline void fespi_write_address(uint32_t address)
static RAMFUNCTION void fespi_write_address(uint32_t address)
{
fespi_sw_tx((address & 0xFF0000) >> 16);
fespi_sw_tx((address & 0xFF00) >> 8);
fespi_sw_tx((address & 0xFF));
}
static inline void fespi_wait_flash_busy(void)
static RAMFUNCTION void fespi_wait_flash_busy(void)
{
uint8_t rx;
fespi_sw_setdir(FESPI_DIR_RX);

6
src/boot_riscv.c
View File

@ -75,7 +75,13 @@ void __attribute__((naked,section(".init"))) _reset(void) {
void do_boot(const uint32_t *app_offset)
{
#if 1
/* workaround for long jump */
asm volatile("la a2, reloc_iv;" \
"jalr a2" ::: "a2");
#else
reloc_iv(app_offset);
#endif
asm volatile("jr %0":: "r"((uint8_t *)(app_offset)));
}

11
test-app/hifive1.c
View File

@ -61,7 +61,7 @@ static int check(uint8_t *pkt, int size)
return -1;
}
volatile void RAMFUNCTION write_page(uint32_t dst)
static RAMFUNCTION void write_page(uint32_t dst)
{
hal_flash_erase(dst, PAGESIZE);
hal_flash_write(dst, flash_page, PAGESIZE);
@ -132,8 +132,15 @@ void main(void) {
memcpy(&flash_page[recv_seq % PAGESIZE], msg + 8, psize);
flash_page_idx += psize;
if ((flash_page_idx == PAGESIZE) || (next_seq + psize >= tot_len)) {
uint32_t dst = (WOLFBOOT_PARTITION_UPDATE_ADDRESS + recv_seq + psize) - flash_page_idx;
uint32_t dst = ((WOLFBOOT_PARTITION_UPDATE_ADDRESS - 0x20000000) + recv_seq + psize) - flash_page_idx;
#if 1
/* workaround for long jump */
asm volatile("mv a0, %0;" \
"la a2, write_page;" \
"jalr a2" :: "r" (dst) : "a2");
#else
write_page(dst);
#endif
memset(flash_page, 0xFF, PAGESIZE);
}
next_seq += psize;