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wolfBoot
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Introducing RAMCODE tag to transfer functions to RAM 

- Moved functions in the flash write path to RAM, so their execution
does not depend on flash access

- RAMCODE can be enabled via "make RAM_CODE=1"
pull/7/head
Daniele Lacamera 2019-04-19 08:59:31 +02:00
parent 043bc2798f
commit 937e9d46fb
11 changed files with 122 additions and 99 deletions
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5
Makefile
View File

@ -23,6 +23,7 @@ ALLOW_DOWNGRADE?=0
NVM_FLASH_WRITEONCE?=0
V?=0
SPMATH?=1
RAM_CODE?=0
@ -80,6 +81,10 @@ CFLAGS+=-Wall -Wextra -Wno-main -Wstack-usage=1024 -ffreestanding -Wno-unused \
-DWOLFSSL_USER_SETTINGS \
-DPLATFORM_$(TARGET)
ifeq ($(RAM_CODE),1)
CFLAGS+= -DRAM_CODE
endif
ifeq ($(SPI_FLASH),1)
EXT_FLASH=1
CFLAGS+= -DSPI_FLASH=1

9
hal/cc26x2.c
View File

@ -25,6 +25,7 @@
#include "ti-lib.h"
#include "target.h" /* For WOLFBOOT_SECTOR_SIZE */
#include "image.h"
extern void clock_init(void);
char uart_read(void)
@ -42,7 +43,7 @@ int uart_read_nonblock(char *c)
}
int hal_flash_write(uint32_t address, const uint8_t *data, int len)
int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
{
FlashProgram(data, address, len);
while(FlashCheckFsmForReady() != FAPI_STATUS_FSM_READY)
@ -50,16 +51,16 @@ int hal_flash_write(uint32_t address, const uint8_t *data, int len)
return 0;
}
void hal_flash_unlock(void)
void RAMFUNCTION hal_flash_unlock(void)
{
}
void hal_flash_lock(void)
void RAMFUNCTION hal_flash_lock(void)
{
}
int hal_flash_erase(uint32_t address, int len)
int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
{
int i = 0;
while (len > 0) {

9
hal/hifive1.c
View File

@ -21,6 +21,7 @@
#include <stdint.h>
#include <target.h>
#include "image.h"
#ifndef ARCH_RISCV
# error "wolfBoot hifive1 HAL: wrong architecture selected. Please compile with ARCH=RISCV."
#endif
@ -37,21 +38,21 @@ void hal_prepare_boot(void)
#endif
int hal_flash_write(uint32_t address, const uint8_t *data, int len)
int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
{
return 0;
}
void hal_flash_unlock(void)
void RAMFUNCTION hal_flash_unlock(void)
{
}
void hal_flash_lock(void)
void RAMFUNCTION hal_flash_lock(void)
{
}
int hal_flash_erase(uint32_t address, int len)
int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
{
return 0;
}

4
hal/hifive1.ld
View File

@ -33,10 +33,12 @@ SECTIONS
_global_pointer = . + 0x800;
*(.sdata*)
. = ALIGN(4);
KEEP(*(.ramcode*))
. = ALIGN(4);
_end_data = .;
} > RAM
.bss :
.bss (NOLOAD) :
{
_start_bss = .;
*(.bss*)

9
hal/kinetis.c
View File

@ -21,6 +21,7 @@
#include <stdint.h>
#include <target.h>
#include "image.h"
#include "fsl_common.h"
#include "fsl_flash.h"
#include "fsl_ftfx_cache.h"
@ -300,7 +301,7 @@ static void do_flash_init(void)
FTFx_CACHE_ClearCachePrefetchSpeculation(&pcache, 1);
}
int hal_flash_write(uint32_t address, const uint8_t *data, int len)
int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
{
int w = 0;
int ret;
@ -336,16 +337,16 @@ int hal_flash_write(uint32_t address, const uint8_t *data, int len)
return 0;
}
void hal_flash_unlock(void)
void RAMFUNCTION hal_flash_unlock(void)
{
}
void hal_flash_lock(void)
void RAMFUNCTION hal_flash_lock(void)
{
}
int hal_flash_erase(uint32_t address, int len)
int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
{
int idx = 0;
do_flash_init();

11
hal/nrf52.c
View File

@ -20,6 +20,7 @@
*/
#include <stdint.h>
#include "image.h"
/* Assembly helpers */
#define DMB() __asm__ volatile ("dmb")
@ -45,13 +46,13 @@
#define TASKS_HFCLKSTOP *((volatile uint32_t *)(CLOCK_CONTROL_BASE + 0x004))
#define TASKS_HFCLKSTARTED *((volatile uint32_t *)(CLOCK_CONTROL_BASE + 0x100))
static void flash_wait_complete(void)
static void RAMFUNCTION flash_wait_complete(void)
{
while (NVMC_READY == 0)
;
}
int hal_flash_write(uint32_t address, const uint8_t *data, int len)
int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
{
int i = 0;
uint32_t *src, *dst;
@ -82,16 +83,16 @@ int hal_flash_write(uint32_t address, const uint8_t *data, int len)
return 0;
}
void hal_flash_unlock(void)
void RAMFUNCTION hal_flash_unlock(void)
{
}
void hal_flash_lock(void)
void RAMFUNCTION hal_flash_lock(void)
{
}
int hal_flash_erase(uint32_t address, int len)
int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
{
uint32_t end = address + len - 1;
uint32_t p;

9
hal/samr21.c
View File

@ -20,6 +20,7 @@
*/
#include <stdint.h>
#include "image.h"
/* Clock settings for cpu samd21g18a @ 48MHz */
#define CPU_FREQ (48000000)
@ -154,7 +155,7 @@ void hal_prepare_boot(void)
}
int hal_flash_write(uint32_t address, const uint8_t *data, int len)
int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
{
int i = 0;
uint32_t *src, *dst;
@ -191,17 +192,17 @@ int hal_flash_write(uint32_t address, const uint8_t *data, int len)
return 0;
}
void hal_flash_unlock(void)
void RAMFUNCTION hal_flash_unlock(void)
{
PAC1_WPCLR |= (PAC_WP_NVMCTL);
}
void hal_flash_lock(void)
void RAMFUNCTION hal_flash_lock(void)
{
PAC1_WPSET |= (PAC_WP_NVMCTL);
}
int hal_flash_erase(uint32_t address, int len)
int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
{
while (len > 0) {
NVMCTRL_ADDR = (address >> 1); /* This register holds the address of a 16-bit row */

17
hal/stm32f4.c
View File

@ -20,6 +20,7 @@
*/
#include <stdint.h>
#include <image.h>
/* STM32 F4 register configuration */
/* Assembly helpers */
@ -135,12 +136,12 @@ const uint32_t flash_sector[FLASH_SECTORS + 1] = {
FLASH_TOP
};
static void flash_set_waitstates(int waitstates)
static void RAMFUNCTION flash_set_waitstates(int waitstates)
{
FLASH_ACR |= waitstates | FLASH_ACR_ENABLE_DATA_CACHE | FLASH_ACR_ENABLE_INST_CACHE;
}
static void flash_wait_complete(void)
static RAMFUNCTION void flash_wait_complete(void)
{
while ((FLASH_SR & FLASH_SR_BSY) == FLASH_SR_BSY)
;
@ -155,7 +156,7 @@ static void mass_erase(void)
}
*/
static void flash_erase_sector(uint32_t sec)
static void RAMFUNCTION flash_erase_sector(uint32_t sec)
{
uint32_t reg = FLASH_CR & (~(FLASH_CR_SNB_MASK << FLASH_CR_SNB_SHIFT));
FLASH_CR = reg | (sec & FLASH_CR_SNB_MASK) << FLASH_CR_SNB_SHIFT;
@ -166,12 +167,12 @@ static void flash_erase_sector(uint32_t sec)
FLASH_CR &= ~(FLASH_CR_SNB_MASK << FLASH_CR_SNB_SHIFT);
}
static void clear_errors(void)
static void RAMFUNCTION clear_errors(void)
{
FLASH_SR |= ( FLASH_SR_PGSERR | FLASH_SR_PGPERR | FLASH_SR_PGAERR | FLASH_SR_WRPERR | FLASH_SR_OPERR | FLASH_SR_EOP );
}
int hal_flash_write(uint32_t address, const uint8_t *data, int len)
int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
{
int i;
uint32_t val;
@ -188,20 +189,20 @@ int hal_flash_write(uint32_t address, const uint8_t *data, int len)
return 0;
}
void hal_flash_unlock(void)
void RAMFUNCTION hal_flash_unlock(void)
{
FLASH_CR |= FLASH_CR_LOCK;
FLASH_KEYR = FLASH_KEY1;
FLASH_KEYR = FLASH_KEY2;
}
void hal_flash_lock(void)
void RAMFUNCTION hal_flash_lock(void)
{
FLASH_CR |= FLASH_CR_LOCK;
}
int hal_flash_erase(uint32_t address, int len)
int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
{
int start = -1, end = -1;
uint32_t end_address;

103
hal/stm32f4.ld
View File

@ -1,51 +1,52 @@
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x001FFE0
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000
}
SECTIONS
{
.text :
{
_start_text = .;
KEEP(*(.isr_vector))
*(.text*)
*(.rodata*)
*(.init*)
*(.fini*)
. = ALIGN(4);
_end_text = .;
} > FLASH
.edidx :
{
. = ALIGN(4);
*(.ARM.exidx*)
} > FLASH
_stored_data = .;
.data : AT (_stored_data)
{
_start_data = .;
KEEP(*(.data*))
. = ALIGN(4);
_end_data = .;
} > RAM
.bss (NOLOAD) :
{
_start_bss = .;
__bss_start__ = .;
*(.bss*)
*(COMMON)
. = ALIGN(4);
_end_bss = .;
__bss_end__ = .;
_end = .;
} > RAM
. = ALIGN(4);
}
END_STACK = ORIGIN(RAM) + LENGTH(RAM);
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x001FFE0
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000
}
SECTIONS
{
.text :
{
_start_text = .;
KEEP(*(.isr_vector))
*(.text*)
*(.rodata*)
*(.init*)
*(.fini*)
. = ALIGN(4);
_end_text = .;
} > FLASH
.edidx :
{
. = ALIGN(4);
*(.ARM.exidx*)
} > FLASH
_stored_data = .;
.data : AT (_stored_data)
{
_start_data = .;
KEEP(*(.data*))
. = ALIGN(4);
KEEP(*(.ramcode))
. = ALIGN(4);
_end_data = .;
} > RAM
.bss (NOLOAD) :
{
_start_bss = .;
__bss_start__ = .;
*(.bss*)
*(COMMON)
. = ALIGN(4);
_end_bss = .;
__bss_end__ = .;
_end = .;
} > RAM
. = ALIGN(4);
}
END_STACK = ORIGIN(RAM) + LENGTH(RAM);

12
include/image.h
View File

@ -3,7 +3,16 @@
#include <stdint.h>
#include <target.h>
#include <wolfboot/wolfboot.h>
#include "image.h"
#if defined(__WOLFBOOT) && defined(RAM_CODE)
# if defined(ARCH_ARM)
# define RAMFUNCTION __attribute__((section(".ramcode"),long_call))
# else
# define RAMFUNCTION __attribute__((section(".ramcode")))
# endif
#else
# define RAMFUNCTION
#endif
#define SECT_FLAG_NEW 0x0F
@ -12,7 +21,6 @@
#define SECT_FLAG_UPDATED 0x00
struct wolfBoot_image {
uint8_t *hdr;
uint8_t *trailer;

33
src/libwolfboot.c
View File

@ -21,7 +21,8 @@
#include <hal.h>
#include <stdint.h>
#include <inttypes.h>
#include <wolfboot/wolfboot.h>
#include "wolfboot/wolfboot.h"
#include "image.h"
#ifndef NULL
# define NULL (void *)0
@ -37,7 +38,7 @@ uint32_t ext_cache;
#ifdef NVM_FLASH_WRITEONCE
static uint8_t NVM_CACHE[WOLFBOOT_SECTOR_SIZE];
int hal_trailer_write(uint32_t addr, uint8_t val) {
int RAMFUNCTION hal_trailer_write(uint32_t addr, uint8_t val) {
uint32_t addr_align = addr & (~(WOLFBOOT_SECTOR_SIZE - 1));
uint32_t addr_off = addr & (WOLFBOOT_SECTOR_SIZE - 1);
int ret = 0;
@ -54,7 +55,7 @@ int hal_trailer_write(uint32_t addr, uint8_t val) {
#endif
#if defined PART_UPDATE_EXT
static uint8_t *get_trailer_at(uint8_t part, uint32_t at)
static uint8_t* get_trailer_at(uint8_t part, uint32_t at)
{
if (part == PART_BOOT)
return (void *)(PART_BOOT_ENDFLAGS - (sizeof(uint32_t) + at));
@ -87,7 +88,7 @@ static void set_partition_magic(uint8_t part)
}
#else
static uint8_t *get_trailer_at(uint8_t part, uint32_t at)
static uint8_t* get_trailer_at(uint8_t part, uint32_t at)
{
if (part == PART_BOOT)
return (void *)(PART_BOOT_ENDFLAGS - (sizeof(uint32_t) + at));
@ -97,7 +98,7 @@ static uint8_t *get_trailer_at(uint8_t part, uint32_t at)
return NULL;
}
static void set_trailer_at(uint8_t part, uint32_t at, uint8_t val)
static void RAMFUNCTION set_trailer_at(uint8_t part, uint32_t at, uint8_t val)
{
if (part == PART_BOOT) {
hal_trailer_write(PART_BOOT_ENDFLAGS - (sizeof(uint32_t) + at), val);
@ -107,7 +108,7 @@ static void set_trailer_at(uint8_t part, uint32_t at, uint8_t val)
}
}
static void set_partition_magic(uint8_t part)
static void RAMFUNCTION set_partition_magic(uint8_t part)
{
uint32_t wolfboot_magic_trail = WOLFBOOT_MAGIC_TRAIL;
if (part == PART_BOOT) {
@ -121,32 +122,32 @@ static void set_partition_magic(uint8_t part)
static uint32_t *get_partition_magic(uint8_t part)
static uint32_t* get_partition_magic(uint8_t part)
{
return (uint32_t *)get_trailer_at(part, 0);
}
static uint8_t *get_partition_state(uint8_t part)
static uint8_t* get_partition_state(uint8_t part)
{
return (uint8_t *)get_trailer_at(part, 1);
}
static uint8_t *get_sector_flags(uint8_t part, uint32_t pos)
static uint8_t* get_sector_flags(uint8_t part, uint32_t pos)
{
return (uint8_t *)get_trailer_at(part, 2 + pos);
}
static void set_partition_state(uint8_t part, uint8_t val)
static void RAMFUNCTION set_partition_state(uint8_t part, uint8_t val)
{
set_trailer_at(part, 1, val);
}
static void set_sector_flags(uint8_t part, uint32_t pos, uint8_t val)
static void RAMFUNCTION set_sector_flags(uint8_t part, uint32_t pos, uint8_t val)
{
set_trailer_at(part, 2 + pos, val);
}
int wolfBoot_set_partition_state(uint8_t part, uint8_t newst)
int RAMFUNCTION wolfBoot_set_partition_state(uint8_t part, uint8_t newst)
{
uint32_t *magic;
uint8_t *state;
@ -159,7 +160,7 @@ int wolfBoot_set_partition_state(uint8_t part, uint8_t newst)
return 0;
}
int wolfBoot_set_sector_flag(uint8_t part, uint8_t sector, uint8_t newflag)
int RAMFUNCTION wolfBoot_set_sector_flag(uint8_t part, uint8_t sector, uint8_t newflag)
{
uint32_t *magic;
uint8_t *flags;
@ -207,7 +208,7 @@ int wolfBoot_get_sector_flag(uint8_t part, uint8_t sector, uint8_t *flag)
return 0;
}
void wolfBoot_erase_partition(uint8_t part)
void RAMFUNCTION wolfBoot_erase_partition(uint8_t part)
{
if (part == PART_BOOT)
hal_flash_erase(WOLFBOOT_PARTITION_BOOT_ADDRESS, WOLFBOOT_PARTITION_SIZE);
@ -224,7 +225,7 @@ void wolfBoot_erase_partition(uint8_t part)
hal_flash_erase(WOLFBOOT_PARTITION_SWAP_ADDRESS, WOLFBOOT_SECTOR_SIZE);
}
void wolfBoot_update_trigger(void)
void RAMFUNCTION wolfBoot_update_trigger(void)
{
uint8_t st = IMG_STATE_UPDATING;
#ifdef PART_UPDATE_EXT
@ -238,7 +239,7 @@ void wolfBoot_update_trigger(void)
#endif
}
void wolfBoot_success(void)
void RAMFUNCTION wolfBoot_success(void)
{
uint8_t st = IMG_STATE_SUCCESS;
hal_flash_unlock();