mirror of https://github.com/wolfSSL/wolfBoot.git
David Garske
GitHub
commit
a48bc603d6
13
Makefile
13
Makefile
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@ -57,9 +57,8 @@ ifeq ($(SIGN),ED25519)
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./lib/wolfssl/wolfcrypt/src/wolfmath.o \
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./lib/wolfssl/wolfcrypt/src/fe_low_mem.o
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PUBLIC_KEY_OBJS=./src/ed25519_pub_key.o
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CFLAGS+=-DWOLFBOOT_SIGN_ED25519 -nostdlib \
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CFLAGS+=-DWOLFBOOT_SIGN_ED25519 \
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-Wstack-usage=1024
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LDFLAGS+=-nostdlib
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endif
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ifeq ($(SIGN),RSA2048)
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@ -191,10 +190,6 @@ wolfboot.bin: wolfboot.elf
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@echo "\t[BIN] $@"
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$(Q)$(OBJCOPY) -O binary $^ $@
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wolfboot.hex: wolfboot.elf
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@echo "\t[HEX] $@"
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$(Q)$(OBJCOPY) -O ihex $^ $@
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align: wolfboot-align.bin
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.bootloader-partition-size:
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@ -256,6 +251,12 @@ $(LSCRIPT): hal/$(TARGET).ld .bootloader-partition-size FORCE
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sed -e "s/##WOLFBOOT_PARTITION_BOOT_ADDRESS##/`cat .bootloader-partition-size`/g" \
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> $@
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hex: wolfboot.hex
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%.hex:%.elf
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@echo "\t[ELF2HEX] $@"
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@$(OBJCOPY) -O ihex $^ $@
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src/ed25519_pub_key.c: ed25519.der
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src/ecc256_pub_key.c: ecc256.der
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47
arch.mk
47
arch.mk
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@ -134,17 +134,6 @@ ifeq ($(TARGET),lpc)
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OBJS+=$(MCUXPRESSO_DRIVERS)/drivers/fsl_usart.o $(MCUXPRESSO_DRIVERS)/drivers/fsl_flexcomm.o
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endif
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CFLAGS+=-DARCH_FLASH_OFFSET=$(ARCH_FLASH_OFFSET)
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## Toolchain setup
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CC=$(CROSS_COMPILE)gcc
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LD=$(CROSS_COMPILE)gcc
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AS=$(CROSS_COMPILE)gcc
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OBJCOPY:=$(CROSS_COMPILE)objcopy
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SIZE:=$(CROSS_COMPILE)size
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BOOT_IMG?=test-app/image.bin
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ifeq ($(TARGET),stm32f4)
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SPI_TARGET=stm32
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endif
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@ -162,6 +151,42 @@ ifeq ($(TARGET),stm32wb)
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endif
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endif
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ifeq ($(TARGET),psoc6)
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CORTEX_M0=1
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PKA_EXTRA_OBJS+= $(CYPRESS_PDL)/drivers/source/cy_flash.o \
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$(CYPRESS_PDL)/drivers/source/cy_ipc_pipe.o \
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$(CYPRESS_PDL)/drivers/source/cy_ipc_sema.o \
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$(CYPRESS_PDL)/drivers/source/cy_ipc_drv.o \
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$(CYPRESS_PDL)/drivers/source/cy_device.o \
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$(CYPRESS_PDL)/drivers/source/cy_sysclk.o \
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$(CYPRESS_PDL)/drivers/source/cy_sysint.o \
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$(CYPRESS_PDL)/drivers/source/cy_syslib.o \
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$(CYPRESS_PDL)/drivers/source/cy_ble_clk.o \
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$(CYPRESS_PDL)/drivers/source/cy_wdt.o \
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$(CYPRESS_PDL)/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.o \
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$(CYPRESS_PDL)/devices/templates/COMPONENT_MTB/COMPONENT_CM0P/system_psoc6_cm0plus.o
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CFLAGS+=-I$(CYPRESS_PDL)/drivers/include/ \
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-I$(CYPRESS_PDL)/devices/include \
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-I$(CYPRESS_PDL)/cmsis/include \
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-I$(CYPRESS_TARGET_LIB) \
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-I$(CYPRESS_CORE_LIB)/include \
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-I$(CYPRESS_PDL)/devices/include/ip \
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-I$(CYPRESS_PDL)/devices/templates/COMPONENT_MTB \
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-DCY8C624ABZI_D44
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ARCH_FLASH_OFFSET=0x10000000
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endif
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CFLAGS+=-DARCH_FLASH_OFFSET=$(ARCH_FLASH_OFFSET)
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## Toolchain setup
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CC=$(CROSS_COMPILE)gcc
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LD=$(CROSS_COMPILE)gcc
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AS=$(CROSS_COMPILE)gcc
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OBJCOPY:=$(CROSS_COMPILE)objcopy
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SIZE:=$(CROSS_COMPILE)size
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BOOT_IMG?=test-app/image.bin
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## Update mechanism
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ifeq ($(ARCH),AARCH64)
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@ -0,0 +1,30 @@
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ARCH?=ARM
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TARGET?=psoc6
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SIGN?=ED25519
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HASH?=SHA256
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CYPRESS_PDL?=./lib/psoc6pdl
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CYPRESS_TARGET_LIB?=./lib/TARGET_CY8CKIT-062S2-43012
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CYPRESS_CORE_LIB?=./lib/core-lib
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DEBUG?=1
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VTOR?=1
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CORTEX_M0?=1
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NO_ASM?=0
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EXT_FLASH?=0
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SPI_FLASH?=0
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NO_XIP?=0
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UART_FLASH?=0
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ALLOW_DOWNGRADE?=0
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NVM_FLASH_WRITEONCE?=1
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WOLFBOOT_VERSION?=0
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V?=0
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SPMATH?=1
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RAM_CODE?=0
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DUALBANK_SWAP?=0
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IMAGE_HEADER_SIZE?=256
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PKA?=1
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WOLFTPM?=0
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WOLFBOOT_PARTITION_SIZE?=0x80000
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WOLFBOOT_SECTOR_SIZE?=4096
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WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x10080000
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WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x10100000
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WOLFBOOT_PARTITION_SWAP_ADDRESS?=10010000
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@ -552,3 +552,94 @@ make CROSS_COMPILE=aarch64-unknown-nto-qnx7.0.0-
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#### Signing
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`tools/keytools/sign.py --rsa4096 --sha3 /srv/linux-rpi4/vmlinux.bin rsa4096.der 1`
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## Cypress PSoC-62S2 (CY8CKIT-062S2)
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The Cypress PSoC 62S2 is a dual-core Cortex-M4 & Cortex-M0+ MCU. The secure boot process is managed by the M0+.
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WolfBoot can be compiled as second stage flash bootloader to manage application verification and firmware updates.
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### Building
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The following configuration has been tested using PSoC 62S2 Wi-Fi BT Pioneer Kit (CY8CKIT-052S2-43012).
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#### Target specific requirements
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wolfBoot uses the following components to access peripherals on the PSoC:
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* [Cypress Core Library](https://github.com/cypresssemiconductorco/core-lib)
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* [PSoC 6 Peripheral Driver Library](https://github.com/cypresssemiconductorco/psoc6pdl)
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* [CY8CKIT-062S2-43012 BSP](https://github.com/cypresssemiconductorco/TARGET_CY8CKIT-062S2-43012)
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Cypress provides a [customized OpenOCD](https://github.com/cypresssemiconductorco/Openocd) for programming the flash and
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debugging.
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### Clock settings
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wolfBoot configures PLL1 to run at 100 MHz and is driving `CLK_FAST`, `CLK_PERI`, and `CLK_SLOW` at that frequency.
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#### Build configuration
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The following configuration has been tested on the PSoC CY8CKIT-62S2-43012:
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```
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make TARGET=psoc6 \
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NVM_FLASH_WRITEONCE=1 \
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CYPRESS_PDL=./lib/psoc6pdl \
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CYPRESS_TARGET_LIB=./lib/TARGET_CY8CKIT-062S2-43012 \
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CYPRESS_CORE_LIB=./lib/core-lib \
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WOLFBOOT_SECTOR_SIZE=4096
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```
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Note: A reference `.config` can be found in `./config/examples/cypsoc6.config`.
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#### OpenOCD installation
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Compile and install the customized OpenOCD.
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Use the following configuration file when running `openocd` to connect to the PSoC6 board:
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```
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# openocd.cfg for PSoC-62S2
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source [find interface/kitprog3.cfg]
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transport select swd
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adapter speed 1000
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source [find target/psoc6_2m.cfg]
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init
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reset init
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```
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### Loading the firmware
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To upload `factory.bin` to the device with OpenOCD, connect the device,
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run OpenOCD with the configuration from the previous section, then connect
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to the local openOCD server running on TCP port 4444 using `telnet localhost 4444`.
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From the telnet console, type:
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`program factory.bin 0x10000000`
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When the transfer is finished, you can either close openOCD or start a debugging session.
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### Debugging
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Debugging with OpenOCD:
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Use the OpenOCD configuration from the previous sections to run OpenOCD.
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From another console, connect using gdb, e.g.:
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```
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arm-none-eabi-gdb
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(gdb) target remote:3333
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```
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To reset the board to start from the M0+ flash bootloader position (wolfBoot reset handler), use
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the monitor command sequence below:
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```
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(gdb) mon init
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(gdb) mon reset init
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(gdb) mon psoc6 reset_halt
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```
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@ -0,0 +1,152 @@
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/* psoc6.c
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*
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* Copyright (C) 2020 wolfSSL Inc.
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*
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* This file is part of wolfBoot.
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*
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* wolfBoot is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* wolfBoot is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
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*/
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#include <stdint.h>
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#include <target.h>
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#include <string.h>
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#include "image.h"
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#include "cy_device_headers.h"
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#include "cy_flash.h"
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#include "cy_syspm.h"
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#include "cy_sysclk.h"
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#include "cy_syslib.h"
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#include "cy_ipc_drv.h"
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#include "psoc6_02_config.h"
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#define ROW_SIZE (0x1000)
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#define FLASH_BASE_ADDRESS (0x10000000)
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#define CPU_FREQ (100000000)
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uint8_t psoc6_write_buffer[ROW_SIZE];
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#ifndef NVM_FLASH_WRITEONCE
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# error "wolfBoot psoc6 HAL: no WRITEONCE support detected. Please define NVM_FLASH_WRITEONCE"
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#endif
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#ifdef __WOLFBOOT
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static const cy_stc_pll_manual_config_t srss_0_clock_0_pll_0_pllConfig =
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{
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.feedbackDiv = 100,
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.referenceDiv = 2,
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.outputDiv = 4,
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.lfMode = false,
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.outputMode = CY_SYSCLK_FLLPLL_OUTPUT_AUTO,
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};
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static void hal_set_pll(void)
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{
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/*Set clock path 1 source to IMO, this feeds PLL1*/
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Cy_SysClk_ClkPathSetSource(1U, CY_SYSCLK_CLKPATH_IN_IMO);
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/*Set the input for CLK_HF0 to the output of the PLL, which is on clock path 1*/
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Cy_SysClk_ClkHfSetSource(0U, CY_SYSCLK_CLKHF_IN_CLKPATH1);
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Cy_SysClk_ClkHfSetDivider(0U, CY_SYSCLK_CLKHF_NO_DIVIDE);
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/*Set divider for CM4 clock to 0, might be able to lower this to save power if needed*/
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Cy_SysClk_ClkFastSetDivider(0U);
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/*Set divider for peripheral and CM0 clock to 0 - This must be 0 to get fastest clock to CM0*/
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Cy_SysClk_ClkPeriSetDivider(0U);
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/*Set divider for CM0 clock to 0*/
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Cy_SysClk_ClkSlowSetDivider(0U);
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|
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/*Set flash memory wait states */
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Cy_SysLib_SetWaitStates(false, 100);
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|
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/*Configure PLL for 100 MHz*/
|
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if (CY_SYSCLK_SUCCESS != Cy_SysClk_PllManualConfigure(1U, &srss_0_clock_0_pll_0_pllConfig))
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{
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while(1)
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;
|
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}
|
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/*Enable PLL*/
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if (CY_SYSCLK_SUCCESS != Cy_SysClk_PllEnable(1U, 10000u))
|
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{
|
||||
while(1)
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;
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}
|
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}
|
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|
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void hal_init(void)
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{
|
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Cy_PDL_Init(CY_DEVICE_CFG);
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Cy_Flash_Init();
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hal_set_pll();
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}
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|
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void hal_prepare_boot(void)
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{
|
||||
}
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|
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#endif
|
||||
|
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|
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/* Only Row-aligned writes allowed. This is guaranteed by wolfBoot if NVM_CACHE is
|
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* in use (via NVM_FLASH_WRITEONCE=1), as unaligned writes become cached.
|
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*/
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int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
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{
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const uint8_t *src = data;
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if (len < ROW_SIZE)
|
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return -1;
|
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if ((((uint32_t)data) & FLASH_BASE_ADDRESS) == FLASH_BASE_ADDRESS) {
|
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if (len != ROW_SIZE) {
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return -1;
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}
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memcpy(psoc6_write_buffer, data, len);
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src = psoc6_write_buffer;
|
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}
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while (len) {
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Cy_Flash_ProgramRow(address, (const uint32_t *) src);
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len -= ROW_SIZE;
|
||||
if ((len > 0) && (len < ROW_SIZE))
|
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return -1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
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void RAMFUNCTION hal_flash_unlock(void)
|
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{
|
||||
}
|
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|
||||
void RAMFUNCTION hal_flash_lock(void)
|
||||
{
|
||||
}
|
||||
|
||||
int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
|
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{
|
||||
int start = -1, end = -1;
|
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uint32_t end_address;
|
||||
uint32_t p = (uint32_t)address;
|
||||
if (len == 0)
|
||||
return -1;
|
||||
end_address = address + len;
|
||||
while ((end_address - p) >= ROW_SIZE) {
|
||||
Cy_Flash_EraseRow(p);
|
||||
p += ROW_SIZE;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,96 @@
|
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MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x10000000, LENGTH = ##WOLFBOOT_PARTITION_BOOT_ADDRESS##
|
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RAM (rwx) : ORIGIN = 0x08000000, LENGTH = 64K
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
|
||||
.text :
|
||||
{
|
||||
_start_text = .;
|
||||
__Vectors = .;
|
||||
KEEP(*(.isr_vector))
|
||||
KEEP(*(.vectors))
|
||||
. = ALIGN(0x400);
|
||||
*(.text*)
|
||||
*(.rodata*)
|
||||
*(.init*)
|
||||
*(.fini*)
|
||||
. = ALIGN(4);
|
||||
_end_text = .;
|
||||
__etext = .;
|
||||
} > FLASH
|
||||
|
||||
.edidx :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.ARM.exidx*)
|
||||
} > FLASH
|
||||
|
||||
_stored_data = .;
|
||||
|
||||
.data : AT (_stored_data)
|
||||
{
|
||||
_start_data = .;
|
||||
__data_start__ = .;
|
||||
|
||||
KEEP(*(.data*))
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.ramcode))
|
||||
. = ALIGN(4);
|
||||
/* preinit data */
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP(*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* init data */
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* finit data */
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
KEEP(*(.fini_array))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
|
||||
KEEP(*(.jcr*))
|
||||
. = ALIGN(4);
|
||||
|
||||
KEEP(*(.cy_ramfunc*))
|
||||
. = ALIGN(4);
|
||||
|
||||
_end_data = .;
|
||||
__data_end__ = .;
|
||||
|
||||
} > RAM
|
||||
|
||||
.bss (NOLOAD) :
|
||||
{
|
||||
_start_bss = .;
|
||||
__bss_start__ = .;
|
||||
__zero_table_start__ = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_end_bss = .;
|
||||
__bss_end__ = .;
|
||||
__zero_table_end__ = .;
|
||||
_end = .;
|
||||
. = ALIGN(0x100);
|
||||
__ramVectors = .;
|
||||
} > RAM
|
||||
. = ALIGN(4);
|
||||
}
|
||||
|
||||
END_STACK = ORIGIN(RAM) + LENGTH(RAM);
|
||||
|
||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||
__StackLimit = __StackTop - 0x4000;
|
||||
PROVIDE(__stack = __StackTop);
|
||||
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
/* skeleton.c
|
||||
*
|
||||
* Stubs for custom HAL implementation. Defines the
|
||||
* functions used by wolfboot for a specific target.
|
||||
*
|
||||
* Copyright (C) 2020 wolfSSL Inc.
|
||||
*
|
||||
* This file is part of wolfBoot.
|
||||
*
|
||||
* wolfBoot is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* wolfBoot is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <target.h>
|
||||
#include "image.h"
|
||||
|
||||
|
||||
#ifdef __WOLFBOOT
|
||||
void hal_init(void)
|
||||
{
|
||||
}
|
||||
|
||||
void hal_prepare_boot(void)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
|
||||
{
|
||||
}
|
||||
|
||||
void RAMFUNCTION hal_flash_unlock(void)
|
||||
{
|
||||
}
|
||||
|
||||
void RAMFUNCTION hal_flash_lock(void)
|
||||
{
|
||||
}
|
||||
|
||||
int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
|
||||
{
|
||||
}
|
||||
|
||||
|
|
@ -34,6 +34,12 @@
|
|||
#endif
|
||||
#define IMAGE_HEADER_OFFSET (2 * sizeof(uint32_t))
|
||||
|
||||
#ifdef NVM_FLASH_WRITEONCE
|
||||
# define FLASHBUFFER_SIZE WOLFBOOT_SECTOR_SIZE
|
||||
#else
|
||||
# define FLASHBUFFER_SIZE IMAGE_HEADER_SIZE
|
||||
#endif
|
||||
|
||||
#define WOLFBOOT_MAGIC 0x464C4F57 /* WOLF */
|
||||
#define WOLFBOOT_MAGIC_TRAIL 0x544F4F42 /* BOOT */
|
||||
|
||||
|
|
@ -111,4 +117,5 @@ int wolfBoot_dualboot_candidate(void);
|
|||
# error "No valid hash algorithm defined!"
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* !WOLFBOOT_H */
|
||||
|
|
|
|||
|
|
@ -35,6 +35,7 @@ extern uint32_t *END_STACK;
|
|||
|
||||
extern void main(void);
|
||||
|
||||
|
||||
void isr_reset(void) {
|
||||
register unsigned int *src, *dst;
|
||||
#if defined(PLATFORM_kinetis)
|
||||
|
|
@ -75,7 +76,6 @@ void isr_empty(void)
|
|||
/* Ignore unmapped event and continue */
|
||||
}
|
||||
|
||||
#define VTOR (*(volatile uint32_t *)(0xE000ED08))
|
||||
|
||||
/* This is the main loop for the bootloader.
|
||||
*
|
||||
|
|
@ -87,6 +87,7 @@ void isr_empty(void)
|
|||
* - Call the application entry point
|
||||
*
|
||||
*/
|
||||
#define VTOR (*(volatile uint32_t *)(0xE000ED08))
|
||||
static void *app_entry;
|
||||
static uint32_t app_end_stack;
|
||||
|
||||
|
|
@ -114,12 +115,19 @@ void RAMFUNCTION do_boot(const uint32_t *app_offset)
|
|||
asm volatile("mov pc, %0" ::"r"(app_entry));
|
||||
}
|
||||
|
||||
#ifdef PLATFORM_psoc6
|
||||
typedef void(*NMIHANDLER)(void);
|
||||
# define isr_NMI (NMIHANDLER)(0x0000000D)
|
||||
#else
|
||||
# define isr_NMI isr_empty
|
||||
#endif
|
||||
|
||||
__attribute__ ((section(".isr_vector")))
|
||||
void (* const IV[])(void) =
|
||||
{
|
||||
(void (*)(void))(&END_STACK),
|
||||
isr_reset, // Reset
|
||||
isr_fault, // NMI
|
||||
isr_NMI, // NMI
|
||||
isr_fault, // HardFault
|
||||
isr_fault, // MemFault
|
||||
isr_fault, // BusFault
|
||||
|
|
|
|||
|
|
@ -39,9 +39,11 @@ uint32_t ext_cache;
|
|||
#define PART_UPDATE_ENDFLAGS ((WOLFBOOT_PARTITION_UPDATE_ADDRESS + WOLFBOOT_PARTITION_SIZE) - TRAILER_SKIP)
|
||||
|
||||
#ifdef NVM_FLASH_WRITEONCE
|
||||
#define NVM_CACHE_SIZE WOLFBOOT_SECTOR_SIZE
|
||||
|
||||
#include <stddef.h>
|
||||
extern void *memcpy(void *dst, const void *src, size_t n);
|
||||
static uint8_t NVM_CACHE[WOLFBOOT_SECTOR_SIZE];
|
||||
static uint8_t NVM_CACHE[NVM_CACHE_SIZE];
|
||||
int RAMFUNCTION hal_trailer_write(uint32_t addr, uint8_t val) {
|
||||
uint32_t addr_align = addr & (~(WOLFBOOT_SECTOR_SIZE - 1));
|
||||
uint32_t addr_off = addr & (WOLFBOOT_SECTOR_SIZE - 1);
|
||||
|
|
|
|||
|
|
@ -32,8 +32,6 @@ static volatile const uint32_t __attribute__((used)) wolfboot_version = WOLFBOOT
|
|||
extern void (** const IV_RAM)(void);
|
||||
#endif
|
||||
|
||||
#define FLASHBUFFER_SIZE 256
|
||||
|
||||
#ifndef DUALBANK_SWAP
|
||||
static int wolfBoot_copy_sector(struct wolfBoot_image *src, struct wolfBoot_image *dst, uint32_t sector)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -28,7 +28,6 @@
|
|||
#include "spi_flash.h"
|
||||
#include "wolfboot/wolfboot.h"
|
||||
|
||||
#define FLASHBUFFER_SIZE 256
|
||||
|
||||
#ifdef RAM_CODE
|
||||
extern unsigned int _start_text;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,55 @@
|
|||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = ##WOLFBOOT_TEST_APP_ADDRESS##, LENGTH = ##WOLFBOOT_TEST_APP_SIZE##
|
||||
RAM (rwx) : ORIGIN = 0x08000000, LENGTH = 64K
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
|
||||
.text :
|
||||
{
|
||||
_start_text = .;
|
||||
KEEP(*(.isr_vector))
|
||||
. = ALIGN(0x400);
|
||||
*(.text*)
|
||||
*(.rodata*)
|
||||
*(.init*)
|
||||
*(.fini*)
|
||||
. = ALIGN(4);
|
||||
_end_text = .;
|
||||
} > FLASH
|
||||
|
||||
.edidx :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.ARM.exidx*)
|
||||
} > FLASH
|
||||
|
||||
_stored_data = .;
|
||||
|
||||
.data : AT (_stored_data)
|
||||
{
|
||||
_start_data = .;
|
||||
KEEP(*(.data*))
|
||||
. = ALIGN(4);
|
||||
_end_data = .;
|
||||
} > RAM
|
||||
|
||||
.bss (NOLOAD) :
|
||||
{
|
||||
_start_bss = .;
|
||||
__bss_start__ = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_end_bss = .;
|
||||
__bss_end__ = .;
|
||||
_end = .;
|
||||
} > RAM
|
||||
. = ALIGN(4);
|
||||
}
|
||||
|
||||
END_STACK = ORIGIN(RAM) + LENGTH(RAM);
|
||||
PROVIDE(_start_heap = _end);
|
||||
PROVIDE(_end_stack = ORIGIN(RAM) + LENGTH(RAM));
|
||||
|
|
@ -46,6 +46,10 @@ ifeq ($(TARGET),stm32f7)
|
|||
LSCRIPT_TEMPLATE=ARM-stm32f7.ld
|
||||
CFLAGS+=-DDUALBANK_SWAP
|
||||
endif
|
||||
ifeq ($(TARGET),psoc6)
|
||||
LSCRIPT_TEMPLATE=ARM-psoc6.ld
|
||||
endif
|
||||
|
||||
LDFLAGS:=$(CFLAGS) -T $(LSCRIPT) -Wl,-gc-sections -Wl,-Map=image.map
|
||||
|
||||
ifeq ($(EXT_FLASH),1)
|
||||
|
|
|
|||
|
|
@ -0,0 +1,35 @@
|
|||
/* main.c
|
||||
*
|
||||
* Test bare-metal boot-led-on application
|
||||
*
|
||||
* Copyright (C) 2020 wolfSSL Inc.
|
||||
*
|
||||
* This file is part of wolfBoot.
|
||||
*
|
||||
* wolfBoot is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* wolfBoot is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
|
||||
*/
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <stdint.h>
|
||||
#include <string.h>
|
||||
#include "wolfboot/wolfboot.h"
|
||||
|
||||
|
||||
void main(void) {
|
||||
/* Wait for reboot */
|
||||
while(1)
|
||||
;
|
||||
}
|
||||
|
||||
|
|
@ -10,6 +10,9 @@ ifeq ($(ARCH),)
|
|||
MCUXPRESSO_CMSIS?=$(MCUXPRESSO)/CMSIS
|
||||
FREEDOM_E_SDK?=$(HOME)/src/freedom-e-sdk
|
||||
STM32CUBE?=$(HOME)/STM32Cube/Repository/STM32Cube_FW_WB_V1.3.0
|
||||
CYPRESS_PDL?=$(HOME)/src/psoc6pdl
|
||||
CYPRESS_TARGET_LIB?=$(HOME)/src/TARGET_CY8CKIT-062S2-43012
|
||||
CYPRESS_CORE_LIB?=$(HOME)/src/cypress-core-lib
|
||||
DEBUG?=0
|
||||
VTOR?=1
|
||||
CORTEX_M0?=0
|
||||
|
|
@ -41,8 +44,9 @@ endif
|
|||
|
||||
|
||||
CONFIG_VARS:= ARCH TARGET SIGN HASH MCUXPRESSO MCUXPRESSO_CPU MCUXPRESSO_DRIVERS \
|
||||
MCUXPRESSO_CMSIS FREEDOM_E_SDK STM32CUBE DEBUG VTOR CORTEX_M0 NO_ASM EXT_FLASH \
|
||||
SPI_FLASH NO_XIP UART_FLASH ALLOW_DOWNGRADE NVM_FLASH_WRITEONCE WOLFBOOT_VERSION V \
|
||||
MCUXPRESSO_CMSIS FREEDOM_E_SDK STM32CUBE CYPRESS_PDL CYPRESS_CORE_LIB CYPRESS_TARGET_LIB DEBUG VTOR \
|
||||
CORTEX_M0 NO_ASM EXT_FLASH SPI_FLASH NO_XIP UART_FLASH ALLOW_DOWNGRADE NVM_FLASH_WRITEONCE \
|
||||
WOLFBOOT_VERSION V \
|
||||
SPMATH RAM_CODE DUALBANK_SWAP IMAGE_HEADER_SIZE PKA WOLFTPM \
|
||||
WOLFBOOT_PARTITION_SIZE WOLFBOOT_SECTOR_SIZE \
|
||||
WOLFBOOT_PARTITION_BOOT_ADDRESS WOLFBOOT_PARTITION_UPDATE_ADDRESS \
|
||||
|
|
|
|||
|
|
@ -130,7 +130,6 @@ static void keygen_rsa(WC_RNG *rng, char *pubkeyfile, int size)
|
|||
exit(4);
|
||||
}
|
||||
fwrite(priv_der, privlen, 1, fpriv);
|
||||
fwrite(pub, 32, 1, fpriv);
|
||||
fclose(fpriv);
|
||||
|
||||
fpub = fopen(pubkeyfile, "w");
|
||||
|
|
@ -146,7 +145,7 @@ static void keygen_rsa(WC_RNG *rng, char *pubkeyfile, int size)
|
|||
|
||||
fwritekey(pub_der, publen, fpub);
|
||||
fprintf(fpub, "\n};\n");
|
||||
fprintf(fpub, "const uint32_t ecc256_pub_key_len = %d;\n", publen);
|
||||
fprintf(fpub, "const uint32_t rsa%d_pub_key_len = %d;\n", size, publen);
|
||||
fclose(fpub);
|
||||
}
|
||||
#endif
|
||||
|
|
@ -233,6 +232,7 @@ static void keygen_ed25519(WC_RNG *rng, char *pubkfile)
|
|||
exit(3);
|
||||
}
|
||||
fwrite(priv, 32, 1, fpriv);
|
||||
fwrite(pub, 32, 1, fpriv);
|
||||
fclose(fpriv);
|
||||
fpub = fopen(pubkfile, "w");
|
||||
if (fpub == NULL) {
|
||||
|
|
|
|||
|
|
@ -126,8 +126,8 @@ int main(int argc, char** argv)
|
|||
const char* signature_file = NULL;
|
||||
char output_image_file[PATH_MAX];
|
||||
char* tmpstr;
|
||||
const char* sign_str = NULL;
|
||||
const char* hash_str = NULL;
|
||||
const char* sign_str = "AUTO";
|
||||
const char* hash_str = "SHA256";
|
||||
FILE *f, *f2;
|
||||
uint8_t* key_buffer = NULL;
|
||||
size_t key_buffer_sz = 0;
|
||||
|
|
|
|||
Loading…
Reference in New Issue