From b19eef5b0627411b9af459edd322fe543466cc0a Mon Sep 17 00:00:00 2001
From: David Garske <david@wolfssl.com>
Date: Fri, 15 Jul 2022 11:35:15 -0700
Subject: [PATCH] Fix aarch64 to not initialize gicv2 unless QNX.

---
 src/boot_aarch64.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/boot_aarch64.c b/src/boot_aarch64.c
index 0d8cd733..18925fec 100644
--- a/src/boot_aarch64.c
+++ b/src/boot_aarch64.c
@@ -70,8 +70,10 @@ void RAMFUNCTION do_boot(const uint32_t *app_offset)
 	asm volatile("mov x5, xzr");
 #endif
 
+#ifndef NO_QNX
     /* Initialize GICv2 for Kernel */
     gicv2_init_secure();
+#endif
 
     /* Zero registers x1, x2, x3 */
     asm volatile("mov x3, xzr");