From b5fd49a82a456ef4ea49e7b10696106be03d4e5e Mon Sep 17 00:00:00 2001 From: Daniele Lacamera Date: Mon, 1 Apr 2019 13:50:26 +0200 Subject: [PATCH] Initial experimental support for RISC-V - New Makefile to support multiple architectures - Separate architecture-specific start-up files - Stub for a hifive1 HAL port --- Makefile | 193 +++++++++++++------------- arch.mk | 54 +++++++ hal/hifive1.c | 61 ++++++++ hal/hifive1.ld | 52 +++++++ include/target.h | 3 +- src/{wolfboot.c => boot_arm.c} | 3 +- src/boot_riscv.c | 86 ++++++++++++ src/vector_riscv.S | 141 +++++++++++++++++++ test-app/{app.ld => ARM.ld} | 0 test-app/Makefile | 50 ++++--- test-app/RISCV.ld | 52 +++++++ test-app/led.c | 2 + test-app/main.c | 9 +- test-app/{startup.c => startup_arm.c} | 0 test-app/startup_riscv.c | 86 ++++++++++++ test-app/system.c | 3 +- test-app/timer.c | 6 +- test-app/vector_riscv.S | 142 +++++++++++++++++++ 18 files changed, 822 insertions(+), 121 deletions(-) create mode 100644 arch.mk create mode 100644 hal/hifive1.c create mode 100644 hal/hifive1.ld rename src/{wolfboot.c => boot_arm.c} (99%) create mode 100644 src/boot_riscv.c create mode 100644 src/vector_riscv.S rename test-app/{app.ld => ARM.ld} (100%) create mode 100644 test-app/RISCV.ld rename test-app/{startup.c => startup_arm.c} (100%) create mode 100644 test-app/startup_riscv.c create mode 100644 test-app/vector_riscv.S diff --git a/Makefile b/Makefile index dc9b95d4..3c810d40 100644 --- a/Makefile +++ b/Makefile @@ -1,14 +1,15 @@ -CROSS_COMPILE:=arm-none-eabi- -CC:=$(CROSS_COMPILE)gcc -LD:=$(CROSS_COMPILE)gcc -AS:=$(CROSS_COMPILE)gcc -OBJCOPY:=$(CROSS_COMPILE)objcopy -SIZE:=$(CROSS_COMPILE)size -BOOT0_OFFSET?=`cat include/target.h |grep WOLFBOOT_PARTITION_BOOT_ADDRESS | head -1 | sed -e "s/.*[ ]//g"` -BOOT_IMG?=test-app/image.bin +## wolfBoot Makefile +# +# Configure by passing alternate values +# via environment variables. +# +# Default values: +ARCH?=ARM +TARGET?=stm32f4 SIGN?=ED25519 TARGET?=stm32f4 KINETIS?=$(HOME)/src/FRDM-K64F +KINETIS_CPU=MK64FN1M0VLL12 KINETIS_DRIVERS?=$(KINETIS)/devices/MK64F12 KINETIS_CMSIS?=$(KINETIS)/CMSIS DEBUG?=0 @@ -19,14 +20,19 @@ EXT_FLASH?=0 SPI_FLASH?=0 ALLOW_DOWNGRADE?=0 NVM_FLASH_WRITEONCE?=0 -LSCRIPT:=hal/$(TARGET).ld +V?=0 + + +## Initializers +CFLAGS:=-D__WOLFBOOT +LSCRIPT:=hal/$(TARGET).ld +LDFLAGS:=-T $(LSCRIPT) -Wl,-gc-sections -Wl,-Map=wolfboot.map -ffreestanding -nostartfiles OBJS:= \ ./hal/$(TARGET).o \ ./src/loader.o \ ./src/string.o \ ./src/crypto.o \ -./src/wolfboot.o \ ./src/image.o \ ./src/libwolfboot.o \ ./lib/wolfssl/wolfcrypt/src/sha256.o \ @@ -34,53 +40,50 @@ OBJS:= \ ./lib/wolfssl/wolfcrypt/src/wolfmath.o \ ./lib/wolfssl/wolfcrypt/src/fe_low_mem.o -## Target specific configuration -ifeq ($(TARGET),samr21) - CORTEX_M0=1 -endif +## Architecture/CPU configuration +include arch.mk -## Signature -ifeq ($(SIGN),ECC256) - KEYGEN_TOOL=tools/ecc256/ecc256_keygen - SIGN_TOOL=tools/ecc256/ecc256_sign - PRIVATE_KEY=ecc256.der -else - KEYGEN_TOOL=tools/ed25519/ed25519_keygen - SIGN_TOOL=tools/ed25519/ed25519_sign - PRIVATE_KEY=ed25519.der -endif -MATH_OBJS:=./lib/wolfssl/wolfcrypt/src/sp_int.o - -ifeq ($(CORTEX_M0),1) - CFLAGS:=-mcpu=cortex-m0 - MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o -else - ifeq ($(NO_ASM),1) - MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o - CFLAGS:=-mcpu=cortex-m3 - else - CFLAGS:=-mcpu=cortex-m3 -D__WOLFBOOT -DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_CORTEX_M_ASM -fomit-frame-pointer - MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_cortexm.o - endif -endif +## DSA Settings ifeq ($(FASTMATH),1) MATH_OBJS:=./lib/wolfssl/wolfcrypt/src/integer.o CFLAGS+=-DUSE_FAST_MATH +else + MATH_OBJS:=./lib/wolfssl/wolfcrypt/src/sp_int.o endif -CFLAGS+=-mthumb -Wall -Wextra -Wno-main -Wstack-usage=1024 -ffreestanding -Wno-unused \ - -I. -Ilib/bootutil/include -Iinclude/ -Ilib/wolfssl -nostartfiles \ +ifeq ($(SIGN),ECC256) + KEYGEN_TOOL=tools/ecc256/ecc256_keygen + SIGN_TOOL=tools/ecc256/ecc256_sign + PRIVATE_KEY=ecc256.der + OBJS+= \ + $(MATH_OBJS) \ + ./lib/wolfssl/wolfcrypt/src/ecc.o \ + ./lib/wolfssl/wolfcrypt/src/ge_low_mem.o \ + ./lib/wolfssl/wolfcrypt/src/memory.o \ + ./lib/wolfssl/wolfcrypt/src/wc_port.o \ + ./src/ecc256_pub_key.o \ + ./src/xmalloc.o + CFLAGS+=-DWOLFBOOT_SIGN_ECC256 -DXMALLOC_USER +else + KEYGEN_TOOL=tools/ed25519/ed25519_keygen + SIGN_TOOL=tools/ed25519/ed25519_sign + PRIVATE_KEY=ed25519.der + OBJS+= ./lib/wolfssl/wolfcrypt/src/sha512.o \ + ./lib/wolfssl/wolfcrypt/src/ed25519.o \ + ./lib/wolfssl/wolfcrypt/src/ge_low_mem.o \ + ./src/ed25519_pub_key.o + CFLAGS+=-DWOLFBOOT_SIGN_ED25519 -nostdlib -DWOLFSSL_STATIC_MEMORY + LDFLAGS+=-nostdlib +endif + + +CFLAGS+=-Wall -Wextra -Wno-main -Wstack-usage=1024 -ffreestanding -Wno-unused \ + -I. -Iinclude/ -Ilib/wolfssl -nostartfiles \ -DWOLFSSL_USER_SETTINGS \ - -mthumb -mlittle-endian -mthumb-interwork \ -DPLATFORM_$(TARGET) -ifeq ($(TARGET),kinetis) - CFLAGS+= -I$(KINETIS_DRIVERS)/drivers -I$(KINETIS_DRIVERS) -DCPU_MK64FN1M0VLL12 -I$(KINETIS_CMSIS)/Include -DDEBUG_CONSOLE_ASSERT_DISABLE=1 - OBJS+= $(KINETIS_DRIVERS)/drivers/fsl_clock.o $(KINETIS_DRIVERS)/drivers/fsl_ftfx_flash.o $(KINETIS_DRIVERS)/drivers/fsl_ftfx_cache.o $(KINETIS_DRIVERS)/drivers/fsl_ftfx_controller.o -endif - ifeq ($(SPI_FLASH),1) EXT_FLASH=1 CFLAGS+= -DSPI_FLASH=1 @@ -91,7 +94,6 @@ ifeq ($(EXT_FLASH),1) CFLAGS+= -DEXT_FLASH=1 -DPART_UPDATE_EXT=1 -DPART_SWAP_EXT=1 endif - ifeq ($(ALLOW_DOWNGRADE),1) CFLAGS+= -DALLOW_DOWNGRADE endif @@ -100,29 +102,7 @@ ifeq ($(NVM_FLASH_WRITEONCE),1) CFLAGS+= -DNVM_FLASH_WRITEONCE endif -LDFLAGS:=-T $(LSCRIPT) -Wl,-gc-sections -Wl,-Map=wolfboot.map -ffreestanding -nostartfiles -mcpu=cortex-m3 -mthumb -ASFLAGS:=$(CFLAGS) -ifeq ($(SIGN),ED25519) - OBJS+= ./lib/wolfssl/wolfcrypt/src/sha512.o \ - ./lib/wolfssl/wolfcrypt/src/ed25519.o \ - ./lib/wolfssl/wolfcrypt/src/ge_low_mem.o \ - ./src/ed25519_pub_key.o - CFLAGS+=-DWOLFBOOT_SIGN_ED25519 -nostdlib -DWOLFSSL_STATIC_MEMORY - LDFLAGS+=-nostdlib -endif - -ifeq ($(SIGN),ECC256) - OBJS+= \ - $(MATH_OBJS) \ - ./lib/wolfssl/wolfcrypt/src/ecc.o \ - ./lib/wolfssl/wolfcrypt/src/ge_low_mem.o \ - ./lib/wolfssl/wolfcrypt/src/memory.o \ - ./lib/wolfssl/wolfcrypt/src/wc_port.o \ - ./src/ecc256_pub_key.o \ - ./src/xmalloc.o - CFLAGS+=-DWOLFBOOT_SIGN_ECC256 -DXMALLOC_USER -endif ifeq ($(DEBUG),1) CFLAGS+=-O0 -g -ggdb3 -DDEBUG=1 @@ -130,57 +110,68 @@ else CFLAGS+=-Os endif +ifeq ($(V),0) + Q=@ +endif + ifeq ($(VTOR),0) CFLAGS+=-DNO_VTOR endif +ASFLAGS:=$(CFLAGS) all: factory.bin - wolfboot.bin: wolfboot.elf - $(OBJCOPY) -O binary $^ $@ - $(SIZE) wolfboot.elf + @echo "\t[BIN] $@" + $(Q)$(OBJCOPY) -O binary $^ $@ wolfboot.hex: wolfboot.elf - $(OBJCOPY) -O ihex $^ $@ + @echo "\t[HEX] $@" + $(Q)$(OBJCOPY) -O ihex $^ $@ align: wolfboot-align.bin -wolfboot-align.bin: wolfboot.elf - $(OBJCOPY) -O binary $^ $@ --pad-to=$(BOOT0_OFFSET) --gap-fill=255 - $(SIZE) wolfboot.elf - +wolfboot-align.bin: wolfboot.bin + @cat include/target.h |grep WOLFBOOT_PARTITION_BOOT_ADDRESS | head -1 | sed -e "s/.*[ ]//g" > .wolfboot-offset + @printf "%d" `cat .wolfboot-offset` > .wolfboot-offset + @printf "%d" $(ARCH_FLASH_OFFSET) >.wolfboot-arch-offset + @expr `cat .wolfboot-offset` - `cat .wolfboot-arch-offset` >.wolfboot-partition-size + @dd if=/dev/zero bs=`cat .wolfboot-partition-size` count=1 2>/dev/null | tr "\000" "\377" > $(@) + @rm -f .wolfboot-partition-size .wolfboot-offset .wolfboot-arch-offset + @dd if=$^ of=$(@) conv=notrunc 2>/dev/null + @echo + @echo "\t[SIZE]" + @$(SIZE) wolfboot.elf + @echo test-app/image.bin: - make -C test-app TARGET=$(TARGET) EXT_FLASH=$(EXT_FLASH) SPI_FLASH=$(SPI_FLASH) + @make -C test-app TARGET=$(TARGET) EXT_FLASH=$(EXT_FLASH) SPI_FLASH=$(SPI_FLASH) ARCH=$(ARCH) V=$(V) + @rm -f src/*.o hal/*.o include tools/test.mk tools/ed25519/ed25519_sign: - make -C tools/ed25519 + @make -C tools/ed25519 tools/ecc256/ecc256_sign: - make -C tools/ecc256 + @make -C tools/ecc256 ed25519.der: tools/ed25519/ed25519_sign - tools/ed25519/ed25519_keygen src/ed25519_pub_key.c + @tools/ed25519/ed25519_keygen src/ed25519_pub_key.c ecc256.der: tools/ecc256/ecc256_sign - tools/ecc256/ecc256_keygen src/ecc256_pub_key.c + @tools/ecc256/ecc256_keygen src/ecc256_pub_key.c factory.bin: $(BOOT_IMG) wolfboot-align.bin $(SIGN_TOOL) $(PRIVATE_KEY) - $(SIGN_TOOL) $(BOOT_IMG) $(PRIVATE_KEY) 1 - cat wolfboot-align.bin $(BOOT_IMG).v1.signed > $@ - -second.img: $(BOOT_IMG) wolfboot-align.bin $(SIGN_TOOL) $(PRIVATE_KEY) - $(SIGN_TOOL) $(BOOT_IMG) $(PRIVATE_KEY) 1 65536 - $(SIGN_TOOL) $(BOOT_IMG) $(PRIVATE_KEY) 2 - cat wolfboot-align.bin $(BOOT_IMG).v1.signed $(BOOT_IMG).v2.signed > $@ + @echo "\t[SIGN] $(BOOT_IMG)" + $(Q)$(SIGN_TOOL) $(BOOT_IMG) $(PRIVATE_KEY) 1 >/dev/null + @echo "\t[MERGE] $@" + @cat wolfboot-align.bin $(BOOT_IMG).v1.signed > $@ wolfboot.elf: $(OBJS) $(LSCRIPT) - grep stat $(OBJS) - $(LD) $(LDFLAGS) -Wl,--start-group $(OBJS) -Wl,--end-group -o $@ + @echo "\t[LD] $@" + $(Q)$(LD) $(LDFLAGS) -Wl,--start-group $(OBJS) -Wl,--end-group -o $@ src/ed25519_pub_key.c: ed25519.der @@ -189,13 +180,23 @@ src/ecc256_pub_key.c: ecc256.der keys: $(PRIVATE_KEY) clean: - rm -f *.bin *.elf $(OBJS) wolfboot.map *.bin *.hex hal/*.o - make -C test-app clean + @find . -type f -name "*.o" | xargs -x rm -f + @rm -f *.bin *.elf wolfboot.map *.bin *.hex + @make -C test-app clean distclean: clean - make -C tools/ed25519 clean - make -C tools/ecc256 clean - rm -f *.pem *.der tags ./src/ed25519_pub_key.c ./src/ecc256_pub_key.c + @make -C tools/ed25519 clean + @make -C tools/ecc256 clean + @rm -f *.pem *.der tags ./src/ed25519_pub_key.c ./src/ecc256_pub_key.c + + +%.o:%.c + @echo "\t[CC-$(ARCH)] $@" + $(Q)$(CC) $(CFLAGS) -c -o $@ $^ + +%.o:%.S + @echo "\t[AS-$(ARCH)] $@" + $(Q)$(CC) $(CFLAGS) -c -o $@ $^ FORCE: diff --git a/arch.mk b/arch.mk new file mode 100644 index 00000000..e6ff112a --- /dev/null +++ b/arch.mk @@ -0,0 +1,54 @@ +## CPU Architecture selection via $ARCH + +## ARM +ifeq ($(ARCH),ARM) + CROSS_COMPILE:=arm-none-eabi- + CFLAGS+=-mthumb -mlittle-endian -mthumb-interwork -DARCH_ARM + LDFLAGS+=-mthumb -mlittle-endian -mthumb-interwork + OBJS+=src/boot_arm.o + ARCH_FLASH_OFFSET=0x0 + + ## Cortex-M CPU + ifeq ($(CORTEX_M0),1) + CFLAGS+=-mcpu=cortex-m0 + LDFLAGS+=-mcpu=cortex-m0 + MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o + else + ifeq ($(NO_ASM),1) + MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o + CFLAGS+=-mcpu=cortex-m3 + LDFLAGS+=-mcpu=cortex-m3 + else + CFLAGS+=-mcpu=cortex-m3 -DWOLFSSL_SP_ASM -DWOLFSSL_SP_ARM_CORTEX_M_ASM -fomit-frame-pointer + LDFLAGS+=-mcpu=cortex-m3 + MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_cortexm.o + endif + endif +endif + +## RISCV +ifeq ($(ARCH),RISCV) + CROSS_COMPILE:=riscv32-unknown-elf- + CFLAGS+=-fno-builtin-printf -DUSE_PLIC -DUSE_M_TIME -g -march=rv32imac -mabi=ilp32 -mcmodel=medany -nostartfiles -DARCH_RISCV + LDFLAGS+=-march=rv32imac -mabi=ilp32 -mcmodel=medany + OBJS+=src/boot_riscv.o src/vector_riscv.o + ARCH_FLASH_OFFSET=0x20400000 +endif + +## Toolchain setup +CC=$(CROSS_COMPILE)gcc +LD=$(CROSS_COMPILE)gcc +AS=$(CROSS_COMPILE)gcc +OBJCOPY:=$(CROSS_COMPILE)objcopy +SIZE:=$(CROSS_COMPILE)size +BOOT_IMG?=test-app/image.bin + +## Target specific configuration +ifeq ($(TARGET),samr21) + CORTEX_M0=1 +endif + +ifeq ($(TARGET),kinetis) + CFLAGS+= -I$(KINETIS_DRIVERS)/drivers -I$(KINETIS_DRIVERS) -DCPU_$(KINETIS_CPU) -I$(KINETIS_CMSIS)/Include -DDEBUG_CONSOLE_ASSERT_DISABLE=1 + OBJS+= $(KINETIS_DRIVERS)/drivers/fsl_clock.o $(KINETIS_DRIVERS)/drivers/fsl_ftfx_flash.o $(KINETIS_DRIVERS)/drivers/fsl_ftfx_cache.o $(KINETIS_DRIVERS)/drivers/fsl_ftfx_controller.o +endif diff --git a/hal/hifive1.c b/hal/hifive1.c new file mode 100644 index 00000000..af0a7512 --- /dev/null +++ b/hal/hifive1.c @@ -0,0 +1,61 @@ +/* hifive1.c + * + * Copyright (C) 2018 wolfSSL Inc. + * + * This file is part of wolfBoot. + * + * wolfBoot is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * wolfBoot is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA + */ + +#include +#include +#ifndef ARCH_RISCV +# error "wolfBoot hifive1 HAL: wrong architecture selected. Please compile with ARCH=RISCV." +#endif + +#ifdef __WOLFBOOT + +void hal_init(void) +{ +} + +void hal_prepare_boot(void) +{ +} + +#endif + +int hal_flash_write(uint32_t address, const uint8_t *data, int len) +{ + return 0; +} + +void hal_flash_unlock(void) +{ +} + +void hal_flash_lock(void) +{ +} + + +int hal_flash_erase(uint32_t address, int len) +{ + return 0; +} + + + + diff --git a/hal/hifive1.ld b/hal/hifive1.ld new file mode 100644 index 00000000..4db313e0 --- /dev/null +++ b/hal/hifive1.ld @@ -0,0 +1,52 @@ +OUTPUT_ARCH( "riscv" ) + +ENTRY( _reset ) + +MEMORY +{ + FLASH(rxai!w) : ORIGIN = 0x20400000, LENGTH = 512K + RAM(wxa!ri) : ORIGIN = 0x80000000, LENGTH = 16K +} + +SECTIONS +{ + .text : + { + _start_text = .; + KEEP(*(.init)) + . = ORIGIN(FLASH) + 0x100; + _start_vector = .; + KEEP(*(.isr_vector)) + *(.text*) + *(.rodata*) + . = ALIGN(4); + _end_text = .; + } > FLASH + + _stored_data = .; + + .data : AT (_stored_data) + { + . = ALIGN(4096); + _start_data = .; + *(.data*) + _global_pointer = . + 0x800; + *(.sdata*) + . = ALIGN(4); + _end_data = .; + } > RAM + + .bss : + { + _start_bss = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + _end_bss = .; + _end = .; + } > RAM + +} + +PROVIDE(_start_heap = _end); +PROVIDE(_end_stack = ORIGIN(RAM) + (LENGTH(RAM)) ); diff --git a/include/target.h b/include/target.h index 658f599e..a9b3ec6d 100644 --- a/include/target.h +++ b/include/target.h @@ -6,7 +6,6 @@ * Ensure that your firmware entry point is * at FLASH_AREA_IMAGE_0_OFFSET + 0x100 */ - # define WOLFBOOT_SECTOR_SIZE 0x20000 # define WOLFBOOT_PARTITION_BOOT_ADDRESS 0x20000 @@ -27,4 +26,4 @@ # define WOLFBOOT_PARTITION_SWAP_ADDRESS 0x60000 #endif -#endif +#endif /* H_TARGETS_TARGET_ */ diff --git a/src/wolfboot.c b/src/boot_arm.c similarity index 99% rename from src/wolfboot.c rename to src/boot_arm.c index 398f73a6..de1ab6a7 100644 --- a/src/wolfboot.c +++ b/src/boot_arm.c @@ -1,4 +1,4 @@ -/* wolfboot.c +/* boot_arm.c * * Copyright (C) 2018 wolfSSL Inc. * @@ -109,7 +109,6 @@ void do_boot(const uint32_t *app_offset) asm volatile("mov pc, %0" ::"r"(app_entry)); } - __attribute__ ((section(".isr_vector"))) void (* const IV[])(void) = { diff --git a/src/boot_riscv.c b/src/boot_riscv.c new file mode 100644 index 00000000..e1b83795 --- /dev/null +++ b/src/boot_riscv.c @@ -0,0 +1,86 @@ +/* boot_riscv.c + * + * Copyright (C) 2018 wolfSSL Inc. + * + * This file is part of wolfBoot. + * + * wolfBoot is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * wolfBoot is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA + */ + +#include + +extern void trap_entry(void); +extern void trap_exit(void); + +extern uint32_t _start_vector; +extern uint32_t _stored_data; +extern uint32_t _start_data; +extern uint32_t _end_data; +extern uint32_t _start_bss; +extern uint32_t _end_bss; +extern uint32_t _end_stack; +extern uint32_t _start_heap; +extern uint32_t _global_pointer; +extern void (* const IV[])(void); + +extern void main(void); +void __attribute__((naked,section(".init"))) _reset(void) { + register uint32_t *src, *dst; + asm volatile("la gp, _global_pointer"); + asm volatile("la sp, _end_stack"); + + /* Set up vectored interrupt, with IV starting at offset 0x100 */ + asm volatile("csrw mtvec, %0":: "r"((uint8_t *)(&_start_vector) + 1)); + + src = (uint32_t *) &_stored_data; + dst = (uint32_t *) &_start_data; + /* Copy the .data section from flash to RAM. */ + while (dst < (uint32_t *)&_end_data) { + *dst = *src; + dst++; + src++; + } + + /* Initialize the BSS section to 0 */ + dst = &_start_bss; + while (dst < (uint32_t *)&_end_bss) { + *dst = 0U; + dst++; + } + + /* Run wolfboot */ + main(); + while(1) + ; +} + +void do_boot(const uint32_t *app_offset) +{ + +} + +static uint32_t synctrap_cause = 0; +void __attribute__((naked)) isr_synctrap(void) +{ + asm volatile("csrr %0,mcause" : "=r"(synctrap_cause)); + //asm volatile("ebreak"); +} + +void isr_empty(void) +{ + +} + + diff --git a/src/vector_riscv.S b/src/vector_riscv.S new file mode 100644 index 00000000..4212b387 --- /dev/null +++ b/src/vector_riscv.S @@ -0,0 +1,141 @@ +/** + * RISC-V bootup + * Copyright (C) 2018 wolfSSL Inc. + * + * This file is part of wolfBoot. + * + * wolfBoot is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * wolfBoot is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA + */ + +.macro trap_entry + addi sp, sp, -64 + sw x1, 0(sp) + sw x5, 4(sp) + sw x6, 8(sp) + sw x7, 12(sp) + sw x10, 16(sp) + sw x11, 20(sp) + sw x12, 24(sp) + sw x13, 28(sp) + sw x14, 32(sp) + sw x15, 36(sp) + sw x16, 40(sp) + sw x17, 44(sp) + sw x28, 48(sp) + sw x29, 52(sp) + sw x30, 56(sp) + sw x31, 60(sp) +.endm + + +.macro trap_exit + lw x1, 0(sp) + lw x5, 4(sp) + lw x6, 8(sp) + lw x7, 12(sp) + lw x10, 16(sp) + lw x11, 20(sp) + lw x12, 24(sp) + lw x13, 28(sp) + lw x14, 32(sp) + lw x15, 36(sp) + lw x16, 40(sp) + lw x17, 44(sp) + lw x28, 48(sp) + lw x29, 52(sp) + lw x30, 56(sp) + lw x31, 60(sp) + addi sp, sp, 64 + mret +.endm + +.section .isr_vector +.align 8 + +.global IV + +IV: + j _synctrap + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + +_synctrap: + trap_entry + jal isr_synctrap + trap_exit + +trap_empty: + nop diff --git a/test-app/app.ld b/test-app/ARM.ld similarity index 100% rename from test-app/app.ld rename to test-app/ARM.ld diff --git a/test-app/Makefile b/test-app/Makefile index 4eef45e1..3e95f5a4 100644 --- a/test-app/Makefile +++ b/test-app/Makefile @@ -1,11 +1,24 @@ -CROSS_COMPILE:=arm-none-eabi- -CC:=$(CROSS_COMPILE)gcc -LD:=$(CROSS_COMPILE)gcc -OBJS:=startup.o main.o timer.o led.o system.o ../src/libwolfboot.o ../hal/$(TARGET).o TARGET?=none -LSCRIPT:=app.ld -OBJCOPY:=$(CROSS_COMPILE)objcopy -CFLAGS:=-mcpu=cortex-m3 -mthumb -g -ggdb -Wall -Wno-main -Wstack-usage=200 -ffreestanding -Wno-unused -DPLATFORM_$(TARGET) -I../include -nostartfiles +ARCH?=ARM + +CFLAGS:=-g -ggdb -Wall -Wstack-usage=200 -ffreestanding -Wno-unused -DPLATFORM_$(TARGET) -I../include -nostartfiles + +APP_OBJS:=main.o led.o system.o timer.o ../hal/$(TARGET).o ../src/libwolfboot.o +include ../arch.mk + +ifeq ($(ARCH),RISCV) + APP_OBJS+=startup_riscv.o vector_riscv.o +endif + +ifeq ($(ARCH),ARM) + APP_OBJS+=startup_arm.o +endif + +ifeq ($(V),0) + Q=@ +endif + +LSCRIPT:=$(ARCH).ld LDFLAGS:=$(CFLAGS) -T $(LSCRIPT) -Wl,-gc-sections -Wl,-Map=image.map ifeq ($(EXT_FLASH),1) @@ -14,24 +27,29 @@ endif ifeq ($(SPI_FLASH),1) CFLAGS+=-DSPI_FLASH - OBJS+=../hal/spi/spi_drv_$(TARGET).o ../src/spi_flash.o + APP_OBJS+=../hal/spi/spi_drv_$(TARGET).o ../src/spi_flash.o endif image.bin: image.elf - $(OBJCOPY) -O binary $^ $@ + @echo "\t[BIN] $@" + $(Q)$(OBJCOPY) -O binary $^ $@ -image.elf: $(OBJS) $(LSCRIPT) - $(LD) $(LDFLAGS) $(OBJS) -o $@ +image.elf: $(APP_OBJS) $(LSCRIPT) + @echo "\t[LD] $@" + $(Q)$(LD) $(LDFLAGS) $(APP_OBJS) -o $@ standalone:CFLAGS+=-DPLATFORM_stm32f4 standalone:LDFLAGS:=-T standalone.ld -Wl,-gc-sections -Wl,-Map=image.map -nostdlib - standalone: image.bin - -startup.o: startup.c -main.o: main.c +%.o:%.c + @echo "\t[CC-$(ARCH)] $@" + $(Q)$(CC) $(CFLAGS) -c -o $@ $^ + +%.o:%.S + @echo "\t[AS-$(ARCH)] $@" + $(Q)$(CC) $(CFLAGS) -c -o $@ $^ clean: - rm -f image.bin* image.elf *.o image.map tags + @rm -f image.bin* image.elf *.o image.map tags diff --git a/test-app/RISCV.ld b/test-app/RISCV.ld new file mode 100644 index 00000000..54c6a524 --- /dev/null +++ b/test-app/RISCV.ld @@ -0,0 +1,52 @@ +OUTPUT_ARCH( "riscv" ) + +ENTRY( _reset ) + +MEMORY +{ + FLASH(rxai!w) : ORIGIN = 0x20404100, LENGTH = (512K - 0x4100) + RAM(wxa!ri) : ORIGIN = 0x80000000, LENGTH = 16K +} + +SECTIONS +{ + .text : + { + _start_text = .; + KEEP(*(.init)) + . = ORIGIN(FLASH) + 0x100; + _start_vector = .; + KEEP(*(.isr_vector)) + *(.text*) + *(.rodata*) + . = ALIGN(4); + _end_text = .; + } > FLASH + + _stored_data = .; + + .data : AT (_stored_data) + { + . = ALIGN(4096); + _start_data = .; + *(.data*) + _global_pointer = . + 0x800; + *(.sdata*) + . = ALIGN(4); + _end_data = .; + } > RAM + + .bss : + { + _start_bss = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + _end_bss = .; + _end = .; + } > RAM + +} + +PROVIDE(_start_heap = _end); +PROVIDE(_end_stack = ORIGIN(RAM) + (LENGTH(RAM)) ); diff --git a/test-app/led.c b/test-app/led.c index bfe66e16..476098b4 100644 --- a/test-app/led.c +++ b/test-app/led.c @@ -21,6 +21,7 @@ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA */ +#ifdef PLATFORM_stm32f4 #include #include "wolfboot/wolfboot.h" @@ -69,3 +70,4 @@ void boot_led_on(void) GPIOD_BSRR |= (1 << pin); } +#endif /** PLATFORM_stm32f4 **/ diff --git a/test-app/main.c b/test-app/main.c index 7ae59695..bd3eb446 100644 --- a/test-app/main.c +++ b/test-app/main.c @@ -297,7 +297,7 @@ void main(void) { while(1) ; } -#endif +#endif /** PLATFROM_stm32f4 **/ #ifdef PLATFORM_nrf52 #define GPIO_BASE (0x50000000) @@ -335,3 +335,10 @@ void main(void) { } #endif +#ifdef PLATFORM_hifive1 +void main(void) { + while(1) + ; +} +#endif + diff --git a/test-app/startup.c b/test-app/startup_arm.c similarity index 100% rename from test-app/startup.c rename to test-app/startup_arm.c diff --git a/test-app/startup_riscv.c b/test-app/startup_riscv.c new file mode 100644 index 00000000..e1b83795 --- /dev/null +++ b/test-app/startup_riscv.c @@ -0,0 +1,86 @@ +/* boot_riscv.c + * + * Copyright (C) 2018 wolfSSL Inc. + * + * This file is part of wolfBoot. + * + * wolfBoot is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * wolfBoot is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA + */ + +#include + +extern void trap_entry(void); +extern void trap_exit(void); + +extern uint32_t _start_vector; +extern uint32_t _stored_data; +extern uint32_t _start_data; +extern uint32_t _end_data; +extern uint32_t _start_bss; +extern uint32_t _end_bss; +extern uint32_t _end_stack; +extern uint32_t _start_heap; +extern uint32_t _global_pointer; +extern void (* const IV[])(void); + +extern void main(void); +void __attribute__((naked,section(".init"))) _reset(void) { + register uint32_t *src, *dst; + asm volatile("la gp, _global_pointer"); + asm volatile("la sp, _end_stack"); + + /* Set up vectored interrupt, with IV starting at offset 0x100 */ + asm volatile("csrw mtvec, %0":: "r"((uint8_t *)(&_start_vector) + 1)); + + src = (uint32_t *) &_stored_data; + dst = (uint32_t *) &_start_data; + /* Copy the .data section from flash to RAM. */ + while (dst < (uint32_t *)&_end_data) { + *dst = *src; + dst++; + src++; + } + + /* Initialize the BSS section to 0 */ + dst = &_start_bss; + while (dst < (uint32_t *)&_end_bss) { + *dst = 0U; + dst++; + } + + /* Run wolfboot */ + main(); + while(1) + ; +} + +void do_boot(const uint32_t *app_offset) +{ + +} + +static uint32_t synctrap_cause = 0; +void __attribute__((naked)) isr_synctrap(void) +{ + asm volatile("csrr %0,mcause" : "=r"(synctrap_cause)); + //asm volatile("ebreak"); +} + +void isr_empty(void) +{ + +} + + diff --git a/test-app/system.c b/test-app/system.c index b0c9e14a..978c354c 100644 --- a/test-app/system.c +++ b/test-app/system.c @@ -20,7 +20,7 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA */ - +#ifdef PLATFORM_stm32f4 #include #include "system.h" @@ -131,3 +131,4 @@ void clock_config(void) RCC_CR &= ~RCC_CR_HSION; } +#endif /** PLATFORM_stm32f4 **/ diff --git a/test-app/timer.c b/test-app/timer.c index 8563b1ae..8f85e2e7 100644 --- a/test-app/timer.c +++ b/test-app/timer.c @@ -1,4 +1,4 @@ -/* system.c +/* timer.c * * Test bare-metal blinking led application * @@ -21,6 +21,7 @@ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA */ +#ifdef PLATFORM_stm32f4 #include #include "system.h" #include "led.h" @@ -161,5 +162,4 @@ void isr_tim2(void) time_elapsed++; } - - +#endif /** PLATFORM_stm32f4 **/ diff --git a/test-app/vector_riscv.S b/test-app/vector_riscv.S new file mode 100644 index 00000000..56ba330f --- /dev/null +++ b/test-app/vector_riscv.S @@ -0,0 +1,142 @@ +/** + * RISC-V bootup + * Copyright (C) 2018 wolfSSL Inc. + * + * This file is part of wolfBoot. + * + * wolfBoot is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * wolfBoot is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA + * + */ + +.macro trap_entry + addi sp, sp, -64 + sw x1, 0(sp) + sw x5, 4(sp) + sw x6, 8(sp) + sw x7, 12(sp) + sw x10, 16(sp) + sw x11, 20(sp) + sw x12, 24(sp) + sw x13, 28(sp) + sw x14, 32(sp) + sw x15, 36(sp) + sw x16, 40(sp) + sw x17, 44(sp) + sw x28, 48(sp) + sw x29, 52(sp) + sw x30, 56(sp) + sw x31, 60(sp) +.endm + + +.macro trap_exit + lw x1, 0(sp) + lw x5, 4(sp) + lw x6, 8(sp) + lw x7, 12(sp) + lw x10, 16(sp) + lw x11, 20(sp) + lw x12, 24(sp) + lw x13, 28(sp) + lw x14, 32(sp) + lw x15, 36(sp) + lw x16, 40(sp) + lw x17, 44(sp) + lw x28, 48(sp) + lw x29, 52(sp) + lw x30, 56(sp) + lw x31, 60(sp) + addi sp, sp, 64 + mret +.endm + +.section .isr_vector +.align 8 + +.global IV + +IV: + j _synctrap + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + j trap_empty + .align 2 + +_synctrap: + trap_entry + jal isr_synctrap + trap_exit + +trap_empty: + nop