mirror of https://github.com/wolfSSL/wolfBoot.git
add raspi3b uart
Hideki Miyazaki
Daniele Lacamera
parent
68285050b5
commit
bf88d15ea6
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@ -8,6 +8,7 @@ SPMATH?=1
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IMAGE_HEADER_SIZE?=1024
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PKA?=1
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WOLFTPM?=0
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DEBUG_UART?=0
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WOLFBOOT_SECTOR_SIZE=0x400
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WOLFBOOT_NO_PARTITIONS=1
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WOLFBOOT_LOAD_ADDRESS?=0x3080000
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@ -1089,7 +1089,7 @@ git clone https://github.com/raspberrypi/linux linux-rpi -b rpi-4.19.y --depth=1
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export wolfboot_dir=`pwd`
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cd linux-rpi
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patch -p1 < $wolfboot_dir/tools/wolfboot-rpi-devicetree.diff
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make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- bcmrpi3_defconfig
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make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- bcm2711_defconfig
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make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu-
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```
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@ -1126,10 +1126,66 @@ dd if=bcm2710-rpi-3-b.dtb of=wolfboot_linux_raspi.bin bs=1 seek=128K conv=notrun
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* Test boot using qemu
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Download [root file system image(2020-02-13-raspbian-buster-lite.zip)](https://ftp.jaist.ac.jp/pub/raspberrypi/raspbian_lite/images/raspbian_lite-2020-02-14/2020-02-13-raspbian-buster-lite.zip)
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```
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qemu-system-aarch64 -M raspi3b -m 1024 -serial stdio -kernel wolfboot_linux_raspi.bin -cpu cortex-a53
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qemu-system-aarch64 -M raspi3b -m 1024 -serial stdio -kernel wolfboot_linux_raspi.bin -cpu cortex-a53 -drive file=../wolfboot/2020-02-13-raspbian-buster-lite.img,if=sd,format=raw
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```
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### Testing on [Raspberry PI 3 B Plus](https://www.raspberrypi.com/products/raspberry-pi-3-model-b-plus/)
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* Copy dtb file for Raspberry PI 3 B Plus to the wolfboot directory
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```
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cp /path/to/raspberry-pi-linux/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dtb $wolfboot_dir
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cd $wolfboot_dir
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```
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* Compose the image
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```
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dd if=bcm2710-rpi-3-b-plus.dtb of=wolfboot_linux_raspi.bin bs=1 seek=128K conv=notrunc
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```
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* Copy the kernel image to boot partition of boot media. e.g. SD card
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Raspberry Pi loads `kernel8.img` when it is in `AArch64` mode. Therefore, the kernel image is copied to boot partition as `kernel8.img` file name.
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```
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cp wolfboot_linux_raspi.bin /media/foo/boot/kernel8.img
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```
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* Troubleshooting
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o Turn on UART for debugging to know what boot-process is going on. Chaning DEBUG_UART property in .config to 1.
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```
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DEBUG_UART?=1
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```
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UART properties set as 115200 bps, 8bit data transmission, 1 stop bit and no parity.
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You would see the following message when wolfboot starts.
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```
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My board version is: 0xA020D3
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Trying partition 0 at 0x140000
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Boot partition: 0x140000 (size 14901760, version 0x1)
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....
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````
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Note: Now, integrity-check takes 2 - 3 minutes to complete before running Linux kernel.
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o Kernel panic after wolfboot message
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Mount position of root file system could be wrong. Checking your boot media by `lsblk` command.
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```
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$ lsblk
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NAME MAJ:MIN RM SIZE RO TYPE MOUNTPOINT
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mmcblk0 179:0 0 29.7G 0 disk
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├─mmcblk0p1 179:1 0 63M 0 part
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├─mmcblk0p2 179:2 0 1K 0 part
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├─mmcblk0p5 179:5 0 32M 0 part
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├─mmcblk0p6 179:6 0 66M 0 part /boot
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└─mmcblk0p7 179:7 0 29.6G 0 part /
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```
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It need to modify dtb file accordingly. Go to /path/to/raspberry-pi-linux/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts. Change `root=/dev/mmcblk0p7` of the following line in the file to your root file system device.
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```
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bootargs = "coherent_pool=1M 8250.nr_uarts=1 console=ttyAMA0,115200 console=tty1 root=/dev/mmcblk0p7 rootfstype=ext4 elevator=deadline fsck.repair=yes rootwait splash plymouth.ignore-serial-consoles";
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```
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### Testing with kernel encryption
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258
hal/raspi3.c
258
hal/raspi3.c
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@ -18,23 +18,209 @@
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
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*/
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#include <stddef.h>
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#include <stdint.h>
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#include <string.h>
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#include <target.h>
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#include "image.h"
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#include "printf.h"
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#ifndef ARCH_AARCH64
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# error "wolfBoot raspi3 HAL: wrong architecture selected. Please compile with ARCH=AARCH64."
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#endif
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#define TEST_ENCRYPT
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#if defined(DEBUG_UART)
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#define PRINTF_ENABLED
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#endif
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#define CORTEXA53_0_CPU_CLK_FREQ_HZ 1099989014
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#define CORTEXA53_0_TIMESTAMP_CLK_FREQ 99998999
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#define MMIO_BASE 0x3F000000
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#define GPIO_BASE MMIO_BASE + 0x200000
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#define GPFSEL1 ((volatile unsigned int*)(GPIO_BASE+0x04))
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#define GPPUD ((volatile unsigned int*)(GPIO_BASE+0x94))
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#define GPPUDCLK0 ((volatile unsigned int*)(GPIO_BASE+0x98))
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/* PL011 UART registers */
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#define UART0_BASE GPIO_BASE + 0x1000
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#define UART0_DR ((volatile unsigned int*)(UART0_BASE+0x00))
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#define UART0_FR ((volatile unsigned int*)(UART0_BASE+0x18))
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#define UART0_IBRD ((volatile unsigned int*)(UART0_BASE+0x24))
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#define UART0_FBRD ((volatile unsigned int*)(UART0_BASE+0x28))
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#define UART0_LCRH ((volatile unsigned int*)(UART0_BASE+0x2C))
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#define UART0_CR ((volatile unsigned int*)(UART0_BASE+0x30))
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#define UART0_IMSC ((volatile unsigned int*)(UART0_BASE+0x38))
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#define UART0_ICR ((volatile unsigned int*)(UART0_BASE+0x44))
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/* mail box message buffer */
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volatile unsigned int __attribute__((aligned(16))) mbox[36];
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#define VIDEOCORE_MBOX (MMIO_BASE+0x0000B880)
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#define MBOX_READ ((volatile unsigned int*)(VIDEOCORE_MBOX+0x0))
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#define MBOX_POLL ((volatile unsigned int*)(VIDEOCORE_MBOX+0x10))
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#define MBOX_SENDER ((volatile unsigned int*)(VIDEOCORE_MBOX+0x14))
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#define MBOX_STATUS ((volatile unsigned int*)(VIDEOCORE_MBOX+0x18))
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#define MBOX_CONFIG ((volatile unsigned int*)(VIDEOCORE_MBOX+0x1C))
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#define MBOX_WRITE ((volatile unsigned int*)(VIDEOCORE_MBOX+0x20))
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#define MBOX_RESPONSE 0x80000000
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#define MBOX_FULL 0x80000000
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#define MBOX_EMPTY 0x40000000
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#define MBOX_REQUEST 0
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/* channels */
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#define MBOX_CH_POWER 0
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#define MBOX_CH_FB 1
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#define MBOX_CH_VUART 2
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#define MBOX_CH_VCHIQ 3
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#define MBOX_CH_LEDS 4
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#define MBOX_CH_BTNS 5
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#define MBOX_CH_TOUCH 6
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#define MBOX_CH_COUNT 7
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#define MBOX_CH_PROP 8
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/* tags */
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#define MBOX_TAG_GETBRDVERSION 0x10002
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#define MBOX_TAG_GETSERIAL 0x10004
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#define MBOX_TAG_GET_CLOCK_RATE 0x30002
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#define MBOX_TAG_SETCLKRATE 0x38002
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#define MBOX_TAG_LAST 0
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/* Fixed addresses */
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extern void *kernel_addr, *update_addr, *dts_addr;
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/* Loop <delay> times */
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static inline void delay(int32_t count)
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{
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register unsigned int c;
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c = count;
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while (c--) {
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asm volatile("nop");
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}
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}
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/**
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* write message to mailbox
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*/
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static void mailbox_write(uint8_t chan)
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{
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uint32_t ch = (((uint32_t)((unsigned long)&mbox) & ~0xf)
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| (chan & 0xf));
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/* wait until mail box becomes ready to write */
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while ((*MBOX_STATUS & MBOX_FULL) != 0) { }
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/* write the address of the message to mail-box channel */
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*MBOX_WRITE = ch;
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}
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/**
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* read message from mailbox
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*/
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static int mailbox_read(uint8_t chan)
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{
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uint32_t ch = (((uint32_t)((unsigned long)&mbox) & ~0xf)
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| (chan & 0xf));
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/* now wait for the response */
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while(1) {
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while ((*MBOX_STATUS & MBOX_EMPTY) != 0) { }
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if(ch == *MBOX_READ)
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/* is it a valid successful response */
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return mbox[1] == MBOX_RESPONSE;
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}
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return 0;
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}
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/* UART functions for Raspberry Pi 3 UART */
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void uart_tx(char c)
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{
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/* wait until uart channel is ready to send */
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do{
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asm volatile("nop");
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} while(*UART0_FR & 0x20);
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*UART0_DR = c;
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}
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char uart_read(void)
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{
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char c;
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/* wait until data is comming */
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do{
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asm volatile("nop");
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} while(*UART0_FR & 0x10);
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/* read it and return */
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c = (char)(*UART0_DR);
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/* convert carrige return to newline */
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if (c == '\r')
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c = '\n';
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return c;
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}
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/**
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* Send string to UART
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*/
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void uart_write(const char* buf, uint32_t sz) {
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uint32_t len = sz;
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while (len > 0 && *buf) {
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/* convert newline to carrige return + newline */
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if (*buf == '\n')
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uart_tx('\r');
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uart_tx(*buf++);
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len--;
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}
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}
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void uart_init()
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{
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register unsigned int c;
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/* initialize UART. turn off UART 0*/
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*UART0_CR = 0;
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/* set up clock for consistent divisor values */
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mbox[0] = 9 * 4;
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mbox[1] = MBOX_REQUEST;
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/* tag for setting clock rate */
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mbox[2] = MBOX_TAG_SETCLKRATE;
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mbox[3] = 12;
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mbox[4] = 8;
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/* specify UART clock channel */
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mbox[5] = 2;
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/* UART clock rate in hz(4Mhz)*/
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mbox[6] = 4000000;
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/* not use turbo */
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mbox[7] = 0;
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mbox[8] = MBOX_TAG_LAST;
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mailbox_write(MBOX_CH_PROP);
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mailbox_read(MBOX_CH_PROP);
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/* disable pull up/down for all GPIO pins */
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*GPPUD = 0;
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delay(150);
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/* Disable pull up/down for pin 14 and 15 */
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*GPPUDCLK0 = (1<<14)|(1<<15);
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delay(150);
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/* flush GPIO setting to make it take effect */
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*GPPUDCLK0 = 0;
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/* clear pending interrupts */
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*UART0_ICR = 0x7FF;
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/* select 115200 baud rate */
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/* divider = 4000000 / (16 * 115200) = 2.17 = ~2 */
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*UART0_IBRD = 2;
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/* Fractional part register = (.17013 * 64) + 0.5 = 11.38 = ~11 */
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*UART0_FBRD = 0xB;
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/* Enable fifo, 8bit data transmission ( 1stop bit, no parity) */
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*UART0_LCRH = (1 << 4) | (1 << 5) | (1 << 6);
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/* enable UART0 transfer & receive*/
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*UART0_CR = (1 << 0) | (1 << 8) | (1 << 9);
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}
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void* hal_get_primary_address(void)
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{
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@ -91,22 +277,88 @@ void qspi_init(uint32_t cpu_clock, uint32_t flash_freq)
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{
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}
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void zynq_init(uint32_t cpu_clock)
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{
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}
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#if defined(DISPLAY_CLOCKS)
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static uint32_t getclocks(uint8_t cid)
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{
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/* Retrive clock rate */
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/* length of the message */
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mbox[0] = 8 * 4;
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mbox[1] = MBOX_REQUEST;
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/* tag for get board version */
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mbox[2] = MBOX_TAG_GET_CLOCK_RATE;
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/* buffer size */
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mbox[3] = 8;
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mbox[4] = 8;
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/* clock id CORE*/
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mbox[5] = cid;
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/* clock frequency */
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mbox[6] = 0;
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mbox[7] = MBOX_TAG_LAST;
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mailbox_write(MBOX_CH_PROP);
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if (mailbox_read(MBOX_CH_PROP)) {
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return mbox[6];
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}
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else {
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return 0;
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}
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}
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#endif /* DISPLAY clocks */
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/* public HAL functions */
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void hal_init(void)
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{
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#if defined(TEST_ENCRYPT) && defined (EXT_ENCRYPTED)
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char enc_key[] = "0123456789abcdef0123456789abcdef"
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"0123456789abcdef";
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"0123456789abcdef";
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wolfBoot_set_encrypt_key((uint8_t *)enc_key,(uint8_t *)(enc_key + 32));
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#endif
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uart_init();
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/* length of the message */
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mbox[0] = 7 * 4;
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mbox[1] = MBOX_REQUEST;
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/* tag for get board version */
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mbox[2] = MBOX_TAG_GETBRDVERSION;
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/* buffer size */
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mbox[3] = 4;
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mbox[4] = 0;
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mbox[5] = 0;
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mbox[6] = MBOX_TAG_LAST;
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/* send the message to the GPU */
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mailbox_write(MBOX_CH_PROP);
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if (mailbox_read(MBOX_CH_PROP)) {
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wolfBoot_printf("My board version is: 0x%08x", mbox[5]);
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wolfBoot_printf("\n");
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} else {
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wolfBoot_printf("Unable to query board version!\n");
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}
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#if defined(DISPLAY_CLOCKS) && defined(PRINTF_ENABLED)
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/* Get clocks */
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wolfBoot_printf("\n EMMC clock : %d Hz", getclocks(1));
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wolfBoot_printf("\n UART clock : %d Hz", getclocks(2));
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wolfBoot_printf("\n ARM clock : %d Hz", getclocks(3));
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wolfBoot_printf("\n CORE clock : %d Hz", getclocks(4));
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wolfBoot_printf("\n V3D clock : %d Hz", getclocks(5));
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wolfBoot_printf("\n H264 clock : %d Hz", getclocks(6));
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wolfBoot_printf("\n ISP clock : %d Hz", getclocks(7));
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wolfBoot_printf("\n SDRAM clock : %d Hz", getclocks(8));
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wolfBoot_printf("\n PIXEL clock : %d Hz", getclocks(9));
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wolfBoot_printf("\n PWM clock : %d Hz", getclocks(10));
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wolfBoot_printf("\n HEVC clock : %d Hz", getclocks(11));
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wolfBoot_printf("\n EMMC2 clock : %d Hz", getclocks(12));
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wolfBoot_printf("\n M2MC clock : %d Hz", getclocks(13));
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wolfBoot_printf("\n PIXEL_BVB clock : %d Hz\n", getclocks(14));
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#endif
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}
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void hal_prepare_boot(void)
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@ -1,6 +1,6 @@
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MEMORY
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{
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DDR_MEM(rwx): ORIGIN = 0x00080000, LENGTH = 0x80000000
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DDR_MEM(rwx): ORIGIN = 0x00080000, LENGTH = 0x3c000000
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}
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ENTRY(_vector_table);
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@ -1,7 +1,40 @@
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diff --git a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
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index 261827cdb957..13613f965a10 100644
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--- a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
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+++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
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diff --git a/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
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index 55420ac94..77774868b 100644
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--- a/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
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+++ b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
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@@ -10,7 +10,7 @@
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model = "Raspberry Pi 3 Model B+";
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chosen {
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- bootargs = "coherent_pool=1M 8250.nr_uarts=1";
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+ bootargs = "coherent_pool=1M 8250.nr_uarts=1 console=ttyAMA0,115200 console=tty1 root=/dev/mmcblk0p7 rootfstype=ext4 elevator=deadline fsck.repair=yes rootwait splash plymouth.ignore-serial-consoles";
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};
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aliases {
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@@ -18,6 +18,10 @@
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serial1 = &uart0;
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mmc1 = &mmcnr;
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};
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+ memory@0 {
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+ reg = <0x00 0x3c000000>;
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+ device_type = "memory";
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+ };
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};
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|
||||
&gpio {
|
||||
diff --git a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
|
||||
index 261827cdb..15bbd93a6 100644
|
||||
--- a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
|
||||
+++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
|
||||
@@ -10,7 +10,7 @@
|
||||
model = "Raspberry Pi 3 Model B";
|
||||
|
||||
chosen {
|
||||
- bootargs = "coherent_pool=1M 8250.nr_uarts=1";
|
||||
+ bootargs = "coherent_pool=1M 8250.nr_uarts=1 earlyprintk loglevel=8 console=ttyAMA0,115200 console=tty1 root=/dev/mmcblk0p2 rw rootwait";
|
||||
};
|
||||
|
||||
aliases {
|
||||
@@ -18,6 +18,10 @@
|
||||
serial1 = &uart0;
|
||||
mmc1 = &mmcnr;
|
||||
|
|
|
|||
Loading…
Reference in New Issue