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wolfBoot
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TMS570LC43xx: flash updates and init stack pointer 

- cleanup warnings and rework exceptions to be more robust
 - CORTEX R5: Initialization of stack pointer
 - updates to F021 flash from testing
 - sync options for command line build with IDE
pull/151/head
Elms 2021-07-22 17:01:42 -07:00 committed by Daniele Lacamera
parent 8c813552d7
commit d302c633c2
14 changed files with 283 additions and 89 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
IDE/CCS/TMS570LC43xx/.cproject
View File

@ -161,7 +161,7 @@
<listOptionValue builtIn="false" value="WOLFBOOT_NO_MPU"/>
<listOptionValue builtIn="false" value="WOLFBOOT_HASH_SHA256"/>
</option>
<option id="com.ti.ccstudio.buildDefinitions.TMS470_20.2.compilerID.KEEP_ASM.1228243147" superClass="com.ti.ccstudio.buildDefinitions.TMS470_20.2.compilerID.KEEP_ASM" value="true" valueType="boolean"/>
<option id="com.ti.ccstudio.buildDefinitions.TMS470_20.2.compilerID.KEEP_ASM.1228243147" name="Keep the generated assembly language (.asm) file (--keep_asm, -k)" superClass="com.ti.ccstudio.buildDefinitions.TMS470_20.2.compilerID.KEEP_ASM" value="true" valueType="boolean"/>
<inputType id="com.ti.ccstudio.buildDefinitions.TMS470_20.2.compiler.inputType__C_SRCS.1906021728" name="C Sources" superClass="com.ti.ccstudio.buildDefinitions.TMS470_20.2.compiler.inputType__C_SRCS"/>
<inputType id="com.ti.ccstudio.buildDefinitions.TMS470_20.2.compiler.inputType__CPP_SRCS.2054729013" name="C++ Sources" superClass="com.ti.ccstudio.buildDefinitions.TMS470_20.2.compiler.inputType__CPP_SRCS"/>
<inputType id="com.ti.ccstudio.buildDefinitions.TMS470_20.2.compiler.inputType__ASM_SRCS.228683910" name="Assembly Sources" superClass="com.ti.ccstudio.buildDefinitions.TMS470_20.2.compiler.inputType__ASM_SRCS"/>

2
IDE/CCS/TMS570LC43xx/flashHercules.ccxml
View File

@ -6,7 +6,7 @@
<instance XML_version="1.2" href="drivers/tixds560icepick_c.xml" id="drivers" xml="tixds560icepick_c.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds560cs_dap.xml" id="drivers" xml="tixds560cs_dap.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds560cortexR.xml" id="drivers" xml="tixds560cortexR.xml" xmlpath="drivers"/>
<property Type="stringfield" Value="192.168.2.102" id="portAddr1"/>
<property Type="stringfield" Value="192.168.2.101" id="portAddr1"/>
<platform XML_version="1.2" id="platform_0">
<instance XML_version="1.2" desc="TMS570LC43xx_0" href="devices/tms570lc43xx.xml" id="TMS570LC43xx_0" xml="tms570lc43xx.xml" xmlpath="devices"/>
</platform>

18
IDE/CCS/TMS570LC43xx/target.h
View File

@ -27,16 +27,16 @@
#ifndef H_TARGETS_TARGET_
#define H_TARGETS_TARGET_
#define WOLFBOOT_SECTOR_SIZE 0x1000
#define WOLFBOOT_PARTITION_BOOT_ADDRESS 0x020000
#define WOLFBOOT_PARTITION_SIZE 0x0e0000
#define WOLFBOOT_PARTITION_UPDATE_ADDRESS 0x100000
#define WOLFBOOT_PARTITION_SWAP_ADDRESS 0x1e0000
#define WOLFBOOT_SECTOR_SIZE 0x040000
#define WOLFBOOT_PARTITION_BOOT_ADDRESS 0x040000
#define WOLFBOOT_PARTITION_SIZE 0x100000
#define WOLFBOOT_PARTITION_UPDATE_ADDRESS 0x200000
#define WOLFBOOT_PARTITION_SWAP_ADDRESS 0x3c0000
/* Load address in RAM for staged OS (update_ram only) */
#define WOLFBOOT_DTS_BOOT_ADDRESS
#define WOLFBOOT_DTS_UPDATE_ADDRESS
#define WOLFBOOT_LOAD_ADDRESS
#define WOLFBOOT_LOAD_DTS_ADDRESS
#define WOLFBOOT_DTS_BOOT_ADDRESS
#define WOLFBOOT_DTS_UPDATE_ADDRESS
#define WOLFBOOT_LOAD_ADDRESS
#define WOLFBOOT_LOAD_DTS_ADDRESS
#endif /* !H_TARGETS_TARGET_ */

3
IDE/CCS/TMS570LC43xx/target.ld
View File

@ -1,11 +1,10 @@
/* see SPNU118U - January 2018 section 8.5 for linker syntax */
--retain="*(.isr_vector)"
--entry_point=isr_reset
MEMORY
{
FLASH (RX) : ORIGIN = 0x00000000, LENGTH = 131072
FLASH (RX) : ORIGIN = 0x00000000, LENGTH = 262144
RAM (RWX) : ORIGIN = 0x08000000, LENGTH = 0x00080000
}

4
arch.mk
View File

@ -187,7 +187,7 @@ endif
ifeq ($(TARGET),ti_hercules)
# HALCoGen Source and Include?
CORTEX_R5=1
CFLAGS+=-D"CORTEX_R5" -D"BIG_ENDIAN_ORDER"
CFLAGS+=-D"CORTEX_R5" -D"BIG_ENDIAN_ORDER" -D"NVM_FLASH_WRITEONCE" -D"FLASHBUFFER_SIZE=32"
STACK_USAGE=0
USE_GCC=0
@ -207,7 +207,7 @@ ifeq ($(TARGET),ti_hercules)
ARCH_FLAGS=-mv7R5 --code_state=32 --float_support=VFPv3D16 --enum_type=packed --abi=eabi -I"$(CCS_ROOT)/include" -I"$(F021_DIR)/include"
CFLAGS+=$(ARCH_FLAGS)
LDFLAGS+=$(ARCH_FLAGS) -i"$(CCS_ROOT)/lib" -i"$(F021_DIR)" -z --be32 --map_file=wolfboot.map --reread_libs --diag_wrap=off --display_error_number --warn_sections -stack=0 -heap=0
LDFLAGS+=$(ARCH_FLAGS) -i"$(CCS_ROOT)/lib" -i"$(F021_DIR)" -z --be32 --map_file=wolfboot.map --reread_libs --diag_wrap=off --display_error_number --warn_sections --heap_size=0 --stack_size=0x800 --ram_model
LD_START_GROUP= #--start-group
LD_END_GROUP= -llibc.a -l"$(F021_DIR)\\F021_API_CortexR4_BE_L2FMC_V3D16.lib" $(LSCRIPT)

16
config/examples/ti-tms570lc435.config
View File

@ -18,10 +18,14 @@ RAM_CODE?=1
DUALBANK_SWAP?=0
IMAGE_HEADER_SIZE?=256
PKA?=0
# setting up to all fit in the first bank 128k sectors from 0x0-0x200000
WOLFBOOT_PARTITION_SIZE?=0x20000
WOLFBOOT_SECTOR_SIZE?=0x20000
WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x00020000
WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x00100000
WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x0001E0000
# sector size setup to match the largest sector size of heterogeneous F021 sectors
# wolfBoot 0x000000-0x040000
# Primary 0x040000-0x140000
# backup 0x200000-0x300000
# swap 0x3c0000-0x400000
WOLFBOOT_PARTITION_SIZE?=0x100000
WOLFBOOT_SECTOR_SIZE?=0x040000
WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x040000
WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x200000
WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x3c0000
OPTIMIZATION_LEVEL?=2

145
hal/ti_hercules.c
View File

@ -77,57 +77,92 @@ void hal_prepare_boot(void)
{
}
static inline Fapi_FlashBankType f021_lookup_bank(uint32_t address) {
Fapi_FlashBankType bank = Fapi_FlashBank0;
int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
{
int st = Fapi_issueProgrammingCommand((void*)address,
data,
len,
NULL,
0,
Fapi_AutoEccGeneration);
if (st != 0) {
wolfBoot_printf("Failed Fapi_issueProgrammingCommand() => (%d)\n", st);
return -1;
if (address >= 0x200000) {
bank = Fapi_FlashBank1;
}
return 0;
return bank;
}
void RAMFUNCTION hal_flash_unlock(void)
{
/* enable all sectors in flash bank 0*/
Fapi_FlashBankType bank = Fapi_FlashBank0;
static inline int RAMFUNCTION hal_flash_unlock_helper(uint32_t address) {
uint16_t en = 0xffff;
Fapi_FlashBankType bank = f021_lookup_bank(address);
while(FAPI_CHECK_FSM_READY_BUSY != Fapi_Status_FsmReady)
;
int st = Fapi_setActiveFlashBank(bank);
if (st != 0) {
wolfBoot_printf("Failed Fapi_setActiveFlashBank(%d) => (%d)\n", bank, st);
return;
return -1;
}
st = Fapi_enableMainBankSectors(en);
if (st != 0) {
wolfBoot_printf("Failed Fapi_enableMainBankSectors() => (%d)\n", st);
return;
return -1;
}
while(FAPI_CHECK_FSM_READY_BUSY != Fapi_Status_FsmReady)
;
return 0;
}
#define WRITE_BLOCK_SIZE 32
int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
{
int st = 0;
uint8_t temp[WRITE_BLOCK_SIZE];
hal_flash_unlock_helper(address);
while(FAPI_CHECK_FSM_READY_BUSY != Fapi_Status_FsmReady)
;
if(len < WRITE_BLOCK_SIZE) {
memcpy(temp, (void*)(address - (address%WRITE_BLOCK_SIZE)), WRITE_BLOCK_SIZE);
memcpy(temp + (address%WRITE_BLOCK_SIZE), data, len);
st = Fapi_issueProgrammingCommand((void*)(address - (address%WRITE_BLOCK_SIZE)),
(uint8_t*)temp,
WRITE_BLOCK_SIZE,
NULL,
0,
Fapi_AutoEccGeneration);
} else {
st = Fapi_issueProgrammingCommand((void*)address,
(uint8_t*)data,
len,
NULL,
0,
Fapi_AutoEccGeneration);
}
if (st != 0) {
wolfBoot_printf("Failed Fapi_issueProgrammingCommand() => (%d)\n", st);
return -1;
}
while(FAPI_CHECK_FSM_READY_BUSY != Fapi_Status_FsmReady)
;
return 0;
}
void RAMFUNCTION hal_flash_unlock(void)
{
hal_flash_unlock_helper(0);
}
void RAMFUNCTION hal_flash_lock(void)
{
Fapi_FlashBankType bank = Fapi_FlashBank0;
int st = Fapi_setActiveFlashBank(bank);
if (st != 0) {
wolfBoot_printf("Failed Fapi_setActiveFlashBank(%d) => (%d)\n", bank, st);
return;
}
/* disable all sectors */
st = Fapi_enableMainBankSectors(0);
int st = Fapi_enableMainBankSectors(0);
if (st != 0) {
wolfBoot_printf("Failed Fapi_enableMainBankSectors() => (%d)\n", st);
return;
@ -137,9 +172,9 @@ void RAMFUNCTION hal_flash_lock(void)
;
}
static inline int RAMFUNCTION f021_flash_erase(uint32_t address) {
hal_flash_unlock_helper(address);
int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
{
int st = Fapi_issueAsyncCommandWithAddress(Fapi_EraseSector, (void*)address);
if (st != 0) {
wolfBoot_printf("Failed Fapi_issueAsyncCommandWithAddress(Fapi_EraseSector, 0x%08x) => (%d)\n",
@ -147,7 +182,6 @@ int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
return -1;
}
while(FAPI_CHECK_FSM_READY_BUSY == Fapi_Status_FsmBusy)
;
@ -158,3 +192,56 @@ int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
return 0;
}
int RAMFUNCTION hal_flash_erase(uint32_t address, int len)
{
int ret = 0;
int found_start = 0;
int i;
Fapi_FlashBankType bank = f021_lookup_bank(address);
Fapi_FlashBankSectorsType bank_sectors;
uint32_t cur = 0;
uint32_t end = address + len;
Fapi_StatusType st = Fapi_getBankSectors(bank, &bank_sectors);
if (st != Fapi_Status_Success) {
return -1;
}
cur = bank_sectors.u32BankStartAddress;
hal_flash_unlock_helper(address);
for(i=0; i < bank_sectors.u32NumberOfSectors; i++) {
/* perfectly done */
if (end == cur) {
ret = 0;
break;
}
/* would erase past end */
else if (end < cur + bank_sectors.au16SectorSizes[i] * 1024) {
ret = -2;
break;
}
else if (address <= cur) {
if (address == cur) {
found_start = 1;
}
/* start address doesn't align with start of real sector */
if (!found_start && address < cur) {
ret = -3;
break;
}
ret = f021_flash_erase(cur);
if (ret != 0) {
break;
}
}
else {
/* intentionally fall through as loop hasn't found the start */
}
cur += bank_sectors.au16SectorSizes[i] * 1024;
}
return ret;
}

1
hal/ti_hercules.ld
View File

@ -1,7 +1,6 @@
/* see SPNU118U - January 2018 section 8.5 for linker syntax */
--retain="*(.isr_vector)"
--entry_point=isr_reset
MEMORY
{

2
include/target.h.in
View File

@ -29,7 +29,7 @@
#define WOLFBOOT_SECTOR_SIZE ##WOLFBOOT_SECTOR_SIZE##
#define WOLFBOOT_PARTITION_BOOT_ADDRESS ##WOLFBOOT_PARTITION_BOOT_ADDRESS##
#define WOLFBOOT_PARTITION_SIZE ##WOLFBOOT_PARTITION_SIZE##
#define WOLFBOOT_PARTITION_SIZE ##WOLFBOOT_PARTITION_SIZE##
#define WOLFBOOT_PARTITION_UPDATE_ADDRESS ##WOLFBOOT_PARTITION_UPDATE_ADDRESS##
#define WOLFBOOT_PARTITION_SWAP_ADDRESS ##WOLFBOOT_PARTITION_SWAP_ADDRESS##

10
include/wolfboot/wolfboot.h
View File

@ -35,10 +35,12 @@
#endif
#define IMAGE_HEADER_OFFSET (2 * sizeof(uint32_t))
#ifdef NVM_FLASH_WRITEONCE
# define FLASHBUFFER_SIZE WOLFBOOT_SECTOR_SIZE
#else
# define FLASHBUFFER_SIZE IMAGE_HEADER_SIZE
#ifndef FLASHBUFFER_SIZE
# ifdef NVM_FLASH_WRITEONCE
# define FLASHBUFFER_SIZE WOLFBOOT_SECTOR_SIZE
# else
# define FLASHBUFFER_SIZE IMAGE_HEADER_SIZE
# endif
#endif
#ifdef BIG_ENDIAN_ORDER

102
src/boot_arm.c
View File

@ -170,6 +170,22 @@ static void mpu_off(void)
#endif /* !WOLFBOOT_NO_MPU */
#ifdef CORTEX_R5
#define MINITGCR ((volatile uint32_t *)0xFFFFFF5C)
#define MSINENA ((volatile uint32_t *)0xFFFFFF60)
#define MSTCGSTAT ((volatile uint32_t *)0xFFFFFF68)
#define MINIDONE_FLAG 0x0100
asm(
" .global __STACK_END\n"
"_c_int00:\n"
" movw sp, __STACK_END\n"
" movt sp, __STACK_END\n"
" b isr_reset\n"
);
#endif
void isr_reset(void) {
register unsigned int *src, *dst;
#if defined(PLATFORM_kinetis)
@ -180,6 +196,32 @@ void isr_reset(void) {
/* disable watchdog via STCTRLH register */
*((volatile unsigned short *)0x40052000) = 0x01D2u;
#endif
/* init stack pointers and SRAM */
#ifdef CORTEX_R5
/* 2.2.4.2 Auto-Initialization of On-Chip SRAM Modules */
/* 1. Set memory self-init */
*MINITGCR = 0xA;
*MSTCGSTAT = 0;
/* 2. enable self-init for L2 SRAM (see Table 2-7 of TRM) */
*MSINENA = 0x1;
/* 3-5. wait to complete */
while ( (*MSTCGSTAT & MINIDONE_FLAG) != MINIDONE_FLAG)
;
/* set opposite bit pattern to maximize not setting incorrectly (2.5.1.21 note) */
*MINITGCR = 0x5;
/* Clear global stat */
*MSTCGSTAT = 0;
/* init stack pointers */
asm(
" cps #0x1f\n"
" movw sp, __STACK_END\n"
" movt sp, __STACK_END\n"
);
#endif
/* Copy the .data section from flash to RAM. */
src = (unsigned int *) &_stored_data;
dst = (unsigned int *) &_start_data;
@ -207,18 +249,50 @@ void isr_reset(void) {
/* forward to app handler */
/* jump to address in only parameter */
asm volatile ("isr_jump:\n"
" bx a1\n");
__attribute__ ((section(".text")))
const void* isr_table2[] = {
(void*)(WOLFBOOT_PARTITION_BOOT_ADDRESS + IMAGE_HEADER_SIZE + 0x08),
(void*)(WOLFBOOT_PARTITION_BOOT_ADDRESS + IMAGE_HEADER_SIZE + 0x08),
(void*)(WOLFBOOT_PARTITION_BOOT_ADDRESS + IMAGE_HEADER_SIZE + 0x08),
(void*)(WOLFBOOT_PARTITION_BOOT_ADDRESS + IMAGE_HEADER_SIZE + 0x08),
};
void isr_swi(void);
void isr_abort_prefetch(void);
void isr_abort_data(void);
void isr_reserved(void);
asm(
"isr_table:\n"
" .word isr_table2"
);
asm(
"isr_swi:"
" mov r1, #0x00\n"
" ldr r0, isr_table\n"
" ldr r0, [r0, r1]\n"
" bx r0\n");
asm(
"isr_abort_prefetch:"
" mov r1, #0x04\n"
" ldr r0, isr_table\n"
" ldr r0, [r0, r1]\n"
" bx r0\n");
asm(
"isr_abort_data:"
" mov r1, #0x08\n"
" ldr r0, isr_table\n"
" ldr r0, [r0, r1]\n"
" bx r0\n");
asm(
"isr_reserved:"
" mov r1, #0x0c\n"
" ldr r0, isr_table\n"
" ldr r0, [r0, r1]\n"
" bx r0\n");
#define ISR_FORWARDER(name, offset) \
void name(void) { isr_jump(offset + WOLFBOOT_PARTITION_BOOT_ADDRESS + IMAGE_HEADER_SIZE); }
ISR_FORWARDER(isr_swi, 0x08)
ISR_FORWARDER(isr_abort_prefetch, 0x0c)
ISR_FORWARDER(isr_abort_data, 0x10)
ISR_FORWARDER(isr_reserved, 0x14)
ISR_FORWARDER(isr_irq, 0x18)
ISR_FORWARDER(isr_fiq, 0x1c)
#endif /* CORTEX_R5 */
@ -263,6 +337,8 @@ static uint32_t app_end_stack;
void RAMFUNCTION do_boot(const uint32_t *app_offset)
{
#if defined(CORTEX_R5)
(void)app_entry;
(void)app_end_stack;
/* limitations with TI arm compiler requires assembly */
asm volatile("do_boot_r5:\n"
" mov pc, r0\n");
@ -323,14 +399,14 @@ typedef void(*NMIHANDLER)(void);
asm volatile (
" .sect \".isr_vector\"\n"
"resetEntry:\n"
" b isr_reset\n" // Reset
" b _c_int00\n" // Reset
" b isr_fault\n" // Undefined
" b isr_swi \n" // Software interrupt
" b isr_abort_prefetch\n" // Abort (Prefetch)
" b isr_abort_data\n" // Abort (Data)
" b isr_reserved\n" // Reserved
" b isr_irq\n" // IRQ
" b isr_fiq\n" // FIQ
" ldr pc,[pc,#-0x1b0]\n" // IRQ |
" ldr pc,[pc,#-0x1b0]\n" // FIQ
);
#else

41
src/libwolfboot.c
View File

@ -433,6 +433,27 @@ static uint8_t hdr_cpy[IMAGE_HEADER_SIZE];
static uint32_t hdr_cpy_done = 0;
#endif
static inline uint32_t im2n(uint32_t val)
{
#ifdef BIG_ENDIAN_ORDER
val = (((val & 0x000000FF) << 24) |
((val & 0x0000FF00) << 8) |
((val & 0x00FF0000) >> 8) |
((val & 0xFF000000) >> 24));
#endif
return val;
}
static inline uint16_t im2ns(uint16_t val)
{
#ifdef BIG_ENDIAN_ORDER
val = (((val & 0x000000FF) << 8) |
((val & 0x0000FF00) >> 8));
#endif
return val;
}
uint32_t wolfBoot_get_blob_version(uint8_t *blob)
{
uint32_t *version_field = NULL;
@ -443,7 +464,7 @@ uint32_t wolfBoot_get_blob_version(uint8_t *blob)
if (wolfBoot_find_header(blob + IMAGE_HEADER_OFFSET, HDR_VERSION, (void *)&version_field) == 0)
return 0;
if (version_field)
return *version_field;
return im2n(*version_field);
return 0;
}
@ -546,13 +567,17 @@ uint16_t wolfBoot_get_image_type(uint8_t part)
image = (uint8_t *)WOLFBOOT_PARTITION_BOOT_ADDRESS;
}
}
magic = (uint32_t *)image;
if (*magic != WOLFBOOT_MAGIC)
return 0;
if (wolfBoot_find_header(image + IMAGE_HEADER_OFFSET, HDR_IMG_TYPE, (void *)&type_field) == 0)
return 0;
if (type_field)
return *type_field;
if (image) {
magic = (uint32_t *)image;
if (*magic != WOLFBOOT_MAGIC)
return 0;
if (wolfBoot_find_header(image + IMAGE_HEADER_OFFSET, HDR_IMG_TYPE, (void *)&type_field) == 0)
return 0;
if (type_field)
return im2ns(*type_field);
}
return 0;
}

2
src/string.c
View File

@ -244,4 +244,4 @@ void *memmove(void *dst, const void *src, size_t n)
return memcpy(dst, src, n);
}
}
#endif
#endif

24
src/update_flash.c
View File

@ -35,9 +35,11 @@
extern unsigned int _start_text;
static volatile const uint32_t __attribute__((used)) wolfboot_version = WOLFBOOT_VERSION;
#ifndef BUFFER_DECLARED
#define BUFFER_DECLARED
#ifdef EXT_FLASH
# ifndef BUFFER_DECLARED
# define BUFFER_DECLARED
static uint8_t buffer[FLASHBUFFER_SIZE];
# endif
#endif
static void RAMFUNCTION wolfBoot_erase_bootloader(void)
@ -77,8 +79,9 @@ static void RAMFUNCTION wolfBoot_self_update(struct wolfBoot_image *src)
}
pos += FLASHBUFFER_SIZE;
}
#ifdef EXT_FLASH
lock_and_reset:
#endif
hal_flash_lock();
arch_reboot();
}
@ -87,8 +90,6 @@ void wolfBoot_check_self_update(void)
{
uint8_t st;
struct wolfBoot_image update;
uint8_t *update_type;
uint32_t update_version;
/* Check for self update in the UPDATE partition */
if ((wolfBoot_get_partition_state(PART_UPDATE, &st) == 0) && (st == IMG_STATE_UPDATING) &&
@ -110,7 +111,7 @@ void wolfBoot_check_self_update(void)
}
#endif /* RAM_CODE for self_update */
static int wolfBoot_copy_sector(struct wolfBoot_image *src, struct wolfBoot_image *dst, uint32_t sector)
static int RAMFUNCTION wolfBoot_copy_sector(struct wolfBoot_image *src, struct wolfBoot_image *dst, uint32_t sector)
{
uint32_t pos = 0;
uint32_t src_sector_offset = (sector * WOLFBOOT_SECTOR_SIZE);
@ -267,7 +268,7 @@ out:
#endif
static int wolfBoot_update(int fallback_allowed)
static int RAMFUNCTION wolfBoot_update(int fallback_allowed)
{
uint32_t total_size = 0;
const uint32_t sector_size = WOLFBOOT_SECTOR_SIZE;
@ -410,7 +411,7 @@ static int wolfBoot_update(int fallback_allowed)
void RAMFUNCTION wolfBoot_start(void)
{
uint8_t st;
struct wolfBoot_image boot, update;
struct wolfBoot_image boot;
#ifdef RAM_CODE
wolfBoot_check_self_update();
@ -426,9 +427,10 @@ void RAMFUNCTION wolfBoot_start(void)
/* Check for new updates in the UPDATE partition */
wolfBoot_update(0);
}
if ((wolfBoot_open_image(&boot, PART_BOOT) < 0) ||
(wolfBoot_verify_integrity(&boot) < 0) ||
(wolfBoot_verify_authenticity(&boot) < 0)) {
if ((wolfBoot_open_image(&boot, PART_BOOT) < 0)
|| (wolfBoot_verify_integrity(&boot) < 0)
|| (wolfBoot_verify_authenticity(&boot) < 0)
) {
if (wolfBoot_update(1) < 0) {
/* panic: no boot option available. */
while(1)