diff --git a/arch.mk b/arch.mk index b949112f..a3dbd857 100644 --- a/arch.mk +++ b/arch.mk @@ -586,6 +586,7 @@ ifeq ($(ARCH),RISCV64) endif ifneq ($(NO_ASM),1) + CFLAGS+=-DWOLFSSL_RISCV_ASM MATH_OBJS+=$(WOLFBOOT_LIB_WOLFSSL)/wolfcrypt/src/port/riscv/riscv-64-sha256.o \ $(WOLFBOOT_LIB_WOLFSSL)/wolfcrypt/src/port/riscv/riscv-64-sha512.o \ $(WOLFBOOT_LIB_WOLFSSL)/wolfcrypt/src/port/riscv/riscv-64-sha3.o \ diff --git a/config/examples/polarfire_mpfs250.config b/config/examples/polarfire_mpfs250.config index 2b05d8e2..6d44badf 100644 --- a/config/examples/polarfire_mpfs250.config +++ b/config/examples/polarfire_mpfs250.config @@ -46,6 +46,8 @@ WOLFBOOT_LOAD_ADDRESS?=0x8E000000 WOLFBOOT_NO_PARTITIONS=1 CFLAGS_EXTRA+=-DBOOT_PART_A=1 CFLAGS_EXTRA+=-DBOOT_PART_B=2 +# Speed up disk partition read (1MB chunks) +CFLAGS_EXTRA+=-DDISK_BLOCK_SIZE=0x100000 # DTS (Device Tree) WOLFBOOT_LOAD_DTS_ADDRESS?=0x8A000000 diff --git a/docs/Targets.md b/docs/Targets.md index 13d80ce9..d2801834 100644 --- a/docs/Targets.md +++ b/docs/Targets.md @@ -936,7 +936,10 @@ See: Building mchp-base-image Yocto Linux: ```sh -cd yocto-dev-polarfire/ +mkdir ../yocto-dev-polarfire +cd ../yocto-dev-polarfire +repo init -u https://github.com/linux4microchip/meta-mchp-manifest.git -b refs/tags/linux4microchip+fpga-2025.10 -m polarfire-soc/default.xml +repo sync export TEMPLATECONF=${TEMPLATECONF:-../meta-mchp/meta-mchp-polarfire-soc/meta-mchp-polarfire-soc-bsp/conf/templates/default} source openembedded-core/oe-init-build-env # A Microchip base image with standard Linux utilities, as well as some Microchip apps and examples @@ -1077,7 +1080,7 @@ Booting at 80200000 ### PolarFire TODO * Add eMMC/SD features: - - Multi-block read (CMD18 support) + - Improve mmc_delay and timeout handling - DMA read support - Write support - eMMC support (not just SD) diff --git a/hal/mpfs250.c b/hal/mpfs250.c index f0865f3d..aef12dd8 100644 --- a/hal/mpfs250.c +++ b/hal/mpfs250.c @@ -456,7 +456,8 @@ int mmc_read(uint32_t cmd_index, uint32_t block_addr, uint32_t* dst, uint32_t sz) { int status; - uint32_t reg; + uint32_t block_count; + uint32_t reg, cmd_reg; /* wait for idle */ status = mmc_wait_busy(0); @@ -468,46 +469,66 @@ int mmc_read(uint32_t cmd_index, uint32_t block_addr, uint32_t* dst, /* wait for command and data line busy to clear */ while ((EMMC_SD_SRS09 & (EMMC_SD_SRS09_CICMD | EMMC_SD_SRS09_CIDAT)) != 0); + /* get block count (round up) */ + block_count = (sz + (EMMC_SD_BLOCK_SIZE - 1)) / EMMC_SD_BLOCK_SIZE; /* set transfer block count */ - EMMC_SD_SRS01 = (1 << EMMC_SD_SRS01_BCCT_SHIFT) | sz; + EMMC_SD_SRS01 = (block_count << EMMC_SD_SRS01_BCCT_SHIFT) | sz; + + cmd_reg = ((cmd_index << EMMC_SD_SRS03_CIDX_SHIFT) | + EMMC_SD_SRS03_DPS | EMMC_SD_SRS03_DTDS | + EMMC_SD_SRS03_BCE | EMMC_SD_SRS03_RECE | EMMC_SD_SRS03_RID | + EMMC_SD_SRS03_RESP_48 | EMMC_SD_SRS03_CRCCE | EMMC_SD_SRS03_CICE); if (cmd_index == SD_ACMD51_SEND_SCR) { - status = mmc_send_cmd(SD_CMD_16, sz, EMMC_SD_RESP_R1); + status = mmc_send_cmd(SD_CMD16, sz, EMMC_SD_RESP_R1); if (status == 0) { status = mmc_send_cmd(SD_CMD55_APP_CMD, (g_rca << SD_RCA_SHIFT), EMMC_SD_RESP_R1); } status = 0; /* ignore error */ } + else if (cmd_index == MMC_CMD18_READ_MULTIPLE) { + cmd_reg |= EMMC_SD_SRS03_MSBS; /* enable multi-block select */ + EMMC_SD_SRS01 = (block_count << EMMC_SD_SRS01_BCCT_SHIFT) | + EMMC_SD_BLOCK_SIZE; + } #ifdef DEBUG_MMC - wolfBoot_printf("mmc_read: cmd_index: %d, block_addr: %08X, dst %p, sz: %d\n", - cmd_index, block_addr, dst, sz); + wolfBoot_printf("mmc_read: cmd_index: %d, block_addr: %08X, dst %p, sz: %d (%d blocks)\n", + cmd_index, block_addr, dst, sz, block_count); #endif EMMC_SD_SRS02 = block_addr; /* cmd argument */ - /* execute command */ - EMMC_SD_SRS03 = ((cmd_index << EMMC_SD_SRS03_CIDX_SHIFT) | - EMMC_SD_SRS03_DPS | EMMC_SD_SRS03_DTDS | - EMMC_SD_SRS03_BCE | EMMC_SD_SRS03_RECE | EMMC_SD_SRS03_RID | - EMMC_SD_SRS03_RESP_48 | EMMC_SD_SRS03_CRCCE | EMMC_SD_SRS03_CICE); + EMMC_SD_SRS03 = cmd_reg; /* execute command */ + while (sz > 0) { + /* wait for buffer read ready */ + while (((reg = EMMC_SD_SRS12) & + (EMMC_SD_SRS12_BRR | EMMC_SD_SRS12_EINT)) == 0); - /* wait for buffer read ready */ - while (((reg = EMMC_SD_SRS12) & (EMMC_SD_SRS12_BRR | EMMC_SD_SRS12_EINT)) == 0); - - /* read in buffer - read 4 bytes at a time */ - if (reg & EMMC_SD_SRS12_BRR) { - uint32_t i; - for (i=0; i EMMC_SD_BLOCK_SIZE) { + read_sz = EMMC_SD_BLOCK_SIZE; + } + for (i=0; i 1 ? + MMC_CMD18_READ_MULTIPLE : + MMC_CMD17_READ_SINGLE, + block_addr, (uint32_t*)buf, read_sz); } if (status != 0) { break; diff --git a/hal/mpfs250.h b/hal/mpfs250.h index 0066e24f..af48aab2 100644 --- a/hal/mpfs250.h +++ b/hal/mpfs250.h @@ -837,8 +837,8 @@ #define MMC_CMD1_SEND_OP_COND 1 /* MMC: Send operating conditions */ #define MMC_CMD2_ALL_SEND_CID 2 /* Get card identification */ #define MMC_CMD3_SET_REL_ADDR 3 /* Set relative address */ -#define MMC_CMD_4_SET_DSR 4 -#define SD_CMD_6_SWITCH_FUNC 6 /* SD: Switch function */ +#define MMC_CMD4_SET_DSR 4 +#define SD_CMD6_SWITCH_FUNC 6 /* SD: Switch function */ #define MMC_CMD7_SELECT_CARD 7 /* Select/deselect card */ #define MMC_CMD8_SEND_EXT_CSD 8 /* MMC: Get EXT_CSD */ #define SD_CMD8_SEND_IF_COND 8 /* SD: Send interface condition */ @@ -846,8 +846,8 @@ #define SD_CMD11_VOLAGE_SWITCH 11 /* R1 Rsp */ #define MMC_CMD12_STOP_TRANS 12 /* Stop transmission */ #define MMC_CMD13_SEND_STATUS 13 /* Get card status */ -#define MMC_CMD_15_GOTO_INACT_ST 15 -#define SD_CMD_16 16 /* R1 Rsp */ +#define MMC_CMD15_GOTO_INACT_ST 15 +#define SD_CMD16 16 /* R1 Rsp */ #define MMC_CMD17_READ_SINGLE 17 /* Read single block */ #define MMC_CMD18_READ_MULTIPLE 18 /* Read multiple blocks */ #define MMC_CMD24_WRITE_SINGLE 24 /* Write single block */