mirror of https://github.com/wolfSSL/wolfBoot.git
STM32 test application: enable update-over-USART
Daniele Lacamera
parent
2193dcf5b1
commit
d46e8fdbc6
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@ -5,8 +5,8 @@ OBJS:=startup.o main.o timer.o led.o system.o ../src/libwolfboot.o ../hal/$(TARG
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TARGET?=none
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LSCRIPT:=app.ld
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OBJCOPY:=$(CROSS_COMPILE)objcopy
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CFLAGS:=-mcpu=cortex-m3 -mthumb -g -ggdb -Wall -Wno-main -Wstack-usage=200 -ffreestanding -Wno-unused -nostdlib -DPLATFORM_$(TARGET) -I../include
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LDFLAGS:=-T $(LSCRIPT) -Wl,-gc-sections -Wl,-Map=image.map -nostdlib
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CFLAGS:=-mcpu=cortex-m3 -mthumb -g -ggdb -Wall -Wno-main -Wstack-usage=200 -ffreestanding -Wno-unused -DPLATFORM_$(TARGET) -I../include -nostartfiles
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LDFLAGS:=$(CFLAGS) -T $(LSCRIPT) -Wl,-gc-sections -Wl,-Map=image.map
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ifeq ($(EXT_FLASH),1)
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CFLAGS+=-DEXT_FLASH=1 -DPART_UPDATE_EXT=1
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@ -1,41 +1,43 @@
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x00020100, LENGTH = 0x001FF00
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RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000
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}
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SECTIONS
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{
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.text :
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{
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_start_text = .;
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KEEP(*(.isr_vector))
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*(.text*)
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*(.rodata*)
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. = ALIGN(4);
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_end_text = .;
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} > FLASH
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_stored_data = .;
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.data : AT (_stored_data)
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{
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_start_data = .;
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KEEP(*(.data*))
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. = ALIGN(4);
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_end_data = .;
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} > RAM
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.bss :
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{
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_start_bss = .;
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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_end_bss = .;
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_end = .;
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} > RAM
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}
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PROVIDE(_start_heap = _end);
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PROVIDE(_end_stack = ORIGIN(RAM) + LENGTH(RAM));
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x00020100, LENGTH = 0x001FF00
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RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000
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}
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SECTIONS
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{
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.text :
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{
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_start_text = .;
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KEEP(*(.isr_vector))
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*(.init)
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*(.fini)
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*(.text*)
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*(.rodata*)
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. = ALIGN(4);
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_end_text = .;
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} > FLASH
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_stored_data = .;
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.data : AT (_stored_data)
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{
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_start_data = .;
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KEEP(*(.data*))
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. = ALIGN(4);
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_end_data = .;
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} > RAM
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.bss :
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{
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_start_bss = .;
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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_end_bss = .;
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_end = .;
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} > RAM
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}
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PROVIDE(_start_heap = _end);
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PROVIDE(_end_stack = ORIGIN(RAM) + LENGTH(RAM));
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@ -22,6 +22,7 @@
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*/
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#include <stdint.h>
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#include "wolfboot/wolfboot.h"
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#define AHB1_CLOCK_ER (*(volatile uint32_t *)(0x40023830))
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#define GPIOD_AHB1_CLOCK_ER (1 << 3)
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@ -59,11 +60,12 @@ void led_pwm_setup(void)
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void boot_led_on(void)
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{
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uint32_t reg;
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uint32_t pin = LED_BOOT_PIN - 2 * (wolfBoot_current_firmware_version() & 0x01);
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AHB1_CLOCK_ER |= GPIOD_AHB1_CLOCK_ER;
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reg = GPIOD_MODE & ~(0x03 << (LED_BOOT_PIN * 2));
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GPIOD_MODE = reg | (1 << (LED_BOOT_PIN * 2));
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reg = GPIOD_PUPD & ~(0x03 << (LED_BOOT_PIN * 2));
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GPIOD_PUPD = reg | (1 << (LED_BOOT_PIN * 2));
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GPIOD_BSRR |= (1 << LED_BOOT_PIN);
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reg = GPIOD_MODE & ~(0x03 << (pin * 2));
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GPIOD_MODE = reg | (1 << (pin * 2));
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reg = GPIOD_PUPD & ~(0x03 << (pin * 2));
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GPIOD_PUPD = reg | (1 << (pin * 2));
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GPIOD_BSRR |= (1 << pin);
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}
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247
test-app/main.c
247
test-app/main.c
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@ -23,21 +23,182 @@
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#include <stdlib.h>
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#include <stdint.h>
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#include <string.h>
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#include "system.h"
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#include "timer.h"
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#include "led.h"
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#include "hal.h"
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#include "wolfboot/wolfboot.h"
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#ifdef PLATFORM_stm32f4
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extern int update_started;
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#define UART3 (0x40004800)
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#define UART3_SR (*(volatile uint32_t *)(UART3))
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#define UART3_DR (*(volatile uint32_t *)(UART3 + 0x04))
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#define UART3_BRR (*(volatile uint32_t *)(UART3 + 0x08))
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#define UART3_CR1 (*(volatile uint32_t *)(UART3 + 0x0c))
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#define UART3_CR2 (*(volatile uint32_t *)(UART3 + 0x10))
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#define UART_CR1_UART_ENABLE (1 << 13)
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#define UART_CR1_SYMBOL_LEN (1 << 12)
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#define UART_CR1_PARITY_ENABLED (1 << 10)
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#define UART_CR1_PARITY_ODD (1 << 9)
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#define UART_CR1_TX_ENABLE (1 << 3)
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#define UART_CR1_RX_ENABLE (1 << 2)
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#define UART_CR2_STOPBITS (3 << 12)
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#define UART_SR_TX_EMPTY (1 << 7)
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#define UART_SR_RX_NOTEMPTY (1 << 5)
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#define CLOCK_SPEED (168000000)
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#define APB1_CLOCK_ER (*(volatile uint32_t *)(0x40023840))
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#define UART3_APB1_CLOCK_ER_VAL (1 << 18)
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#define AHB1_CLOCK_ER (*(volatile uint32_t *)(0x40023830))
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#define GPIOD_AHB1_CLOCK_ER (1 << 3)
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#define GPIOD_BASE 0x40020c00
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#define GPIOD_MODE (*(volatile uint32_t *)(GPIOD_BASE + 0x00))
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#define GPIOD_AFL (*(volatile uint32_t *)(GPIOD_BASE + 0x20))
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#define GPIOD_AFH (*(volatile uint32_t *)(GPIOD_BASE + 0x24))
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#define GPIO_MODE_AF (2)
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#define UART3_PIN_AF 7
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#define UART3_RX_PIN 9
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#define UART3_TX_PIN 8
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#define MSGSIZE 16
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#define PAGESIZE (256)
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static uint8_t page[PAGESIZE];
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static const char ERR='!';
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static const char START='*';
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static const char UPDATE='U';
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static const char ACK='#';
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static uint8_t msg[MSGSIZE];
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void uart_write(const char c)
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{
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uint32_t reg;
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do {
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reg = UART3_SR;
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} while ((reg & UART_SR_TX_EMPTY) == 0);
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UART3_DR = c;
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}
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static void uart_pins_setup(void)
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{
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uint32_t reg;
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AHB1_CLOCK_ER |= GPIOD_AHB1_CLOCK_ER;
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/* Set mode = AF */
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reg = GPIOD_MODE & ~ (0x03 << (UART3_RX_PIN * 2));
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GPIOD_MODE = reg | (2 << (UART3_RX_PIN * 2));
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reg = GPIOD_MODE & ~ (0x03 << (UART3_TX_PIN * 2));
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GPIOD_MODE = reg | (2 << (UART3_TX_PIN * 2));
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/* Alternate function: use high pins (8 and 9) */
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reg = GPIOD_AFH & ~(0xf << ((UART3_TX_PIN - 8) * 4));
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GPIOD_AFH = reg | (UART3_PIN_AF << ((UART3_TX_PIN - 8) * 4));
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reg = GPIOD_AFH & ~(0xf << ((UART3_RX_PIN - 8) * 4));
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GPIOD_AFH = reg | (UART3_PIN_AF << ((UART3_RX_PIN - 8) * 4));
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}
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int uart_setup(uint32_t bitrate, uint8_t data, char parity, uint8_t stop)
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{
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uint32_t reg;
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/* Enable pins and configure for AF7 */
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uart_pins_setup();
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/* Turn on the device */
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APB1_CLOCK_ER |= UART3_APB1_CLOCK_ER_VAL;
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/* Configure for TX + RX */
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UART3_CR1 |= (UART_CR1_TX_ENABLE | UART_CR1_RX_ENABLE);
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/* Configure clock */
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UART3_BRR = CLOCK_SPEED / bitrate;
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/* Configure data bits */
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if (data == 8)
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UART3_CR1 &= ~UART_CR1_SYMBOL_LEN;
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else
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UART3_CR1 |= UART_CR1_SYMBOL_LEN;
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/* Configure parity */
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switch (parity) {
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case 'O':
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UART3_CR1 |= UART_CR1_PARITY_ODD;
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/* fall through to enable parity */
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case 'E':
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UART3_CR1 |= UART_CR1_PARITY_ENABLED;
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break;
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default:
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UART3_CR1 &= ~(UART_CR1_PARITY_ENABLED | UART_CR1_PARITY_ODD);
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}
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/* Set stop bits */
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reg = UART3_CR2 & ~UART_CR2_STOPBITS;
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if (stop > 1)
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UART3_CR2 = reg & (2 << 12);
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else
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UART3_CR2 = reg;
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/* Turn on uart */
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UART3_CR1 |= UART_CR1_UART_ENABLE;
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return 0;
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}
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char uart_read(void)
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{
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char c;
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volatile uint32_t reg;
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do {
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reg = UART3_SR;
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} while ((reg & UART_SR_RX_NOTEMPTY) == 0);
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c = (char)(UART3_DR & 0xff);
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return c;
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}
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static void ack(uint32_t _off)
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{
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uint8_t *off = (uint8_t *)(&_off);
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int i;
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uart_write(ACK);
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for (i = 0; i < 4; i++) {
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uart_write(off[i]);
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}
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}
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static int check(uint8_t *pkt, int size)
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{
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int i;
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uint16_t c = 0;
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uint16_t c_rx = *((uint16_t *)(pkt + 2));
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uint16_t *p = (uint16_t *)(pkt + 4);
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for (i = 0; i < ((size - 4) >> 1); i++)
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c += p[i];
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if (c == c_rx)
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return 0;
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return -1;
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}
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void main(void) {
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uint32_t version;
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uint32_t tlen = 0;
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volatile uint32_t recv_seq;
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uint32_t r_total = 0;
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uint32_t tot_len = 0;
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uint32_t next_seq = 0;
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uint32_t version = 0;
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uint8_t *v_array = (uint8_t *)&version;
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int i;
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memset(page, 0xFF, PAGESIZE);
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boot_led_on();
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flash_set_waitstates();
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clock_config();
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led_pwm_setup();
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pwm_init(CPU_FREQ, 0);
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/* Dim the led by altering the PWM duty-cicle
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/* Dim the led by altering the PWM duty-cicle
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* in isr_tim2 (timer.c)
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*
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* Every 50ms, the duty cycle of the PWM connected
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@ -45,18 +206,80 @@ void main(void) {
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* effect.
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*/
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timer_init(CPU_FREQ, 1, 50);
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version = wolfBoot_current_firmware_version();
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if (version & 0x01) {
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/* Odd version: unstable, trigger update */
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if (wolfBoot_update_firmware_version() != 0)
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wolfBoot_update_trigger();
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} else {
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/* Even version, stabilise */
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wolfBoot_success();
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}
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uart_setup(115200, 8, 'N', 1);
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memset(page, 0xFF, PAGESIZE);
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asm volatile ("cpsie i");
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/* Initiate update */
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//wolfBoot_success();
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hal_flash_unlock();
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uart_write(START);
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while (1) {
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r_total = 0;
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do {
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while(r_total < 2) {
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msg[r_total++] = uart_read();
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if ((r_total == 2) && ((msg[0] != 0xA5) || msg[1] != 0x5A)) {
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r_total = 0;
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continue;
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}
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}
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msg[r_total++] = uart_read();
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if ((tot_len == 0) && r_total == 2 + sizeof(uint32_t))
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break;
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if ((r_total > 8) && (tot_len <= ((r_total - 8) + next_seq)))
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break;
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} while (r_total < MSGSIZE);
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if (tot_len == 0) {
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tlen = msg[2] + (msg[3] << 8) + (msg[4] << 16) + (msg[5] << 24);
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if (tlen > WOLFBOOT_PARTITION_SIZE - 8) {
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uart_write(ERR);
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uart_write(ERR);
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uart_write(ERR);
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uart_write(ERR);
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uart_write(START);
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recv_seq = 0;
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tot_len = 0;
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update_started = 1;
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continue;
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}
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tot_len = tlen;
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ack(0);
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continue;
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}
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if (check(msg, r_total) < 0) {
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ack(next_seq);
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continue;
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}
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recv_seq = msg[4] + (msg[5] << 8) + (msg[6] << 16) + (msg[7] << 24);
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if (recv_seq == next_seq)
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{
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int psize = r_total - 8;
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int page_idx = recv_seq % PAGESIZE;
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memcpy(&page[recv_seq % PAGESIZE], msg + 8, psize);
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page_idx += psize;
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if ((page_idx == PAGESIZE) || (next_seq + psize >= tot_len)) {
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uint32_t dst = (WOLFBOOT_PARTITION_UPDATE_ADDRESS + recv_seq + psize) - page_idx;
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if ((dst % WOLFBOOT_SECTOR_SIZE) == 0) {
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hal_flash_erase(dst, WOLFBOOT_SECTOR_SIZE);
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}
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hal_flash_write(dst, page, PAGESIZE);
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memset(page, 0xFF, PAGESIZE);
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}
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next_seq += psize;
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}
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ack(next_seq);
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if (next_seq >= tot_len) {
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/* Update complete */
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wolfBoot_update_trigger();
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hal_flash_lock();
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break;
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}
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}
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/* Wait for reboot */
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while(1)
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WFI();
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;
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}
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#endif
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@ -84,7 +84,7 @@ int pwm_init(uint32_t clock, uint32_t threshold)
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lvl = (val * threshold) / 100;
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if (lvl != 0)
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lvl--;
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APB1_CLOCK_RST |= TIM4_APB1_CLOCK_ER_VAL;
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__asm__ volatile ("dmb");
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APB1_CLOCK_RST &= ~TIM4_APB1_CLOCK_ER_VAL;
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@ -145,7 +145,10 @@ int timer_init(uint32_t clock, uint32_t prescaler, uint32_t interval_ms)
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return 0;
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}
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void isr_tim2(void)
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int update_started = 0;
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extern void uart_write(char c);
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void isr_tim2(void)
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{
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static volatile uint32_t tim2_ticks = 0;
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TIM2_SR &= ~TIM_SR_UIF;
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@ -157,6 +160,9 @@ void isr_tim2(void)
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pwm_init(master_clock, 10 * (16 - tim2_ticks));
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else
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pwm_init(master_clock, 10 * tim2_ticks);
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if (!update_started)
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uart_write('*');
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}
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