diff --git a/hal/x86_uart.c b/hal/x86_uart.c index ad1980b7..2dc1970d 100644 --- a/hal/x86_uart.c +++ b/hal/x86_uart.c @@ -142,7 +142,7 @@ int uart_init(uint32_t bitrate, uint8_t data, char parity, uint8_t stop) mode = 0; mode |= data; - mode |= (stop << 2); + mode |= (stops << 2); mode |= (parity_bits << 3); write_reg(X86_UART_LCR, mode); diff --git a/src/boot_x86_fsp.c b/src/boot_x86_fsp.c index 4f783d00..4718f28d 100644 --- a/src/boot_x86_fsp.c +++ b/src/boot_x86_fsp.c @@ -501,6 +501,8 @@ static int fsp_silicon_init(struct fsp_info_header *fsp_info, uint8_t *fsp_s_bas memcpy(silicon_init_parameter, fsp_s_base + fsp_info->CfgRegionOffset, FSP_S_PARAM_SIZE); status = fsp_machine_update_s_parameters(silicon_init_parameter); + if (status != 0) + panic(); SiliconInit = (silicon_init_cb)(fsp_s_base + fsp_info->FspSiliconInitEntryOffset); #if defined(WOLFBOOT_DUMP_FSP_UPD) diff --git a/src/elf.c b/src/elf.c index 59d207d8..6ef62527 100644 --- a/src/elf.c +++ b/src/elf.c @@ -88,6 +88,7 @@ int elf_load_image_mmu(uint8_t *image, uintptr_t *entry, elf_mmu_map_cb mmu_cb) /* Load class and endianess */ is_elf32 = (h32->ident[4] == ELF_CLASS_32); is_le = (h32->ident[5] == ELF_ENDIAN_LITTLE); + (void)is_le; /* Verify this is an executable */ if (GET_H16(type) != ELF_HET_EXEC) { diff --git a/src/x86/ahci.c b/src/x86/ahci.c index 6db07b76..52830ff1 100644 --- a/src/x86/ahci.c +++ b/src/x86/ahci.c @@ -171,7 +171,6 @@ int init_sata_controller(uint32_t bus, uint32_t dev, uint32_t fun) uint32_t ahci_enable(uint32_t bus, uint32_t dev, uint32_t fun) { uint16_t reg16; - uint32_t iobar; uint32_t reg; uint32_t bar; @@ -180,8 +179,6 @@ uint32_t ahci_enable(uint32_t bus, uint32_t dev, uint32_t fun) bar = pci_config_read32(bus, dev, fun, AHCI_ABAR_OFFSET); AHCI_DEBUG_PRINTF("PCI BAR: %08x\r\n", bar); - iobar = pci_config_read32(bus, dev, fun, AHCI_AIDPBA_OFFSET); - AHCI_DEBUG_PRINTF("PCI I/O space: %08x\r\n", iobar); reg |= PCI_COMMAND_BUS_MASTER; reg |= PCI_COMMAND_MEM_SPACE; @@ -197,29 +194,6 @@ uint32_t ahci_enable(uint32_t bus, uint32_t dev, uint32_t fun) return bar; } -/** - * @brief Dumps the status of the specified AHCI port. - * - * This function dumps the status of the AHCI port with the given index. - * It prints the status of various port registers for debugging purposes. - * - * @param base The AHCI Base Address Register (ABAR) for accessing AHCI registers. - * @param i The index of the AHCI port to dump status for. - */ -void ahci_dump_port(uint32_t base, int i) -{ - uint32_t cmd, ci, is, tfd, serr, ssst; - - cmd = mmio_read32(AHCI_PxCMD(base, i)); - ci = mmio_read32(AHCI_PxCI(base, i)); - is = mmio_read32(AHCI_PxIS(base, i)); - tfd = mmio_read32(AHCI_PxTFD(base, i)); - serr = mmio_read32(AHCI_PxSERR(base, i)); - ssst = mmio_read32(AHCI_PxSSTS(base, i)); - AHCI_DEBUG_PRINTF("%d: cmd:0x%x ci:0x%x is: 0x%x tfd: 0x%x serr: 0x%x ssst: 0x%x\r\n", - i, cmd, ci, is, tfd, serr, ssst); -} - #ifdef WOLFBOOT_ATA_DISK_LOCK #ifdef WOLFBOOT_ATA_DISK_LOCK_PASSWORD static int sata_get_unlock_secret(uint8_t *secret, int *secret_size) @@ -362,7 +336,7 @@ static int sata_get_unlock_secret(uint8_t *secret, int *secret_size) #error "implement get_tpm_policy " #endif - if (policy_size > TPM_MAX_POLICY_SIZE) + if (policy_size > TPM_MAX_POLICY_SIZE || ret != 0) return -1; memcpy(policy, pol, policy_size); @@ -464,6 +438,8 @@ int sata_unlock_disk(int drv, int freeze) } r = ata_identify_device(drv); AHCI_DEBUG_PRINTF("ATA identify: returned %d\r\n", r); + if (r != 0) + return -1; ata_st = ata_security_get_state(drv); wolfBoot_printf("ATA: State SEC%d\r\n", ata_st); } @@ -471,8 +447,12 @@ int sata_unlock_disk(int drv, int freeze) AHCI_DEBUG_PRINTF("ATA identify: calling device unlock\r\n", r); r = ata_security_unlock_device(drv, (char*)secret, 0); AHCI_DEBUG_PRINTF("ATA device unlock: returned %d\r\n", r); + if (r != 0) + return -1; r = ata_identify_device(drv); AHCI_DEBUG_PRINTF("ATA identify: returned %d\r\n", r); + if (r != 0) + return -1; ata_st = ata_security_get_state(drv); if (ata_st == ATA_SEC5) { if (freeze) { @@ -487,6 +467,8 @@ int sata_unlock_disk(int drv, int freeze) } r = ata_identify_device(drv); AHCI_DEBUG_PRINTF("ATA identify: returned %d\r\n", r); + if (r != 0) + return -1; } } ata_st = ata_security_get_state(drv); @@ -583,6 +565,7 @@ void sata_enable(uint32_t base) cap = mmio_read32(AHCI_HBA_CAP(base)); n_ports = (cap & 0x1F) + 1; + (void)n_ports; sata_only = (cap & AHCI_CAP_SAM); cap_sud = (cap & AHCI_CAP_SSS); @@ -601,8 +584,8 @@ void sata_enable(uint32_t base) if ((ports_impl & (1 << i)) != 0) { uint32_t reg; uint32_t ssts = mmio_read32(AHCI_PxSSTS(base, i)); - uint8_t ipm = (ssts >> 8) & 0xFF; uint8_t det = ssts & 0x0F; + uint8_t ipm; volatile struct hba_cmd_header *hdr; @@ -736,6 +719,7 @@ void sata_enable(uint32_t base) AHCI_DEBUG_PRINTF("ATA%d associated to AHCI port %d\r\n", drv, i); r = ata_identify_device(drv); + (void)r; AHCI_DEBUG_PRINTF("ATA identify: returned %d\r\n", r); } } else { diff --git a/src/x86/ata.c b/src/x86/ata.c index 954443d7..443d7d36 100644 --- a/src/x86/ata.c +++ b/src/x86/ata.c @@ -601,6 +601,7 @@ int ata_identify_device(int drv) if (slot < 0) return slot; + s_locked = s_frozen = s_enabled = 0; cmd = (struct hba_cmd_header *)(uintptr_t)ata->clb_port; cmd += slot; @@ -612,6 +613,7 @@ int ata_identify_device(int drv) ret = exec_cmd_slot(drv, slot); if (ret == 0) { uint16_t *id_buf = (uint16_t *)buffer; + (void)id_buf; uint16_t cmd_set_supported; uint16_t sec_status; ATA_DEBUG_PRINTF("Device identified\r\n"); @@ -663,7 +665,6 @@ int ata_identify_device(int drv) } if (sec_status & (1 << 0)) { ATA_DEBUG_PRINTF("Security: supported\r\n"); - s_supported = 1; } if (!s_enabled && !s_frozen) ata->sec = ATA_SEC1; @@ -697,6 +698,8 @@ static int ata_drive_read_sector(int drv, uint64_t start, uint32_t count, struct fis_reg_h2d *cmdfis; int i; int slot = prepare_cmd_h2d_slot(drv, buf, count << ata->sector_size_shift, 0); + if (slot < 0) + return -1; cmd = (struct hba_cmd_header *)(uintptr_t)ata->clb_port; cmd += slot; @@ -727,6 +730,8 @@ static int ata_drive_write_sector(int drv, uint64_t start, uint32_t count, uint8_t *buf_ptr; int i; int slot = prepare_cmd_h2d_slot(drv, buf, count << ata->sector_size_shift, 1); + if (slot < 0) + return -1; cmd = (struct hba_cmd_header *)(uintptr_t)ata->clb_port; cmd += slot; tbl = (struct hba_cmd_table *)(uintptr_t)cmd->ctba; @@ -848,6 +853,9 @@ int ata_drive_write(int drv, uint64_t start, uint32_t size, sect_start = start >> ata->sector_size_shift; sect_off = start - (sect_start << ata->sector_size_shift); + if (size == 0) + return 0; + if (sect_off > 0) { uint32_t len = MAX_SECTOR_SIZE - sect_off; if (len > size) @@ -861,6 +869,7 @@ int ata_drive_write(int drv, uint64_t start, uint32_t size, buffer_off += len; sect_start++; } + count = 0; if (size > 0) count = size >> ata->sector_size_shift; if (count > 0) { diff --git a/src/x86/exceptions.c b/src/x86/exceptions.c index a274b8b7..3f2c8f4e 100644 --- a/src/x86/exceptions.c +++ b/src/x86/exceptions.c @@ -76,7 +76,7 @@ static struct idt_descriptor idt_descriptor; "call common_exception_handler\r\n" \ "iretq\r\n" \ : \ - : ""(X)); \ + : "Z"(X)); \ } __attribute__((used)) static void common_exception_handler(uint64_t vector_number) @@ -144,7 +144,7 @@ static void __attribute__((__naked__)) timer_handler() { "sti\r\n" "mov %0, %%eax\r\n" "movl $0, (%%eax)\r\n" - "iretq\r\n"::""(LAPIC_EOI)); + "iretq\r\n"::"i"((uint32_t)LAPIC_EOI)); } static void setup_apic_timer() diff --git a/src/x86/gpt.c b/src/x86/gpt.c index 0578ca39..0cd66b7b 100644 --- a/src/x86/gpt.c +++ b/src/x86/gpt.c @@ -234,11 +234,13 @@ int disk_open(int drv) uint64_t address = ptable.start_array * SECTOR_SIZE + i * ptable.array_sz; r = ata_drive_read(drv, address, ptable.array_sz, (void *)&pa); + if (r < 0) + return -1; if (pa.type[0] != 0 || pa.type[1] != 0) { uint64_t size; uint32_t part_count; if (pa.first > pa.last) { - wolfBoot_printf("Bad geometry for partition %d\r\n", part_count); + wolfBoot_printf("Bad geometry for partition %d\r\n", i); break; } size = (1 + pa.last - pa.first) * SECTOR_SIZE; diff --git a/src/x86/tgl_fsp.c b/src/x86/tgl_fsp.c index 27dfdea1..2e8a3dcf 100644 --- a/src/x86/tgl_fsp.c +++ b/src/x86/tgl_fsp.c @@ -990,7 +990,8 @@ static int tgl_setup_lpc_decode(uint32_t address, uint32_t length, reg = PCI_ESPI_LGIR1 + range * 4; /* setup up decoding in eSPI - generic I/O range 0*/ - pci_config_write32(PCI_ESPI_BUS, PCI_ESPI_DEV, PCI_ESPI_FUN, PCI_ESPI_LGIR1, val); + pci_config_write32(PCI_ESPI_BUS, PCI_ESPI_DEV, PCI_ESPI_FUN, + reg, val); return 0; } @@ -1523,7 +1524,6 @@ static void setup_ece1200() io_write8(ECE1200_INDEX, 0x55); /* conf mode */ io_write8(ECE1200_INDEX, 0x36); - reg = io_read8(ECE1200_DATA); io_write8(ECE1200_INDEX, 0x07); io_write8(ECE1200_DATA, 0x01);