Change the STM32U5 default image header size to resolve vector table alignment issues with the Cortex-M33. ZD 17661

pull/422/head
David Garske 2024-03-15 11:50:42 -07:00 committed by Daniele Lacamera
parent 6d927eb334
commit e8ce553ce8
3 changed files with 10 additions and 0 deletions

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@ -23,3 +23,6 @@ WOLFBOOT_SECTOR_SIZE?=0x2000
WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x08010000 WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x08010000
WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x08110000 WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x08110000
WOLFBOOT_PARTITION_SWAP_ADDRESS?=0xFFFFFFFF WOLFBOOT_PARTITION_SWAP_ADDRESS?=0xFFFFFFFF
# Use a larger image header size to enforce alignment requirements for the interrupt vector table
IMAGE_HEADER_SIZE?=1024

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@ -25,3 +25,6 @@ WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x817F000
WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x81FE000 WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x81FE000
FLAGS_HOME=0 FLAGS_HOME=0
DISABLE_BACKUP=0 DISABLE_BACKUP=0
# Use a larger image header size to enforce alignment requirements for the interrupt vector table
IMAGE_HEADER_SIZE?=1024

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@ -229,6 +229,10 @@ mon reset init
## STM32U5 ## STM32U5
The STM32U5 is a Cortex-M33 (ARMv8-M).
Note: We have seen issues with vector table alignment, so the default image header size (IMAGE_HEADER_SIZE) has been increased to 1024 bytes to avoid potential issues.
### Scenario 1: TrustZone Enabled ### Scenario 1: TrustZone Enabled
#### Example Description #### Example Description