mirror of https://github.com/wolfSSL/wolfBoot.git
Fix to make sure wolfBoot leaves IRQ's disabled. The TSIP driver will leave IRQ's on which could cause customer issues. Added new `spi_flash_chip_erase` API for the SPI flash driver.
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8b1babb7d8
commit
f7fed89f27
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@ -433,7 +433,14 @@ void hal_init(void)
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void hal_prepare_boot(void)
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{
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/* make sure interrupts are disabled */
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#if defined(__CCRX__)
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clrpsw_i();
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#elif defined(__GNUC__)
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__builtin_rx_clrpsw('I');
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#elif defined(__ICCRX__)
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__disable_interrupt();
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#endif
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}
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int hal_flash_init(void)
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@ -407,5 +407,8 @@ void hal_delay_us(uint32_t us);
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#define QSPI_FIFO_SIZE 32 /* bytes */
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/* Software Configurable Interrupt Request Registers */
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#define ICU_PIBR(x) (*(volatile uint8_t *)(SYSTEM_BASE + 0x7700 + (x)))
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#define ICU_PIAR(x) (*(volatile uint8_t *)(SYSTEM_BASE + 0x7900 + (x)))
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#endif /* !_WOLFBOOT_RENESAS_RX_H_ */
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@ -45,6 +45,7 @@ uint16_t spi_flash_probe(void);
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void spi_flash_release(void);
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int spi_flash_sector_erase(uint32_t address);
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int spi_flash_chip_erase(void);
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int spi_flash_read(uint32_t address, void *data, int len);
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int spi_flash_write(uint32_t address, const void *data, int len);
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@ -44,6 +44,7 @@
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#define WREN 0x06
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#define WRDI 0x04
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#define SECTOR_ERASE 0x20
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#define CHIP_ERASE 0x60
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#define BYTE_READ 0x03
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#define BYTE_WRITE 0x02
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#define AUTOINC 0xAD
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@ -205,6 +206,10 @@ uint16_t spi_flash_probe(void)
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wolfBoot_printf("SPI Probe: Manuf 0x%x, Product 0x%x\n", manuf, product);
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manuf_prod = (uint16_t)(manuf << 8) | (uint16_t)product;
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#ifdef SPI_FLASH_CHIP_ERASE
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spi_flash_chip_erase();
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#endif
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#ifdef TEST_EXT_FLASH
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test_ext_flash();
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#endif
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@ -228,6 +233,18 @@ int RAMFUNCTION spi_flash_sector_erase(uint32_t address)
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return 0;
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}
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int RAMFUNCTION spi_flash_chip_erase(void)
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{
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wait_busy();
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flash_write_enable();
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spi_cs_on(SPI_CS_PIO_BASE, SPI_CS_FLASH);
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spi_write(CHIP_ERASE);
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spi_read();
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spi_cs_off(SPI_CS_PIO_BASE, SPI_CS_FLASH);
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wait_busy();
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return 0;
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}
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int RAMFUNCTION spi_flash_read(uint32_t address, void *data, int len)
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{
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uint8_t *buf = data;
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