mirror of https://github.com/wolfSSL/wolfBoot.git
Minor cleanups. Add the required Cube HAL to app Makefile.
parent
17a3d5c476
commit
ff28cec38a
14
arch.mk
14
arch.mk
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@ -78,11 +78,6 @@ ifeq ($(ARCH),ARM)
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endif
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endif
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ifeq ($(TARGET),stm32l4)
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ARCH_FLASH_OFFSET=0x08000000
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SPI_TARGET=stm32
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endif
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## Cortex-M CPU
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ifeq ($(CORTEX_M33),1)
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CFLAGS+=-mcpu=cortex-m33
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@ -274,11 +269,14 @@ endif
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ifeq ($(TARGET),stm32l4)
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SPI_TARGET=stm32
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ARCH_FLASH_OFFSET=0x08000000
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OBJS+=$(STM32CUBE)/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.o
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OBJS+=$(STM32CUBE)/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.o
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CFLAGS+=-DSTM32L4A6xx -DUSE_HAL_DRIVER -I$(STM32CUBE)/Drivers/STM32L4xx_HAL_Driver/Inc/ \
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-Isrc -I$(STM32CUBE)/Drivers/BSP/STM32L4xx_Nucleo_144/ -I$(STM32CUBE)/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ \
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-I$(STM32CUBE)/Drivers/CMSIS/Include/
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CFLAGS+=-DSTM32L4A6xx -DUSE_HAL_DRIVER -Isrc -Ihal \
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-I$(STM32CUBE)/Drivers/STM32L4xx_HAL_Driver/Inc/ \
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-I$(STM32CUBE)/Drivers/BSP/STM32L4xx_Nucleo_144/ \
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-I$(STM32CUBE)/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ \
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-I$(STM32CUBE)/Drivers/CMSIS/Include/
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endif
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CFLAGS+=-DARCH_FLASH_OFFSET=$(ARCH_FLASH_OFFSET)
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@ -27,26 +27,21 @@
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#define DMB() asm volatile ("dmb")
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/*** RCC ***/
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#define RCC_PRESCALER_DIV_NONE 0
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static uint32_t Address = 0, PAGEError = 0;
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static FLASH_EraseInitTypeDef EraseInitStruct;
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static uint32_t RAMFUNCTION GetPage(uint32_t Addr)
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{
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uint32_t page = 0;
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if (Addr < (FLASH_BASE + FLASH_BANK_SIZE))
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page = (Addr - FLASH_BASE) / FLASH_PAGE_SIZE;
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else
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page = (Addr - (FLASH_BASE + FLASH_BANK_SIZE)) / FLASH_PAGE_SIZE;
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return page;
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}
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@ -54,7 +49,7 @@ static uint32_t RAMFUNCTION GetPage(uint32_t Addr)
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static uint32_t RAMFUNCTION GetBank(uint32_t Addr)
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{
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uint32_t bank = 0;
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if (READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE) == 0) {
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if (Addr < (FLASH_BASE + FLASH_BANK_SIZE)) {
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bank = FLASH_BANK_1;
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@ -68,7 +63,7 @@ static uint32_t RAMFUNCTION GetBank(uint32_t Addr)
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bank = FLASH_BANK_1;
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}
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}
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return bank;
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}
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@ -100,34 +95,34 @@ int RAMFUNCTION hal_flash_erase(uint32_t address,int len)
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hal_flash_unlock();
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__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
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FirstPage = GetPage((uint32_t) address);
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NbOfPages = GetPage((uint32_t) address) - FirstPage + 1;
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BankNumber = GetBank((uint32_t) address);
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EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES;
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EraseInitStruct.Banks = BankNumber;
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EraseInitStruct.Page = FirstPage;
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EraseInitStruct.NbPages = NbOfPages;
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end_address = address + len - 1;
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for (uint32_t p = address; p < end_address; p += FLASH_PAGE_SIZE) {
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if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK) {
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break;
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}
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}
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hal_flash_lock();
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return 0;
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}
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static void RAMFUNCTION flash_set_waitstates(int waitstates)
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{
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FLASH->ACR |= waitstates | FLASH_ACR_DCEN | FLASH_ACR_ICEN;
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FLASH->ACR |= (waitstates | FLASH_ACR_DCEN | FLASH_ACR_ICEN);
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}
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static RAMFUNCTION void flash_wait_complete(void)
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@ -141,7 +136,7 @@ int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
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int i = 0;
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uint32_t *dst;
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uint32_t reg;
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int ret=-1;
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int ret = -1;
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hal_flash_clear_errors();
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reg = FLASH->CR & (~FLASH_CR_FSTPG);
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@ -153,7 +148,7 @@ int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
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int off = (address + i) - (((address + i) >> 3) << 3);
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uint32_t base_addr = address & (~0x07); /* aligned to 64 bit */
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int u32_idx = (i >> 2);
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hal_flash_clear_errors();
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dst = (uint32_t *)(base_addr);
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val[0] = dst[u32_idx];
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@ -165,23 +160,25 @@ int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len)
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flash_wait_complete();
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}
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if ((FLASH->SR &FLASH_SR_PROGERR)!= FLASH_SR_PROGERR) {
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ret=0;
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}
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ret=0;
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}
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if ((FLASH->SR & FLASH_SR_EOP) == FLASH_SR_EOP) {
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FLASH->SR |= FLASH_SR_EOP;
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}
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}
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FLASH->CR &= ~FLASH_CR_PG;
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return ret;
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return ret;
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}
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static void clock_pll_off(void)
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{
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uint32_t reg32;
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/* Enable internal multi-speed oscillator. */
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RCC->CR |= RCC_CR_HSION;
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DMB();
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while ((RCC->CR & RCC_CR_HSIRDY) == 0) {};
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/* Select HSI as SYSCLK source. */
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reg32 = RCC->CFGR;
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reg32 &= ~((1 << 1) | (1 << 0));
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@ -196,11 +193,12 @@ static void clock_pll_off(void)
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static void clockconfig(int powersave)
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{
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uint32_t reg32;
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uint32_t hpre,ppre1,ppre2,flash_waitstates;
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/* Enable Power controller */
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RCC->APB1ENR1 |= RCC_APB1ENR1_PWREN;
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/* Select clock parameters */
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/*cpu_freq=16000000;*/
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hpre= RCC_PRESCALER_DIV_NONE;
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@ -208,17 +206,19 @@ static void clockconfig(int powersave)
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ppre2=RCC_PRESCALER_DIV_NONE;
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flash_waitstates = 3;
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flash_set_waitstates(flash_waitstates);
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/* Enable internal high-speed oscillator. */
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RCC->CR |=RCC_CR_HSION;
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DMB();
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while ((RCC->CR & RCC_CR_HSIRDY)==0);
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/* select HSI as SYSCLK source*/
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reg32 = RCC->CFGR;
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reg32 &= ~((1 << 1) | (1 << 0));
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RCC->CFGR = (reg32 | RCC_CFGR_SW_HSI);
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DMB();
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/* Set prescalers for AHB, ADC, ABP1, ABP2.
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*/
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/* Set prescalers for AHB, ADC, ABP1, ABP2 */
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reg32 = RCC->CFGR;
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reg32 &= ~(0xF0);
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RCC->CFGR = (reg32 | (hpre << 4));
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@ -231,7 +231,7 @@ static void clockconfig(int powersave)
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reg32 &= ~(0x07 << 11);
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RCC->CFGR = (reg32 | (ppre2 << 11));
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DMB();
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/* Disable internal high-speed oscillator. */
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RCC->CR &= ~RCC_CR_HSION;
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@ -1,9 +1,33 @@
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/* stm32-4xx_hal_conf.h
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*
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* Copyright (C) 2021 wolfSSL Inc.
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*
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* This file is part of wolfBoot.
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*
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* wolfBoot is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* wolfBoot is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
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*/
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#ifndef __STM32L4xx_HAL_CONF_H
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#define __STM32L4xx_HAL_CONF_H
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#define HAL_MODULE_ENABLED
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#define HAL_FLASH_MODULE_ENABLED
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#define HAL_RCC_MODULE_ENABLED
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#include "stm32l4xx_hal_flash.h"
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#include "stm32l4xx_hal_rcc.h"
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#define assert_param(expr) ((void)0U)
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#endif /* __STM32L4xx_HAL_CONF_H */
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@ -79,6 +79,16 @@ ifeq ($(TARGET),stm32h7)
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LSCRIPT_TEMPLATE=ARM-stm32h7.ld
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endif
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ifeq ($(TARGET),stm32l4)
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APP_OBJS+=$(STM32CUBE)/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.o
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APP_OBJS+=$(STM32CUBE)/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.o
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CFLAGS+=-DSTM32L4A6xx -DUSE_HAL_DRIVER -Isrc -Ihal \
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-I$(STM32CUBE)/Drivers/STM32L4xx_HAL_Driver/Inc/ \
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-I$(STM32CUBE)/Drivers/BSP/STM32L4xx_Nucleo_144/ \
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-I$(STM32CUBE)/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ \
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-I$(STM32CUBE)/Drivers/CMSIS/Include/
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endif
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ifeq ($(TARGET),stm32l5)
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ifeq ($(TZEN),1)
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LSCRIPT_TEMPLATE=ARM-stm32l5-ns.ld
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@ -1,3 +1,27 @@
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/* app_stm32l4.c
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*
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* Test bare-metal boot-led-on application
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*
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* Copyright (C) 2020 wolfSSL Inc.
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*
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* This file is part of wolfBoot.
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*
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* wolfBoot is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* wolfBoot is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
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*/
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#include "led.h"
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#include "hal.h"
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#include "wolfboot/wolfboot.h"
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hal_init();
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boot_led_on();
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boot_version = wolfBoot_current_firmware_version();
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if(boot_version == 1) {
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if (boot_version == 1) {
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/* Turn on Blue LED */
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boot_led_on();
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wolfBoot_update_trigger();
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} else if(boot_version >= 2) {
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} else if (boot_version >= 2) {
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/* Turn on Red LED */
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led_on();
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wolfBoot_success();
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}
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/* Wait for reboot */
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while(1) {
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}
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while(1) {
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}
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}
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#endif /* PLATFORM_stm32l4 */
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@ -180,7 +180,7 @@ void boot_led_off(void)
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#endif /* PLATFORM_stm32wb */
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#ifdef PLATFORM_stm32l4
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#define AHB2_CLOCK_ER (*(volatile uint32_t *)(0x4002104C)) // RCC_AHB2ENR
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#define AHB2_CLOCK_ER (*(volatile uint32_t *)(0x4002104C)) /* RCC_AHB2ENR */
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#define GPIOB_AHB2_CLOCK_ER (1 << 1)
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#define GPIOB_BASE 0x48000400
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void boot_led_on(void)
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{
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uint32_t reg;
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uint32_t pin = LED_BOOT_PIN;
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uint32_t pin = LED_BOOT_PIN;
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AHB2_CLOCK_ER |= GPIOB_AHB2_CLOCK_ER;
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reg = GPIOB_MODE & ~(0x03 << (pin * 2));
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GPIOB_MODE = reg | (1 << (pin * 2));
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@ -211,7 +211,7 @@ void boot_led_on(void)
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void led_on(void)
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{
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uint32_t reg;
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uint32_t pin = LED_PIN;
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uint32_t pin = LED_PIN;
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AHB2_CLOCK_ER |= GPIOB_AHB2_CLOCK_ER;
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reg = GPIOB_MODE & ~(0x03 << (pin * 2));
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GPIOB_MODE = reg | (1 << (pin * 2));
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