wolfBoot

Commit Graph

Author	SHA1	Message	Date
David Garske	0f00f8e700	SiFive HiFive (FE310) RISC-V support * HiFive1 HAL Support for PLL Clock, UART, RTC and Flash QSPI Erase/Write. * HiFive1 update demo application for accepting firmware updates over UART. * Added test-update-server application for pushing firmware image over UART. * Fixes for building with `make SIGN=ECC256`. * Improvements to wolfCrypt `user_settings.h`. * General library cleanup (license headers and formatting) * Updated the wolfSSL submodule to latest. * Documentation updates including new `Targets.md` section for hardare instructions.	2019-06-07 13:08:15 -07:00
Daniele Lacamera	6324e8fe37	[CI] SPI tests fixed	2019-03-18 12:21:44 +01:00
Daniele Lacamera	630a10eafa	Automated tests for EXT_FLASH/SPI_FLASH	2019-03-15 11:16:34 +01:00

Author

SHA1

Message

Date

David Garske

0f00f8e700

SiFive HiFive (FE310) RISC-V support

* HiFive1 HAL Support for PLL Clock, UART, RTC and Flash QSPI Erase/Write.
* HiFive1 update demo application for accepting firmware updates over UART.
* Added test-update-server application for pushing firmware image over UART.
* Fixes for building with `make SIGN=ECC256`.
* Improvements to wolfCrypt `user_settings.h`.
* General library cleanup (license headers and formatting)
* Updated the wolfSSL submodule to latest.
* Documentation updates including new `Targets.md` section for hardare instructions.

2019-06-07 13:08:15 -07:00

Daniele Lacamera

6324e8fe37

[CI] SPI tests fixed

2019-03-18 12:21:44 +01:00

Daniele Lacamera

630a10eafa

Automated tests for EXT_FLASH/SPI_FLASH

2019-03-15 11:16:34 +01:00

3 Commits (fix_issue_19_stdlib)