Commit Graph

12 Commits (fix_issue_19_stdlib)

Author SHA1 Message Date
David Garske 33e3607e21 Updates to documentation for RISC-V addresses. Added link to wolfBoot-examples repo. Revert target.h changes. 2019-06-10 17:58:31 +02:00
David Garske 0f00f8e700 SiFive HiFive (FE310) RISC-V support
* HiFive1 HAL Support for PLL Clock, UART, RTC and Flash QSPI Erase/Write.
* HiFive1 update demo application for accepting firmware updates over UART.
* Added test-update-server application for pushing firmware image over UART.
* Fixes for building with `make SIGN=ECC256`.
* Improvements to wolfCrypt `user_settings.h`.
* General library cleanup (license headers and formatting)
* Updated the wolfSSL submodule to latest.
* Documentation updates including new `Targets.md` section for hardare instructions.
2019-06-07 13:08:15 -07:00
Daniele Lacamera b5fd49a82a Initial experimental support for RISC-V
- New Makefile to support multiple architectures
- Separate architecture-specific start-up files
- Stub for a hifive1 HAL port
2019-04-01 14:01:14 +02:00
Daniele Lacamera 630a10eafa Automated tests for EXT_FLASH/SPI_FLASH 2019-03-15 11:16:34 +01:00
Daniele Lacamera bfa3f50a60 Restored target.h for default test 2019-02-15 14:45:27 +01:00
Daniele Lacamera 503b008cf5 New feature: allow swapping from external memory (e.g. SPI flash) 2019-02-15 13:41:06 +01:00
Daniele Lacamera 6b3dfe2e69 Removed dependency on bootutil. Starting from a new clean-room update design 2018-11-21 07:00:35 +01:00
Daniele Lacamera 32c4cb7abe Reverted target.h to default configuration 2018-10-26 12:19:28 +02:00
Daniele Lacamera 6f203a84c3 Fixed upgrade in OVERWRITE_ONLY mode 2018-10-26 12:15:25 +02:00
Daniele Lacamera 7f02df51c9 Added SWAP=0 option, fixed some warnings 2018-10-21 10:04:50 +02:00
Daniele Lacamera efa8d63200 Using 0x20000 as start of primary partition in the example 2018-10-15 07:39:52 +02:00
Daniele Lacamera ec66c47375 First version of the bootloader 2018-10-11 12:23:58 +02:00