4 Commits (master)

Author	SHA1	Message	Date
David Garske	e718eed709	PolarFire SoC: LPDDR4 DDR init for MPFS250T Video Kit (M-Mode)	2026-08-03 12:27:22 +02:00
David Garske	3c11bf3f55	Peer review fixes	2026-04-22 19:08:00 +02:00
David Garske	5d71feb4ef	PolarFire SoC M-Mode: Fix L2 scratchpad init, QSPI programmer, and add WDT support	2026-04-22 19:08:00 +02:00
David Garske	d23943a5af	PolarFire SoC M-Mode, QSPI and L2-LIM support ... Adds support for running wolfBoot in **Machine Mode (M-mode)** on the PolarFire SoC MPFS250T, booting from eNVM and loading a signed application from **SC QSPI flash** into on-chip LIM (Loosely Integrated Memory). No HSS (Hart Software Services) or DDR is required. It also extends the existing PolarFire HAL with multi-hart support, L2 cache configuration, per-hart UART, and refactors shared code (SDHCI, SCB mailbox, linker/test-app) for both S-mode and M-mode builds.	2026-03-09 07:29:27 +01:00