Commit Graph

9 Commits (51fe05cf9c41f18ec6be46ca664d17b45aacaba3)

Author SHA1 Message Date
Daniele Lacamera fce6149cf8 Update license GPL2 -> GPL3 2024-04-16 16:46:15 +02:00
David Garske 8dd0ee347f Support for the STM32 OCTOSPI peripheral. 2023-02-02 12:11:23 -08:00
David Garske a9526bab8f STM32 QSPI Flash support. Refactor SPI to allow different GPIO base/AF for each pin. Adds `DEBUG_UART` support for H7. 2022-12-20 13:31:28 +01:00
David Garske d38de3b432 Update copyright year 2021-07-19 07:50:02 -07:00
Chris Conlon 1f57ad9f39 update copyright to 2020 2020-01-03 15:36:00 -08:00
David Garske 6ed1e5ca5f Fixes for external SPI build options. 2019-12-17 10:38:18 -08:00
David Garske 0f00f8e700 SiFive HiFive (FE310) RISC-V support
* HiFive1 HAL Support for PLL Clock, UART, RTC and Flash QSPI Erase/Write.
* HiFive1 update demo application for accepting firmware updates over UART.
* Added test-update-server application for pushing firmware image over UART.
* Fixes for building with `make SIGN=ECC256`.
* Improvements to wolfCrypt `user_settings.h`.
* General library cleanup (license headers and formatting)
* Updated the wolfSSL submodule to latest.
* Documentation updates including new `Targets.md` section for hardare instructions.
2019-06-07 13:08:15 -07:00
Daniele Lacamera 6324e8fe37 [CI] SPI tests fixed 2019-03-18 12:21:44 +01:00
Daniele Lacamera 630a10eafa Automated tests for EXT_FLASH/SPI_FLASH 2019-03-15 11:16:34 +01:00