Commit Graph

1010 Commits (80dbb6da15ab5eb348f5d76049dabd03be5bdd67)

Author SHA1 Message Date
David Garske 2a337e72c6 i2c: add a bit-banged back-end selectable with I2C_BITBANG 2026-10-06 18:14:10 +02:00
David Garske 508ad6a26d Add wolfBoot target for Infineon PSOC Control C3 2026-10-06 18:14:10 +02:00
David Garske 97e895613d tpm: add a TIS-over-I2C transport and a generic I2C driver interface 2026-10-06 18:14:10 +02:00
David Garske a16e2e8f11
Merge pull request #912 from bigbrett/tc3-toolchain-support
Expand TC3xx toolchain support
2026-10-02 08:02:29 -07:00
David Garske 26a157868f
Merge pull request #917 from danielinux/fenrir-fixes-2026-09-30
Fenrir fixes 2026 09 30
2026-09-30 16:11:29 -07:00
Daniele Lacamera 78797a946d hal: scrub the TRNG staging buffers without wolfCrypt
F-14487/F-14488 scrubbed the TRNG staging buffers with wc_ForceZero,
which links the hal objects to wolfCrypt's memory.c. The OTP keystore
primer links the hal without wolfCrypt and failed to build
(undefined reference to wc_ForceZero) in the stm32h5_tz_dualbank_otp
and trustzone-emulator configs. Scrub with a local volatile loop, the
same pattern nvm_cache_scrub uses for the same reason.
2026-09-30 19:59:33 +02:00
David Garske c83238ae71
Merge pull request #914 from bigbrett/tc3-host-park
TC3: Add host park functionality
2026-09-30 09:07:45 -07:00
Daniele Lacamera ce814dd532 F-14488: scrub the STM32 TZ TRNG word in hal_trng_get_entropy
The secure-mode TRNG seed helper (shared by the STM32L5/U5/H5
TrustZone ports) staged each TRNG_DR word in a stack local and
returned without clearing it. Force-zero the local before the
return, mirroring the existing scrub in hal/cm4.c.
2026-09-30 16:33:53 +02:00
Daniele Lacamera e280cf1e7c F-14487: scrub the nRF5340 TRNG staging batch in hal_trng_get_entropy
The secure-mode TRNG seed helper copied each 24-byte CryptoCell EHR
batch into a stack array and returned without clearing it, leaving
raw TRNG output in the retired secure frame. Force-zero the batch at
the end of each iteration, mirroring the existing scrub in hal/cm4.c.
2026-09-30 16:33:53 +02:00
Brett Nicholas 7c16bfdd1c fix typo 2026-09-29 11:48:32 -06:00
Brett Nicholas 97258d10db Remove park enabled flag, rename host trigger macro 2026-09-29 10:45:39 -06:00
David Garske 8f4578c84e Add optional boot confirmation and rollback for the disk boot path 2026-09-29 07:41:43 +02:00
Brett Nicholas 2880b1d07f Add in TC3 host park support 2026-09-28 15:40:36 -06:00
Brett Nicholas dd7a5d7822 Expand TC3xx toolchain support:
- HighTec GCC on both tricore and HSM
 - HighTec LLVM on both tricore and HSM
 - Open source GCC for both tricore and HSM
2026-09-28 15:02:05 -06:00
David Garske df9367297a
Merge pull request #910 from danielinux/fenrir-fixes-2026-09-24
Batch of Fenrir fixes: 2026 09 24
2026-09-28 10:36:12 -07:00
David Garske 490a3791f9 Fix to keep the FIT DTB's own bootargs unless LINUX_BOOTARGS is explicitly configured 2026-09-24 16:03:12 +02:00
David Garske 23989067ec zynqmp: add non-cacheable DMA window and hal_dma_set_noncached() 2026-09-24 13:27:04 +02:00
David Garske 7b71f28aa3 versal: support DDR apertures above 1 TB in the translation table 2026-09-24 13:13:33 +02:00
Aidan Garske 20310a9014 Align the i.MX RT700 HAL license headers to GPLv3 2026-09-24 13:12:36 +02:00
Aidan Garske f8a1e540b9 Require WOLFBOOT_SECURE_APP for i.MX RT700 TrustZone builds 2026-09-24 13:12:36 +02:00
Aidan Garske 62c7fe30b2 Add unit tests for the i.MX RT700 flash address gate 2026-09-24 13:12:36 +02:00
Aidan Garske 3833df9f97 Harden the i.MX RT700 flash HAL with bounded polls and a locked boot region 2026-09-24 13:12:36 +02:00
Aidan Garske f16e9dc048 Use the shared secure application SAU default on the i.MX RT700 2026-09-24 13:12:36 +02:00
Aidan Garske 02f001ef03 Add a TrustZone secure application boot config for the i.MX RT700 2026-09-24 13:12:36 +02:00
Aidan Garske 61ce5144c5 Use the NXP SDK XSPI driver for i.MX RT700 flash program and erase 2026-09-24 13:12:36 +02:00
Aidan Garske be34f8572b Add a debug UART on LPUART0 for the i.MX RT700 HAL 2026-09-24 13:12:36 +02:00
Aidan Garske 628759110f Add an i.MX RT700 (MIMXRT798S) HAL target that boots from XSPI0 NOR 2026-09-24 13:12:36 +02:00
Daniele Lacamera 9bc15c1656 fix Fenrir review: ls1028a test_flash return contract, x86 FSP stop bits
- hal/nxp_ls1028a.c: ext_flash_erase/write return len on success, not
  0, so the F-12067 follow-up guards (ret != 0) always tripped and
  test_flash could never pass; check ret < 0
- src/x86/qemu_fsp.c: the F-12885 stop-bit guard rejects the in-tree
  uart_init(115200, 8, 'N', 0) call, leaving the FSP QEMU debug UART
  unprogrammed; pass 1 stop bit
2026-09-24 12:48:08 +02:00
Daniele Lacamera c74ed95407 F-12886: reject non-positive length in HiFive1 flash write
The write loop cast len to uint32_t, so a negative length became
a huge iteration count and read past the source buffer; a zero
length is a no-op success, matching the erase side.
2026-09-24 12:03:20 +02:00
Daniele Lacamera d07d9818d2 F-12067: check erase/write results in test_flash
Only the final read result reached the return value; a failed
erase or write was reported as success.
2026-09-24 12:03:20 +02:00
Daniele Lacamera 75707384fa F-6871: bound ext_flash_erase to the device size
Erase was the only ext_flash op without the layout check, so an
out-of-range request reached the SDK. Also replace the lone
_Static_assert with the tree's typedef char idiom.
2026-09-24 12:01:52 +02:00
Daniele Lacamera f528cabfd0 F-14131: pass the byte length to FLASH_EraseSector
The MCXA ROM API (fsl_romapi.h) takes lengthInBytes, not a sector
count, so the original pass-through was already correct and the
sector-count conversion erased almost nothing. It also called
FLASH_GetFlashConfig, which does not exist in the MCXA ROM API and
only compiled against the unit-test stub. Restore the byte length,
keep the len guard, and drop the invented call from the stub.
2026-09-24 12:01:43 +02:00
Daniele Lacamera 641c9cf4a0 F-12871: compare against the absolute bank 2 base
The dispatcher split cross-bank requests at FLASH_BANK2_BASE_REL
(0x00100000), but callers pass absolute flash addresses in
FLASHMEM_ADDRESS_SPACE, so the split never fired and the whole
request was programmed on the bank of the start address. Compare
against FLASH_BANK2_BASE (0x08100000); the test now drives
absolute addresses so it exercises the real call convention.
2026-09-24 12:01:43 +02:00
Daniele Lacamera c7bf895cc8 F-12886: reject non-positive length in HiFive1 flash erase
For len <= 0 the inclusive end (address + len - 1) underflows and
the sector loop runs through address wraparound. Treat a
non-positive length as a no-op before computing the end.
2026-09-24 10:56:40 +02:00
Daniele Lacamera f219d093e1 F-12067: test_flash returns -1 on mismatch, 0 on success
A mismatch at index zero returned -0 (success-looking), and a
successful test returned the ext_flash_read() byte count. Return a
fixed -1 on mismatch and 0 on success, and have the hal_init
diagnostic caller log a failure.
2026-09-24 10:53:48 +02:00
Daniele Lacamera 93da3768d2 F-9742: reject cross-bank flash erase on TI Hercules
hal_flash_erase() selected the bank geometry from the start address
only; a range extending past the end of that bank was partially
erased and reported as success. Derive the bank end from the sector
geometry and reject cross-bank requests before erasing anything.

New unit test extracts the real hal_flash_erase() and runs it against
an emulated two-bank FAPI.
2026-09-24 10:52:19 +02:00
Daniele Lacamera 6da35c8c2e F-9741: close fd on mmap failure in sim HAL
mmap_file() left the file descriptor open when mmap() failed; the
current callers exit(-1) so the leak was invisible, but close it on
the error path.
2026-09-24 10:48:14 +02:00
Daniele Lacamera a5e5d37740 F-6872: assert hal_bl_scratch covers the bootloader slot budget
- The seven RAM start-table scratch slots sit at hard-coded 256-byte
  strides (last one 512 bytes); nothing checked the 2048-byte buffer
  still covers them if the layout or the buffer is edited.
- Add a _Static_assert on the slot budget plus a comment recording the
  per-slot contract and the sizeof() re-derivation owed when SPIC
  adaptor reuse lands (SDK struct sizes are only visible in the SDK
  backend, so full sizeof-based slots are deferred to that toolchain).
- Verified: host -fsyntax-only clean at 2048; shrinking the buffer to
  1024 fails with the assertion message; make -C tools/unit-tests run
  passes.
2026-09-24 10:42:08 +02:00
Daniele Lacamera 772f640542 F-6871: bound ext_flash read/write to the SPI NOR device size
- ext_flash_read/ext_flash_write forwarded unvalidated (address, len)
  to the SDK flash_stream_* primitives; a request past the 16 MB
  device end reached the driver unchecked, unlike the overflow guard
  already in ext_flash_erase.
- Add ext_flash_in_layout(): reject negative len, base at/past the
  16 MB device end, and any end offset beyond it (the base check
  keeps the size subtraction from wrapping).
- Verified: host -fsyntax-only of the bare backend compiles clean;
  make -C tools/unit-tests run passes.
2026-09-24 10:40:20 +02:00
Daniele Lacamera d6464f96f9 hifive1: mask the HFROSCCFG divider shift with the divider field (F-9743)
HFROSCCFG_DIV_SHIFT(d) masked the shifted value with HFROSCCFG_TRIM
(bits 16-23) instead of HFROSCCFG_DIV (bits 0-3), so the divider
always programmed zero.

- mask with HFROSCCFG_DIV
- add unit-hifive1-hfrosccfg pinning the field macros (value,
  overlap, and the composed init register value)
2026-09-24 10:16:34 +02:00
Daniele Lacamera 647022b183 x86: derive UART stop-bit field from requested stop count (F-12885)
uart_init() initialized a local to zero and tested that local, so the
LCR stop-bit field was always zero (one stop bit) and stop values
other than 1/2 were silently accepted. Validate stop against 1/2 and
derive the field from the parameter.

Add unit-x86-uart (linked real driver, io_write8/io_read8 mocked)
covering 8N1/8N2/5O2 LCR encodings plus stop-count and existing
argument rejection; 3 of 5 tests fail pre-fix.
2026-09-24 09:11:56 +02:00
Daniele Lacamera 7860fa6c7a F-12071: early-exit sector scan for sector-zero ranges
The not-found sentinel is -1, so the early-exit test must be
start >= 0 && end >= 0; with '> 0' any range involving sector zero
scanned the whole table. Behavior-preserving: each address falls in
exactly one bucket, so the full scan produced the same result.
2026-09-24 07:07:07 +02:00
Daniele Lacamera 66b2205e9b F-12106: report flash programming errors on STM32U3
hal_flash_write() cleared errors before programming and waited for
completion but never read the post-program status register, so
OPERR/PROGERR/WRPERR/PGAERR/SIZERR/PGSERR faults were swallowed and a
failed program was reported as success. Check FLASH_NS_SR after the
wait, clear the flags, and return -1 on fault; reject addresses not
aligned to the 8-byte double-word programming unit.

Unit test extracts the writer with stubbed registers: success,
PROGERR, WRPERR and misaligned-address cases; fails pre-fix.
2026-09-24 07:04:58 +02:00
Daniele Lacamera 58061721ee F-12871: split cross-bank flash writes at the bank boundary
hal_flash_write() picked the bank from the start address and
programmed the whole request on that bank, so a request crossing
into bank 2 wrote its tail to the wrong bank. The exported writer
now splits at FLASH_BANK2_BASE_REL into two per-bank passes; a
failure in the first pass stops the split.

Unit test extracts the dispatcher and mocks the per-bank pass:
cross-boundary split, single-bank pass-through, and first-pass
failure all covered; fails pre-fix.
2026-09-24 07:00:28 +02:00
Daniele Lacamera 65e3b40361 F-12884: flush the nRF54L UART conversion buffer when full
Input longer than the 128-byte conversion buffer was silently
truncated: the loop stopped at the buffer edge and one raw write
dropped the rest. Flush on full (and before a newline that no longer
fits) and keep converting.

Verification: new unit-nrf54l-uart-write fails pre-fix 3/4 (output
capped at 128 bytes), 4/4 post-fix; full make -C tools/unit-tests run
green.
2026-09-24 06:47:51 +02:00
Daniele Lacamera 1d1977c241 F-13654: index the NVM word fast path from the current offset
With matched-but-unaligned address/data residues the byte-wise prefix
leaves i % 4 != 0, so dst[i >> 2] stored the word below the intended
address, dropped the tail bytes of the unit, and issued an unaligned
NVM store (HardFault on M0+). Derive src/dst from address + i, matching
the already-correct else branch.

Verification: new matched-alignment test fails pre-fix in both
unit-flash-write-samr21 and unit-flash-write-same51 (tail bytes stay
0xFF), 3/3 post-fix; full make -C tools/unit-tests run green.
2026-09-24 02:49:58 +02:00
Daniele Lacamera 6025f3540f F-13655: index the flash double-word fast path from the current offset
With an unaligned start address the byte-wise prefix leaves i % 4 != 0,
so dst[i >> 2] programmed the double word below the intended address
and left the tail bytes of the unit unprogrammed. Derive src/dst from
address + i, matching the already-fixed else branch.

Verification: new unit-stm32g4-write test_write_unaligned_start fails
pre-fix (memcmp mismatch), 5/5 post-fix; full make -C tools/unit-tests
run green.
2026-09-24 02:47:16 +02:00
Daniele Lacamera d17ea7aefe F-14129: derive the C0 erase page from the flash-relative offset 2026-09-24 02:34:03 +02:00
Daniele Lacamera 5e065c67fe F-14130: guard zero-length erase in the kinetis HAL 2026-09-24 02:34:03 +02:00
Daniele Lacamera 0c8a9ae45f F-14131: pass a sector count, not a byte length, to FLASH_EraseSector 2026-09-24 02:33:47 +02:00