4 Commits (fce6149cf8df011484da689d064ef1909e18cddc)

Author	SHA1	Message	Date
Daniele Lacamera	fce6149cf8	Update license GPL2 -> GPL3	2024-04-16 16:46:15 +02:00
David Garske	fea3b9ed1d	Improve PCIe code.	2024-02-12 19:54:12 +01:00
David Garske	0b206d6758	Fixes for NXP T1024 with Integrity OS. Adds additional FDT fixups for FMAN, Ethernet, PCI. Add PCI init and enumeration.	2024-02-12 19:54:12 +01:00
David Garske	83283c6cf7	Fixes for NXP T1024 and booting Integrity OS: ... * Fixed PPC spin table based on ePAPR 1.1. * Added flattened device tree (FDT) support. Setting required FDT fields per ePAPR 1.1. * Added Frame Manager microcode upload. * Fixed CPLD and setting QE clock. * Added support for setting logical device numbers and updated device tree. * Fixed QUICC Engine base address (was incorrect, should be 0x140000). * Fixed "cpu-release-addr" to use 64-bit value. * Added secondary cached boot page. * Added L2 cache support to multi-core. * Added flattened device tree parser tool for testing (`make fdt-parser` and `tools/fdt-parser/fdt-parser`). * Added checks for FDT header. * Added automated test case for NXP T1024 FDT.	2024-01-17 14:16:15 +01:00