Commit Graph

10 Commits (fce6149cf8df011484da689d064ef1909e18cddc)

Author SHA1 Message Date
Daniele Lacamera fce6149cf8 Update license GPL2 -> GPL3 2024-04-16 16:46:15 +02:00
David Garske 5463105eab Adds STM32U5 support. Thank you ST. 2022-01-24 00:07:03 -08:00
David Garske d38de3b432 Update copyright year 2021-07-19 07:50:02 -07:00
Elms 529b138b7c TMS570LC43xx: cleanup ISR and add build release project 2021-06-23 09:12:17 +02:00
Elms ee0f93fee0 TMS570LC43xx: Add flash from RAM and test-app and cleanup
* add flash demo from RAM
 * clean up linker script and flags
 * Add hercules test-app: link script and minimal c file

`make CCS_ROOT=/c/ti/ccs1031/ccs/tools/compiler/ti-cgt-arm_20.2.4.LTS F021_DIR=/c/ti/Hercules/F021\ Flash\ API/02.01.01`
2021-06-23 09:12:17 +02:00
Daniele Lacamera 12ea412029 Cosmetic fixes (whitespaces) 2020-09-09 14:26:30 -07:00
David Garske 43c2e3dd79 Experimental support for STM32L5 2020-09-09 14:26:30 -07:00
Chris Conlon 1f57ad9f39 update copyright to 2020 2020-01-03 15:36:00 -08:00
David Garske 0f00f8e700 SiFive HiFive (FE310) RISC-V support
* HiFive1 HAL Support for PLL Clock, UART, RTC and Flash QSPI Erase/Write.
* HiFive1 update demo application for accepting firmware updates over UART.
* Added test-update-server application for pushing firmware image over UART.
* Fixes for building with `make SIGN=ECC256`.
* Improvements to wolfCrypt `user_settings.h`.
* General library cleanup (license headers and formatting)
* Updated the wolfSSL submodule to latest.
* Documentation updates including new `Targets.md` section for hardare instructions.
2019-06-07 13:08:15 -07:00
Daniele Lacamera b5fd49a82a Initial experimental support for RISC-V
- New Makefile to support multiple architectures
- Separate architecture-specific start-up files
- Stub for a hifive1 HAL port
2019-04-01 14:01:14 +02:00