mirror of https://github.com/wolfSSL/wolfBoot.git
116 lines
3.4 KiB
C
116 lines
3.4 KiB
C
/* app_stm32f1.c
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*
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* Test bare-metal application for Blue Pill (STM32F103) board.
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*
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* Copyright (C) 2025 wolfSSL Inc.
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*
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* This file is part of wolfBoot.
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*
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* wolfBoot is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* wolfBoot is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
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*/
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#include <stdint.h>
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#include "hal.h"
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#include "system.h"
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#include "target.h"
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#include "wolfboot/wolfboot.h"
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/*** LED ***/
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#define RCC_BASE (0x40021000U)
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#define RCC_APB2ENR (*(volatile uint32_t *)(RCC_BASE + 0x18))
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#define RCC_APB2ENR_IOPCEN (1 << 4)
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#define GPIOC_BASE (0x40011000)
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#define GPIOC_CRL (*(volatile uint32_t *)(GPIOC_BASE + 0x00U))
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#define GPIOC_CRH (*(volatile uint32_t *)(GPIOC_BASE + 0x04U))
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#define GPIOC_IDR (*(volatile uint32_t *)(GPIOC_BASE + 0x08U))
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#define GPIOC_ODR (*(volatile uint32_t *)(GPIOC_BASE + 0x0CU))
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#define GPIOC_BSRR (*(volatile uint32_t *)(GPIOC_BASE + 0x10U))
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#define GPIOC_BRR (*(volatile uint32_t *)(GPIOC_BASE + 0x14U))
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/* Register values */
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#define GPIOx_CRL_MASK(pin) (0xF << ((pin) * 4))
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#define GPIOx_CRH_MASK(pin) (0xF << (((pin) - 8) * 4))
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#define GPIOx_CRL_CNF(pin, cnf) ((cnf) << (2 + ((pin) * 4)))
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#define GPIOx_CRH_CNF(pin, cnf) ((cnf) << (2 + (((pin) - 8) * 4)))
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#define GPIOx_CRy_CNF_ANALOG (0)
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#define GPIOx_CRy_CNF_FLOATING (1)
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#define GPIOx_CRy_CNF_PULL (2)
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#define GPIOx_CRy_CNF_OUTPUT_PP (0)
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#define GPIOx_CRy_CNF_OUTPUT_OD (1)
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#define GPIOx_CRy_CNF_AF_PP (2)
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#define GPIOx_CRy_CNF_AF_OD (3)
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#define GPIOx_CRL_MODE(pin, mode) ((mode) << ((pin) * 4))
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#define GPIOx_CRH_MODE(pin, mode) ((mode) << (((pin) - 8) * 4))
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#define GPIOx_CRy_MODE_INPUT (0)
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#define GPIOx_CRy_MODE_OUT_10_MHZ (1)
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#define GPIOx_CRy_MODE_OUT_2_MHZ (2)
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#define GPIOx_CRy_MODE_OUT_50_MHZ (3)
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static void led_init(void)
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{
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uint32_t reg32;
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/* Use PC13 as led output as it's connected to the onboard LED of the
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* Blue Pill board. */
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/* Enable GPIOC clock */
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RCC_APB2ENR |= RCC_APB2ENR_IOPCEN;
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/* Configure pin PC13 as slow (2 MHz) output */
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reg32 = GPIOC_CRH;
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reg32 &= ~(GPIOx_CRH_MASK(13));
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reg32 |= GPIOx_CRH_CNF(13, GPIOx_CRy_CNF_OUTPUT_PP);
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reg32 |= GPIOx_CRH_MODE(13, GPIOx_CRy_MODE_OUT_2_MHZ);
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GPIOC_CRH = reg32;
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/* Set PC13 high to turn led OFF */
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GPIOC_BSRR |= 1 << 13;
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}
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void led_toggle(void)
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{
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if (GPIOC_IDR & (1 << 13))
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GPIOC_BRR |= 1 << 13;
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else
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GPIOC_BSRR |= 1 << 13;
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}
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void main(void) {
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hal_init();
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led_init();
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switch (wolfBoot_current_firmware_version()) {
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case 1:
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wolfBoot_success();
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wolfBoot_update_trigger();
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led_toggle();
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break;
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case 2:
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wolfBoot_success();
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led_toggle();
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break;
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default:
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break;
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}
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while(1)
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WFI();
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}
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