wolfBoot/tools/openocd/max32665.cfg

24 lines
652 B
INI

# SPDX-License-Identifier: GPL-2.0-or-later
# Analog Devices MAX32665/MAX32666 - Dual Arm Cortex-M4F @ 96MHz
# 1MB Flash (2 x 512KB banks), 560KB SRAM
# Set the reset pin configuration
reset_config srst_only
# Flash Bank 0: 512KB at 0x10000000, FLC0 at 0x40029000
set FLASH_BASE 0x10000000
set FLASH_SIZE 0x80000
set FLC_BASE 0x40029000
set FLASH_SECTOR 0x2000
set FLASH_CLK 96
set FLASH_OPTIONS 0x00
# Use Serial Wire Debug
transport select swd
source [find target/max32xxx_common.cfg]
# Flash Bank 1: 512KB at 0x10080000, FLC1 at 0x40029400
flash bank $_CHIPNAME.flash1 max32xxx 0x10080000 0x80000 0 0 $_CHIPNAME.cpu \
0x40029400 0x2000 96 0x00